From patchwork Tue Mar 17 15:14:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasundhara Volam X-Patchwork-Id: 222394 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1DBB5C3F2CE for ; Tue, 17 Mar 2020 15:16:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E77A820724 for ; Tue, 17 Mar 2020 15:16:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="CRnOYRMc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726832AbgCQPQu (ORCPT ); Tue, 17 Mar 2020 11:16:50 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:41803 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726780AbgCQPQt (ORCPT ); Tue, 17 Mar 2020 11:16:49 -0400 Received: by mail-wr1-f68.google.com with SMTP id f11so9399891wrp.8 for ; Tue, 17 Mar 2020 08:16:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WLiEmDVVw7z5M6PsK8r0Pu95NiIoskT/ZwOEHjMC7jw=; b=CRnOYRMcw2h8oJmvuaHIReuidU+lKHXznx+19NZXWttJVKqMGUwFfwC0v/rBPedjpj G6tt0qbqn7Jqnp5mdGwqiGo57PXzR0vhmchgQL37qMkCH420tMmXqAbh+vb031pHC16t u1fkrA7S2esLM1VN8fig5bVKM4GM8ZegzGhNU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WLiEmDVVw7z5M6PsK8r0Pu95NiIoskT/ZwOEHjMC7jw=; b=dSaN64Vcjj4Bd53XtEyTQomhnedoHS2lrkxyEV8/05U/OLyT1lJPlXfQxpfO0DljSe 91t88c3314zUUo7XxRNdSURdG9Z8EBmW21Z+KwHN2nxxI3mcAVUHwklLuELctRlU6rJO SLu4BYafA4TViKFaxM1/Cm4pkwsiI7WLkk+iopjZGIz9WAQHVfax4WJVOulqom9l4j63 +pXNNoiJ2OdClLV9aPgnjHJ1C5KIADHIufP9F512fz8bu7ldmpsLdsAqRj34mP+8MI5A jg+qladBx7h1fL2Ha0xqU1vUM/vlyVzL75mrrtcvrUVUCD+S1PcSUHCMe/g6SXoDCfKj PzGQ== X-Gm-Message-State: ANhLgQ230ptJ+F4rxbzx/t0F1cZtyrc5O6NZYITvRAQmD2ThRrN2Z6pL r7mkBI0DBPF9a/9EuKo1R01Y0pNfLRU= X-Google-Smtp-Source: ADFU+vs7x8G4RC9jhycBPk6CVj5L/5/NWX3Wi3UhHb8Ut2gquDInN6ZflFPsOLhf4r1zTqIoLbsWYA== X-Received: by 2002:adf:a30b:: with SMTP id c11mr6528179wrb.257.1584458208361; Tue, 17 Mar 2020 08:16:48 -0700 (PDT) Received: from lxpurley1.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id x6sm4943916wrm.29.2020.03.17.08.16.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Mar 2020 08:16:47 -0700 (PDT) From: Vasundhara Volam To: davem@davemloft.net Cc: netdev@vger.kernel.org, Vasundhara Volam , Michael Chan Subject: [PATCH net-next 02/11] bnxt_en: Add driver HWRM spec version to devlink info_get cb Date: Tue, 17 Mar 2020 20:44:39 +0530 Message-Id: <1584458082-29207-3-git-send-email-vasundhara-v.volam@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1584458082-29207-1-git-send-email-vasundhara-v.volam@broadcom.com> References: <1584458082-29207-1-git-send-email-vasundhara-v.volam@broadcom.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Also update bnxt.rst documentation file. Signed-off-by: Vasundhara Volam Signed-off-by: Michael Chan --- Documentation/networking/devlink/bnxt.rst | 3 +++ drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/Documentation/networking/devlink/bnxt.rst b/Documentation/networking/devlink/bnxt.rst index 82ef9ec..2709161 100644 --- a/Documentation/networking/devlink/bnxt.rst +++ b/Documentation/networking/devlink/bnxt.rst @@ -57,6 +57,9 @@ The ``bnxt_en`` driver reports the following versions * - ``asic.rev`` - fixed - ASIC design revision + * - ``drv.spec`` + - running + - HWRM specification version supported by driver HWRM implementation * - ``fw.psid`` - stored, running - Firmware parameter set version of the board diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c index d3c93cc..4a623ff 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c @@ -425,6 +425,11 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req, return rc; } + rc = devlink_info_version_running_put(req, + DEVLINK_INFO_VERSION_GENERIC_DRV_SPEC, HWRM_VERSION_STR); + if (rc) + return rc; + if (strlen(ver_resp->active_pkg_name)) { rc = devlink_info_version_running_put(req, From patchwork Tue Mar 17 15:14:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasundhara Volam X-Patchwork-Id: 222393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C641EC10F29 for ; Tue, 17 Mar 2020 15:16:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9D52C20714 for ; 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Tue, 17 Mar 2020 08:16:53 -0700 (PDT) From: Vasundhara Volam To: davem@davemloft.net Cc: netdev@vger.kernel.org, Vasundhara Volam , Michael Chan Subject: [PATCH net-next 04/11] bnxt_en: Refactor bnxt_hwrm_get_nvm_cfg_ver() Date: Tue, 17 Mar 2020 20:44:41 +0530 Message-Id: <1584458082-29207-5-git-send-email-vasundhara-v.volam@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1584458082-29207-1-git-send-email-vasundhara-v.volam@broadcom.com> References: <1584458082-29207-1-git-send-email-vasundhara-v.volam@broadcom.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Refactor bnxt_hwrm_get_nvm_cfg_ver() and move hwrm specific code to bnxt_hwrm_nvm_get_var(), to be called multiple times. Also, rename bnxt_hwrm_get_nvm_cfg_ver() to bnxt_get_nvm_cfg_ver() Signed-off-by: Vasundhara Volam Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 27 +++++++++++++++-------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c index 4a623ff..f08db49 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c @@ -359,25 +359,34 @@ static void bnxt_copy_from_nvm_data(union devlink_param_value *dst, dst->vu8 = (u8)val32; } -static int bnxt_hwrm_get_nvm_cfg_ver(struct bnxt *bp, - union devlink_param_value *nvm_cfg_ver) +static int bnxt_hwrm_nvm_get_var(struct bnxt *bp, dma_addr_t data_dma_addr, + u16 offset, u16 num_bits) { struct hwrm_nvm_get_variable_input req = {0}; + + bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1); + req.dest_data_addr = cpu_to_le64(data_dma_addr); + req.option_num = cpu_to_le16(offset); + req.data_len = cpu_to_le16(num_bits); + + return hwrm_send_message_silent(bp, &req, sizeof(req), + HWRM_CMD_TIMEOUT); +} + +static int bnxt_get_nvm_cfg_ver(struct bnxt *bp, + union devlink_param_value *nvm_cfg_ver) +{ union bnxt_nvm_data *data; dma_addr_t data_dma_addr; int rc; - bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_VARIABLE, -1, -1); data = dma_alloc_coherent(&bp->pdev->dev, sizeof(*data), &data_dma_addr, GFP_KERNEL); if (!data) return -ENOMEM; - req.dest_data_addr = cpu_to_le64(data_dma_addr); - req.data_len = cpu_to_le16(BNXT_NVM_CFG_VER_BITS); - req.option_num = cpu_to_le16(NVM_OFF_NVM_CFG_VER); - - rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); + rc = bnxt_hwrm_nvm_get_var(bp, data_dma_addr, NVM_OFF_NVM_CFG_VER, + BNXT_NVM_CFG_VER_BITS); if (!rc) bnxt_copy_from_nvm_data(nvm_cfg_ver, data, BNXT_NVM_CFG_VER_BITS, @@ -439,7 +448,7 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req, return rc; } - if (BNXT_PF(bp) && !bnxt_hwrm_get_nvm_cfg_ver(bp, &nvm_cfg_ver)) { + if (BNXT_PF(bp) && !bnxt_get_nvm_cfg_ver(bp, &nvm_cfg_ver)) { u32 ver = nvm_cfg_ver.vu32; sprintf(buf, "%X.%X.%X", (ver >> 16) & 0xF, (ver >> 8) & 0xF, From patchwork Tue Mar 17 15:16:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasundhara Volam X-Patchwork-Id: 222390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B59AC2BB1D for ; Tue, 17 Mar 2020 15:18:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 32FDE20714 for ; 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Tue, 17 Mar 2020 08:18:24 -0700 (PDT) From: Vasundhara Volam To: linux-pci@vger.kernel.org, davem@davemloft.net Cc: netdev@vger.kernel.org, Vasundhara Volam , Bjorn Helgaas , Michael Chan Subject: [PATCH net-next 06/11] PCI: Add new PCI_VPD_RO_KEYWORD_SERIALNO macro Date: Tue, 17 Mar 2020 20:46:44 +0530 Message-Id: <1584458204-29285-1-git-send-email-vasundhara-v.volam@broadcom.com> X-Mailer: git-send-email 1.8.3.1 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds a new macro for serial number keyword. Cc: Bjorn Helgaas Signed-off-by: Vasundhara Volam Signed-off-by: Michael Chan --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index fc54b89..a048fba 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -2184,6 +2184,7 @@ bool pci_acs_path_enabled(struct pci_dev *start, #define PCI_VPD_INFO_FLD_HDR_SIZE 3 #define PCI_VPD_RO_KEYWORD_PARTNO "PN" +#define PCI_VPD_RO_KEYWORD_SERIALNO "SN" #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" From patchwork Tue Mar 17 15:17:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasundhara Volam X-Patchwork-Id: 222389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7C2C7C18E5B for ; Tue, 17 Mar 2020 15:19:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 501FA20724 for ; Tue, 17 Mar 2020 15:19:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="Zz1jwkeL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726912AbgCQPTX (ORCPT ); Tue, 17 Mar 2020 11:19:23 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:44713 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726478AbgCQPTX (ORCPT ); Tue, 17 Mar 2020 11:19:23 -0400 Received: by mail-wr1-f67.google.com with SMTP id y2so10712173wrn.11 for ; Tue, 17 Mar 2020 08:19:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=807Ui94TU5u0AhxzhwnrSf/1vI/cWF4dKvvCGNgjD4c=; b=Zz1jwkeLetyGDCMiay8Zr1gPM9+Oxud92I0ptKiObdrQBTq2Wv4UmwCW9zdfxlnDkq YYdM1w6kRvzBpiI9l6bj291oT3JB4YjWiz57T/URCbNnBc/46adqH/v7p12z94VAfxdQ TBr5L0CSEZWsbHQ5bYoRnj1rFM9W6C5qgsYwg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=807Ui94TU5u0AhxzhwnrSf/1vI/cWF4dKvvCGNgjD4c=; b=CnS1LBAFVlXDq2bVIZ6nw7gxOlAPqs9e+jUJSvWup2k/25oO9InDI/SA67mkGxdrq/ +NDzYX5G2f9DXmsIX7hiSC2QMAQwuo5l1eP91LMo2bvbaqBEwDJ/V3uV73gifLnampuA ifTieCm5IZaGUul88vBMjkiW9iZnSV37qoYVcYC99SEZkvmVx+N/2yfRWC0jYg7MQOKX 0bJHuVT9pPXlu9ThWuPKT+QeHmRlBWUg326kuOU/jZOSdr+ct6lvSbMMiObZgH5+kmiv s9zlSqefpvV/t13cvUxuLsGT4TgZhEGPSaC7Qi2qlKu0zAU7VYw7srPZpMg3UbJRgL/l +Dew== X-Gm-Message-State: ANhLgQ0S8DtBtq+9VOp+EDaGvIShuqQoSmv43CaNzKmAiRTyl/lF6gAx ZLKpOUaD5f+qEwe2iKI45Kxcb/+e+gw= X-Google-Smtp-Source: ADFU+vskFESljA0pMg1dI++LGac1STuwFCnuhn3wHGsRc9oibKd9ebtgDxuYiZZZQWQdEMF1ZrWt5Q== X-Received: by 2002:a5d:4ecd:: with SMTP id s13mr6298103wrv.186.1584458361800; Tue, 17 Mar 2020 08:19:21 -0700 (PDT) Received: from lxpurley1.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id z19sm4363534wma.41.2020.03.17.08.19.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Mar 2020 08:19:21 -0700 (PDT) From: Vasundhara Volam To: davem@davemloft.net Cc: netdev@vger.kernel.org, Vasundhara Volam , Michael Chan Subject: [PATCH net-next 08/11] bnxt_en: Add partno and serialno to devlink info_get cb Date: Tue, 17 Mar 2020 20:47:23 +0530 Message-Id: <1584458246-29370-2-git-send-email-vasundhara-v.volam@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1584458246-29370-1-git-send-email-vasundhara-v.volam@broadcom.com> References: <1584458246-29370-1-git-send-email-vasundhara-v.volam@broadcom.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add part number and serial number info from the vital product data to info_get command via devlink tool. Some of the broadcom devices support both PCI extended config space for device serial number and VPD serial number. With this patch, both the information will be displayed via info_get cb. Update bnxt.rst documentation as well. Example display: $ devlink dev info pci/0000:3b:00.1 pci/0000:3b:00.1: driver bnxt_en serial_number B0-26-28-FF-FE-C8-85-20 versions: fixed: board.id BCM957508-P2100G asic.id 1750 asic.rev 1 vpd.serialno P2100pm01920A0032CQ running: drv.spec 1.10.1.12 hw.addr b0:26:28:c8:85:21 hw.mh_base_addr b0:26:28:c8:85:20 fw 216.0.286.0 fw.psid 0.0.6 fw.app 216.0.251.0 Signed-off-by: Vasundhara Volam Signed-off-by: Michael Chan --- Documentation/networking/devlink/bnxt.rst | 6 ++++++ drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c | 15 +++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/Documentation/networking/devlink/bnxt.rst b/Documentation/networking/devlink/bnxt.rst index f850a18..17b6522 100644 --- a/Documentation/networking/devlink/bnxt.rst +++ b/Documentation/networking/devlink/bnxt.rst @@ -51,12 +51,18 @@ The ``bnxt_en`` driver reports the following versions * - Name - Type - Description + * - ``board.id`` + - fixed + - Part number identifying the board design * - ``asic.id`` - fixed - ASIC design identifier * - ``asic.rev`` - fixed - ASIC design revision + * - ``vpd.serialno`` + - fixed + - Serial number identifying the board * - ``drv.spec`` - running - HWRM specification version supported by driver HWRM implementation diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c index 607e27a..6065602 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c @@ -439,6 +439,14 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req, if (rc) return rc; + if (strlen(bp->board_partno)) { + rc = devlink_info_version_fixed_put(req, + DEVLINK_INFO_VERSION_GENERIC_BOARD_ID, + bp->board_partno); + if (rc) + return rc; + } + sprintf(buf, "%X", bp->chip_num); rc = devlink_info_version_fixed_put(req, DEVLINK_INFO_VERSION_GENERIC_ASIC_ID, buf); @@ -461,6 +469,13 @@ static int bnxt_dl_info_get(struct devlink *dl, struct devlink_info_req *req, return rc; } + if (strlen(bp->board_serialno)) { + rc = devlink_info_version_fixed_put(req, "vpd.serialno", + bp->board_serialno); + if (rc) + return rc; + } + rc = devlink_info_version_running_put(req, DEVLINK_INFO_VERSION_GENERIC_DRV_SPEC, HWRM_VERSION_STR); if (rc) From patchwork Tue Mar 17 15:17:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasundhara Volam X-Patchwork-Id: 222388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 865E0C18E5B for ; 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Tue, 17 Mar 2020 08:19:37 -0700 (PDT) From: Vasundhara Volam To: davem@davemloft.net Cc: netdev@vger.kernel.org, Vasundhara Volam , Michael Chan Subject: [PATCH net-next 10/11] bnxt_en: Update firmware interface spec to 1.10.1.26. Date: Tue, 17 Mar 2020 20:47:25 +0530 Message-Id: <1584458246-29370-4-git-send-email-vasundhara-v.volam@broadcom.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1584458246-29370-1-git-send-email-vasundhara-v.volam@broadcom.com> References: <1584458246-29370-1-git-send-email-vasundhara-v.volam@broadcom.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ECN and ECN statistics firmware commands support, PFC watchdog support and few minor changes to the spec. Signed-off-by: Vasundhara Volam Signed-off-by: Michael Chan --- drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h | 307 +++++++++++++++++++++++--- 1 file changed, 282 insertions(+), 25 deletions(-) diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h b/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h index 7cf27df..0f080b9 100644 --- a/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h @@ -2,7 +2,7 @@ * * Copyright (c) 2014-2016 Broadcom Corporation * Copyright (c) 2014-2018 Broadcom Limited - * Copyright (c) 2018-2019 Broadcom Inc. + * Copyright (c) 2018-2020 Broadcom Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -207,6 +207,8 @@ struct cmd_nums { #define HWRM_PORT_PHY_MDIO_READ 0xb6UL #define HWRM_PORT_PHY_MDIO_BUS_ACQUIRE 0xb7UL #define HWRM_PORT_PHY_MDIO_BUS_RELEASE 0xb8UL + #define HWRM_PORT_QSTATS_EXT_PFC_WD 0xb9UL + #define HWRM_PORT_ECN_QSTATS 0xbaUL #define HWRM_FW_RESET 0xc0UL #define HWRM_FW_QSTATUS 0xc1UL #define HWRM_FW_HEALTH_CHECK 0xc2UL @@ -220,6 +222,8 @@ struct cmd_nums { #define HWRM_FW_SET_STRUCTURED_DATA 0xcaUL #define HWRM_FW_GET_STRUCTURED_DATA 0xcbUL #define HWRM_FW_IPC_MAILBOX 0xccUL + #define HWRM_FW_ECN_CFG 0xcdUL + #define HWRM_FW_ECN_QCFG 0xceUL #define HWRM_EXEC_FWD_RESP 0xd0UL #define HWRM_REJECT_FWD_RESP 0xd1UL #define HWRM_FWD_RESP 0xd2UL @@ -341,6 +345,9 @@ struct cmd_nums { #define HWRM_MFG_OTP_CFG 0x207UL #define HWRM_MFG_OTP_QCFG 0x208UL #define HWRM_MFG_HDMA_TEST 0x209UL + #define HWRM_MFG_FRU_EEPROM_WRITE 0x20aUL + #define HWRM_MFG_FRU_EEPROM_READ 0x20bUL + #define HWRM_SV 0x400UL #define HWRM_DBG_READ_DIRECT 0xff10UL #define HWRM_DBG_READ_INDIRECT 0xff11UL #define HWRM_DBG_WRITE_DIRECT 0xff12UL @@ -356,6 +363,7 @@ struct cmd_nums { #define HWRM_DBG_RING_INFO_GET 0xff1cUL #define HWRM_DBG_CRASHDUMP_HEADER 0xff1dUL #define HWRM_DBG_CRASHDUMP_ERASE 0xff1eUL + #define HWRM_DBG_DRV_TRACE 0xff1fUL #define HWRM_NVM_FACTORY_DEFAULTS 0xffeeUL #define HWRM_NVM_VALIDATE_OPTION 0xffefUL #define HWRM_NVM_FLUSH 0xfff0UL @@ -429,8 +437,8 @@ struct hwrm_err_output { #define HWRM_VERSION_MAJOR 1 #define HWRM_VERSION_MINOR 10 #define HWRM_VERSION_UPDATE 1 -#define HWRM_VERSION_RSVD 12 -#define HWRM_VERSION_STR "1.10.1.12" +#define HWRM_VERSION_RSVD 26 +#define HWRM_VERSION_STR "1.10.1.26" /* hwrm_ver_get_input (size:192b/24B) */ struct hwrm_ver_get_input { @@ -647,6 +655,7 @@ struct hwrm_async_event_cmpl { #define ASYNC_EVENT_CMPL_EVENT_ID_TFLIB_LINK_STATUS_CHANGE 0x3eUL #define ASYNC_EVENT_CMPL_EVENT_ID_QUIESCE_DONE 0x3fUL #define ASYNC_EVENT_CMPL_EVENT_ID_DEFERRED_RESPONSE 0x40UL + #define ASYNC_EVENT_CMPL_EVENT_ID_PFC_WATCHDOG_CFG_CHANGE 0x41UL #define ASYNC_EVENT_CMPL_EVENT_ID_FW_TRACE_MSG 0xfeUL #define ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR 0xffUL #define ASYNC_EVENT_CMPL_EVENT_ID_LAST ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR @@ -1089,7 +1098,7 @@ struct hwrm_func_qcaps_input { u8 unused_0[6]; }; -/* hwrm_func_qcaps_output (size:640b/80B) */ +/* hwrm_func_qcaps_output (size:704b/88B) */ struct hwrm_func_qcaps_output { __le16 error_code; __le16 req_type; @@ -1126,6 +1135,9 @@ struct hwrm_func_qcaps_output { #define FUNC_QCAPS_RESP_FLAGS_ERR_RECOVER_RELOAD 0x2000000UL #define FUNC_QCAPS_RESP_FLAGS_NOTIFY_VF_DEF_VNIC_CHNG_SUPPORTED 0x4000000UL #define FUNC_QCAPS_RESP_FLAGS_VLAN_ACCELERATION_TX_DISABLED 0x8000000UL + #define FUNC_QCAPS_RESP_FLAGS_COREDUMP_CMD_SUPPORTED 0x10000000UL + #define FUNC_QCAPS_RESP_FLAGS_CRASHDUMP_CMD_SUPPORTED 0x20000000UL + #define FUNC_QCAPS_RESP_FLAGS_PFC_WD_STATS_SUPPORTED 0x40000000UL u8 mac_address[6]; __le16 max_rsscos_ctx; __le16 max_cmpl_rings; @@ -1146,7 +1158,11 @@ struct hwrm_func_qcaps_output { __le32 max_flow_id; __le32 max_hw_ring_grps; __le16 max_sp_tx_rings; - u8 unused_0; + u8 unused_0[2]; + __le32 flags_ext; + #define FUNC_QCAPS_RESP_FLAGS_EXT_ECN_MARK_SUPPORTED 0x1UL + #define FUNC_QCAPS_RESP_FLAGS_EXT_ECN_STATS_SUPPORTED 0x2UL + u8 unused_1[3]; u8 valid; }; @@ -1161,7 +1177,7 @@ struct hwrm_func_qcfg_input { u8 unused_0[6]; }; -/* hwrm_func_qcfg_output (size:704b/88B) */ +/* hwrm_func_qcfg_output (size:768b/96B) */ struct hwrm_func_qcfg_output { __le16 error_code; __le16 req_type; @@ -1267,7 +1283,11 @@ struct hwrm_func_qcfg_output { u8 always_1; __le32 reset_addr_poll; __le16 legacy_l2_db_size_kb; - u8 unused_2[1]; + __le16 svif_info; + #define FUNC_QCFG_RESP_SVIF_INFO_SVIF_MASK 0x7fffUL + #define FUNC_QCFG_RESP_SVIF_INFO_SVIF_SFT 0 + #define FUNC_QCFG_RESP_SVIF_INFO_SVIF_VALID 0x8000UL + u8 unused_2[7]; u8 valid; }; @@ -1808,7 +1828,7 @@ struct hwrm_func_backing_store_qcaps_output { u8 ctx_kind_initializer; __le32 rsvd; __le16 rsvd1; - u8 rsvd2; + u8 tqm_fp_rings_count; u8 valid; }; @@ -2231,7 +2251,17 @@ struct hwrm_error_recovery_qcfg_output { #define ERROR_RECOVERY_QCFG_RESP_RESET_REG_ADDR_SFT 2 __le32 reset_reg_val[16]; u8 delay_after_reset[16]; - u8 unused_1[7]; + __le32 err_recovery_cnt_reg; + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_MASK 0x3UL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_SFT 0 + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_PCIE_CFG 0x0UL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_GRC 0x1UL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR0 0x2UL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR1 0x3UL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_LAST ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SPACE_BAR1 + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_MASK 0xfffffffcUL + #define ERROR_RECOVERY_QCFG_RESP_ERR_RECOVERY_CNT_REG_ADDR_SFT 2 + u8 unused_1[3]; u8 valid; }; @@ -3048,6 +3078,90 @@ struct rx_port_stats_ext { __le64 rx_discard_packets_cos7; }; +/* rx_port_stats_ext_pfc_wd (size:5120b/640B) */ +struct rx_port_stats_ext_pfc_wd { + __le64 rx_pfc_watchdog_storms_detected_pri0; + __le64 rx_pfc_watchdog_storms_detected_pri1; + __le64 rx_pfc_watchdog_storms_detected_pri2; + __le64 rx_pfc_watchdog_storms_detected_pri3; + __le64 rx_pfc_watchdog_storms_detected_pri4; + __le64 rx_pfc_watchdog_storms_detected_pri5; + __le64 rx_pfc_watchdog_storms_detected_pri6; + __le64 rx_pfc_watchdog_storms_detected_pri7; + __le64 rx_pfc_watchdog_storms_reverted_pri0; + __le64 rx_pfc_watchdog_storms_reverted_pri1; + __le64 rx_pfc_watchdog_storms_reverted_pri2; + __le64 rx_pfc_watchdog_storms_reverted_pri3; + __le64 rx_pfc_watchdog_storms_reverted_pri4; + __le64 rx_pfc_watchdog_storms_reverted_pri5; + __le64 rx_pfc_watchdog_storms_reverted_pri6; + __le64 rx_pfc_watchdog_storms_reverted_pri7; + __le64 rx_pfc_watchdog_storms_rx_packets_pri0; + __le64 rx_pfc_watchdog_storms_rx_packets_pri1; + __le64 rx_pfc_watchdog_storms_rx_packets_pri2; + __le64 rx_pfc_watchdog_storms_rx_packets_pri3; + __le64 rx_pfc_watchdog_storms_rx_packets_pri4; + __le64 rx_pfc_watchdog_storms_rx_packets_pri5; + __le64 rx_pfc_watchdog_storms_rx_packets_pri6; + __le64 rx_pfc_watchdog_storms_rx_packets_pri7; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri0; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri1; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri2; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri3; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri4; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri5; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri6; + __le64 rx_pfc_watchdog_storms_rx_bytes_pri7; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri0; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri1; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri2; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri3; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri4; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri5; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri6; + __le64 rx_pfc_watchdog_storms_rx_packets_dropped_pri7; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri0; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri1; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri2; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri3; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri4; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri5; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri6; + __le64 rx_pfc_watchdog_storms_rx_bytes_dropped_pri7; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri0; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri1; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri2; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri3; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri4; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri5; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri6; + __le64 rx_pfc_watchdog_last_storm_rx_packets_pri7; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri0; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri1; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri2; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri3; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri4; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri5; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri6; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_pri7; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri0; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri1; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri2; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri3; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri4; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri5; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri6; + __le64 rx_pfc_watchdog_last_storm_rx_packets_dropped_pri7; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri0; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri1; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri2; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri3; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri4; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri5; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri6; + __le64 rx_pfc_watchdog_last_storm_rx_bytes_dropped_pri7; +}; + /* hwrm_port_qstats_ext_input (size:320b/40B) */ struct hwrm_port_qstats_ext_input { __le16 req_type; @@ -3077,6 +3191,31 @@ struct hwrm_port_qstats_ext_output { u8 valid; }; +/* hwrm_port_qstats_ext_pfc_wd_input (size:256b/32B) */ +struct hwrm_port_qstats_ext_pfc_wd_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 port_id; + __le16 pfc_wd_stat_size; + u8 unused_0[4]; + __le64 pfc_wd_stat_host_addr; +}; + +/* hwrm_port_qstats_ext_pfc_wd_output (size:128b/16B) */ +struct hwrm_port_qstats_ext_pfc_wd_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 pfc_wd_stat_size; + u8 flags; + u8 valid; + u8 unused_0[4]; +}; + /* hwrm_port_lpbk_qstats_input (size:128b/16B) */ struct hwrm_port_lpbk_qstats_input { __le16 req_type; @@ -3106,6 +3245,36 @@ struct hwrm_port_lpbk_qstats_output { u8 valid; }; +/* hwrm_port_ecn_qstats_input (size:192b/24B) */ +struct hwrm_port_ecn_qstats_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 port_id; + u8 unused_0[6]; +}; + +/* hwrm_port_ecn_qstats_output (size:384b/48B) */ +struct hwrm_port_ecn_qstats_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le32 mark_cnt_cos0; + __le32 mark_cnt_cos1; + __le32 mark_cnt_cos2; + __le32 mark_cnt_cos3; + __le32 mark_cnt_cos4; + __le32 mark_cnt_cos5; + __le32 mark_cnt_cos6; + __le32 mark_cnt_cos7; + u8 mark_en; + u8 unused_0[6]; + u8 valid; +}; + /* hwrm_port_clr_stats_input (size:192b/24B) */ struct hwrm_port_clr_stats_input { __le16 req_type; @@ -3840,14 +4009,22 @@ struct hwrm_queue_pfcenable_qcfg_output { __le16 seq_id; __le16 resp_len; __le32 flags; - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI0_PFC_ENABLED 0x1UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI1_PFC_ENABLED 0x2UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI2_PFC_ENABLED 0x4UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI3_PFC_ENABLED 0x8UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI4_PFC_ENABLED 0x10UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI5_PFC_ENABLED 0x20UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI6_PFC_ENABLED 0x40UL - #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI7_PFC_ENABLED 0x80UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI0_PFC_ENABLED 0x1UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI1_PFC_ENABLED 0x2UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI2_PFC_ENABLED 0x4UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI3_PFC_ENABLED 0x8UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI4_PFC_ENABLED 0x10UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI5_PFC_ENABLED 0x20UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI6_PFC_ENABLED 0x40UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI7_PFC_ENABLED 0x80UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI0_PFC_WATCHDOG_ENABLED 0x100UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI1_PFC_WATCHDOG_ENABLED 0x200UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI2_PFC_WATCHDOG_ENABLED 0x400UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI3_PFC_WATCHDOG_ENABLED 0x800UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI4_PFC_WATCHDOG_ENABLED 0x1000UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI5_PFC_WATCHDOG_ENABLED 0x2000UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI6_PFC_WATCHDOG_ENABLED 0x4000UL + #define QUEUE_PFCENABLE_QCFG_RESP_FLAGS_PRI7_PFC_WATCHDOG_ENABLED 0x8000UL u8 unused_0[3]; u8 valid; }; @@ -3860,14 +4037,22 @@ struct hwrm_queue_pfcenable_cfg_input { __le16 target_id; __le64 resp_addr; __le32 flags; - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI0_PFC_ENABLED 0x1UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI1_PFC_ENABLED 0x2UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI2_PFC_ENABLED 0x4UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI3_PFC_ENABLED 0x8UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI4_PFC_ENABLED 0x10UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI5_PFC_ENABLED 0x20UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI6_PFC_ENABLED 0x40UL - #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI7_PFC_ENABLED 0x80UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI0_PFC_ENABLED 0x1UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI1_PFC_ENABLED 0x2UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI2_PFC_ENABLED 0x4UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI3_PFC_ENABLED 0x8UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI4_PFC_ENABLED 0x10UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI5_PFC_ENABLED 0x20UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI6_PFC_ENABLED 0x40UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI7_PFC_ENABLED 0x80UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI0_PFC_WATCHDOG_ENABLED 0x100UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI1_PFC_WATCHDOG_ENABLED 0x200UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI2_PFC_WATCHDOG_ENABLED 0x400UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI3_PFC_WATCHDOG_ENABLED 0x800UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI4_PFC_WATCHDOG_ENABLED 0x1000UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI5_PFC_WATCHDOG_ENABLED 0x2000UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI6_PFC_WATCHDOG_ENABLED 0x4000UL + #define QUEUE_PFCENABLE_CFG_REQ_FLAGS_PRI7_PFC_WATCHDOG_ENABLED 0x8000UL __le16 port_id; u8 unused_0[2]; }; @@ -7222,6 +7407,49 @@ struct hwrm_temp_monitor_query_output { u8 valid; }; +/* hwrm_fw_ecn_cfg_input (size:192b/24B) */ +struct hwrm_fw_ecn_cfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + __le16 flags; + #define FW_ECN_CFG_REQ_FLAGS_ENABLE_ECN 0x1UL + u8 unused_0[6]; +}; + +/* hwrm_fw_ecn_cfg_output (size:128b/16B) */ +struct hwrm_fw_ecn_cfg_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + u8 unused_0[7]; + u8 valid; +}; + +/* hwrm_fw_ecn_qcfg_input (size:128b/16B) */ +struct hwrm_fw_ecn_qcfg_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; +}; + +/* hwrm_fw_ecn_qcfg_output (size:128b/16B) */ +struct hwrm_fw_ecn_qcfg_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + __le16 flags; + #define FW_ECN_QCFG_RESP_FLAGS_ENABLE_ECN 0x1UL + u8 unused_0[5]; + u8 valid; +}; + /* hwrm_wol_filter_alloc_input (size:512b/64B) */ struct hwrm_wol_filter_alloc_input { __le16 req_type; @@ -7501,6 +7729,35 @@ struct hwrm_dbg_ring_info_get_output { u8 valid; }; +/* hwrm_dbg_drv_trace_input (size:1024b/128B) */ +struct hwrm_dbg_drv_trace_input { + __le16 req_type; + __le16 cmpl_ring; + __le16 seq_id; + __le16 target_id; + __le64 resp_addr; + u8 severity; + #define DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_FATAL 0x0UL + #define DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_ERROR 0x1UL + #define DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_WARNING 0x2UL + #define DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_INFO 0x3UL + #define DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_DEBUG 0x4UL + #define DBG_DRV_TRACE_REQ_SEVERITY_LAST DBG_DRV_TRACE_REQ_SEVERITY_TRACE_LEVEL_DEBUG + u8 write_len; + u8 unused_0[6]; + char trace_data[104]; +}; + +/* hwrm_dbg_drv_trace_output (size:128b/16B) */ +struct hwrm_dbg_drv_trace_output { + __le16 error_code; + __le16 req_type; + __le16 seq_id; + __le16 resp_len; + u8 unused_0[7]; + u8 valid; +}; + /* hwrm_nvm_read_input (size:320b/40B) */ struct hwrm_nvm_read_input { __le16 req_type;