From patchwork Wed Sep 20 13:39:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 113128 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp691350edb; Wed, 20 Sep 2017 06:41:39 -0700 (PDT) X-Received: by 10.101.73.136 with SMTP id r8mr2177780pgs.67.1505914899504; Wed, 20 Sep 2017 06:41:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505914899; cv=none; d=google.com; s=arc-20160816; b=R2NFHkBwN7T4vJPXD8/pffCDGSfLrufkrZGzccQEEvv9JJxENQoiuNbULdGEbkFkdz Kxvk2YALxNQSNDRjacxVxf8v6IexHxO5yUukatDgXDkxYMF8ccMxz5cq8nkVK2MjWPTm E67xTzAj4J6ZsE/6wVe+vterbO5IoUGXgT1ajdUlAkU3v4Vi/6rwMx1tJvGpW/WgyGUh 6wsWH/APgZNesLPk2fzoJAd+awyifdxqmWxyGMxLdJ3xZsfUkRBKZidDpw1mSvyWWfdN 0AwGZooi26Grdvh/JBHXBOZWft8Y++KqeVPc8mYeJJbdqNN7Y9xFveVy5XWGcIDke8nS 3sxw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=4pL8lYlIG0VE/UHKe/eSABGAGTxykr6LtJmjM1gqqR8=; b=HmTAzNBecZOqh/tahEJgXT6OCETGNm+h1O3i5gvofZioxBcUdy8eEVshxt8ShgHtoH t27uxSVQzZPHYzubOh9QU8ttdzfZNuu/5D8WZ2XAaLLFGW8YC4abYl8XSKTKRjBr+GYF QXL+L0uz54p/WnQK5aXmtm0K8Th2qObuDQUbjqmjdJZaGyd7g3mnXF5lgisTmR0mfIsw 6ChQyY3Ut4Nh1tEOCyUrfLlmNjtxFA3Nk+OmOwanJLHqZXEMs5t1PHxjAFCAdreGUVtA mIx8GSjmm5WdyQfFK3Dbin1NntmMQmV/tJvGwV4jPWpwsDqQIdmlpn8TLce9+l7z56KF xKXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=QRPa5vk3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si1343664plj.810.2017.09.20.06.41.39; Wed, 20 Sep 2017 06:41:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=QRPa5vk3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751889AbdITNlh (ORCPT + 26 others); Wed, 20 Sep 2017 09:41:37 -0400 Received: from mail-wr0-f178.google.com ([209.85.128.178]:48281 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751378AbdITNji (ORCPT ); Wed, 20 Sep 2017 09:39:38 -0400 Received: by mail-wr0-f178.google.com with SMTP id 108so2204949wra.5 for ; Wed, 20 Sep 2017 06:39:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4pL8lYlIG0VE/UHKe/eSABGAGTxykr6LtJmjM1gqqR8=; b=QRPa5vk39Yg3zvU1FNnH0wA0BvsI8ltaFPVCPuih5eCTmN20afYcx4RfJSkleXH72Y aynRVdSPsExsxDR8J96j9Z3hpXRRLs5Wocu63ZfwaO60tF+aj88WHIVDLdE5jM6uJGyG YICgOTV8d6n672z+yNcK1tZqMyLsIdmUsFZkRh6BdX9Os742phc1F2Qly6n19M6u7xa3 1EXs6hFfKA6qP9WzlnZQbZ6oWhaiZsjUIw4xGYJEedwZOLhYVnQxjsnTfWKfA/sG1yQB i4ybmYS+mx53O7v04nZTdZUlw16YH6iJ9v2OqDjGyow7WJIOYzLeNbZpMovzzGAzvuw1 NFFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4pL8lYlIG0VE/UHKe/eSABGAGTxykr6LtJmjM1gqqR8=; b=ImBmtvSloN6P9xfCLq8kUI9ASzaJl/05T50kVrLDVEeDDar4ayPs/5pZcNnRo7+6UD HCNqOnVDS1h3sp8TxTwEoW+Phw3WNHgzPEPIk0uQgVW3VOrpM+WpAJ1457Xcw3o64PV0 62ZXL92CuWFdtH2H/PVVMLHXCsbPVd9bjzoQrDo4SgIlL06YpHvTl9185AWGJXGi2TZT DXyZ5TRRPrDazvyrxG+DyvOgKZ1jtJCeDdjjrlLpFldx5K9xHZ7bagjDvV1QcoJyi7KU 3lvX5sJCxfOJUSlAmbqQfvKV781J86SL4s0p6hIE0T+zcdOtS2LO/92lLCsuXhe39TkS ZVxA== X-Gm-Message-State: AHPjjUingJ8fYPAq34BEOT7RRPtxKsXM1b2pdmPKWbNUnzD1RNHysZx1 1YjVtGQ8e8FGZPzeYyy3AK0l1w== X-Google-Smtp-Source: AOwi7QDEwdBYoou/Mn0vbwv5Lw+reKBdniHzwkuTjIHX3Ce75Lpn7Rfi/A/g841MS8LgSoQdIKjuEA== X-Received: by 10.223.167.79 with SMTP id e15mr4901433wrd.92.1505914776795; Wed, 20 Sep 2017 06:39:36 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id a39sm1938888wrc.48.2017.09.20.06.39.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Sep 2017 06:39:36 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 1/8] pinctrl: meson: remove offset from pinctrl Date: Wed, 20 Sep 2017 15:39:20 +0200 Message-Id: <20170920133927.17390-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920133927.17390-1-jbrunet@baylibre.com> References: <20170920133927.17390-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Offset on meson pinctrl and gpios is something that was carried from the vendor driver, where there is a weird link between the 2 controllers. Since these 2 controllers are independent, this offset adds an unnecessary complexity. This patch remove this manually set offset and rely on pinctrl to figure out the gpio base offset Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson.c | 18 +++--------------- drivers/pinctrl/meson/pinctrl-meson.h | 8 +++----- 2 files changed, 6 insertions(+), 20 deletions(-) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 66ed70c12733..247208150b19 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -410,18 +410,6 @@ static const struct pinconf_ops meson_pinconf_ops = { .is_generic = true, }; -static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio) -{ - return pinctrl_request_gpio(chip->base + gpio); -} - -static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio) -{ - struct meson_pinctrl *pc = gpiochip_get_data(chip); - - pinctrl_free_gpio(pc->data->pin_base + gpio); -} - static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) { struct meson_pinctrl *pc = gpiochip_get_data(chip); @@ -539,13 +527,13 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) pc->chip.label = pc->data->name; pc->chip.parent = pc->dev; - pc->chip.request = meson_gpio_request; - pc->chip.free = meson_gpio_free; + pc->chip.request = gpiochip_generic_request; + pc->chip.free = gpiochip_generic_free; pc->chip.direction_input = meson_gpio_direction_input; pc->chip.direction_output = meson_gpio_direction_output; pc->chip.get = meson_gpio_get; pc->chip.set = meson_gpio_set; - pc->chip.base = pc->data->pin_base; + pc->chip.base = -1; pc->chip.ngpio = pc->data->num_pins; pc->chip.can_sleep = false; pc->chip.of_node = pc->of_node; diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 890f296f5840..227b72a60c22 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -124,8 +124,6 @@ struct meson_pinctrl { struct device_node *of_node; }; -#define PIN(x, b) (b + x) - #define GROUP(grp, r, b) \ { \ .name = #grp, \ @@ -135,10 +133,10 @@ struct meson_pinctrl { .bit = b, \ } -#define GPIO_GROUP(gpio, b) \ +#define GPIO_GROUP(gpio) \ { \ .name = #gpio, \ - .pins = (const unsigned int[]){ PIN(gpio, b) }, \ + .pins = (const unsigned int[]){ gpio }, \ .num_pins = 1, \ .is_gpio = true, \ } @@ -166,7 +164,7 @@ struct meson_pinctrl { }, \ } -#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x) +#define MESON_PIN(x) PINCTRL_PIN(x, #x) extern struct meson_pinctrl_data meson8_cbus_pinctrl_data; extern struct meson_pinctrl_data meson8_aobus_pinctrl_data; From patchwork Wed Sep 20 13:39:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 113127 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp691016edb; Wed, 20 Sep 2017 06:41:18 -0700 (PDT) X-Received: by 10.98.86.28 with SMTP id k28mr2195397pfb.89.1505914878052; Wed, 20 Sep 2017 06:41:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505914878; cv=none; d=google.com; s=arc-20160816; b=rLBiw1mI4jHbxm+gaHeB8E/Sc46pq3GNLjO262+ykTE5ag2zUH8eH9rGBKUnCg5AE+ NkUt4xphgBIlO4yK+0mmbYIX+HOgJn5XoqN8y1WwIpHQn2s4/iZgNQO76CUU58hcwvcV bTGW6Dt91hPAYlAjECjPnDIDagTILCkDJo5c4ZkUvbZ5XkIwns3dVPRo0l136zI5Z4VA E1SCl6MpcKWG7NueUxxHUJUezMFXmHtXhJsCQpjMeEyEdLIdL7eGg1Maf6yk+nt5fxKm N1vYRiRc2mNb71ZVh4Ez4XZEUNzCGcMeghOvy2Trv67rPfXtSGecQRBJByzbDCvcYXru pJcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=MTstYeRdpUDeHzLhLMz5KcbQK72DIZ3Fzvf/Gv7lB2c=; b=wESVH0cB4ndtPHXq5FQ/7w2L0+RhqX3cmbI4RPVdu28okn/Qlxgp+6Yfq0gIPZfYKF 8V3ZO8a/Kj5RvEWyqHrnd80Pc5ORvrwAjt+8uW6XJLmx/cfGYIj52DMGIr0Cj0Urj2hu Tjj33flErNFFwL2S1vibPId+F5YojSFeXmrM2qlgU6i9lenspvE2nl6XF/AfsQb8/hRi RISetrKjKeZA1fi/uRcQMHnf+JJdlG3LXZp5brNTodYkIvDPQgMRlP43LR9HdyWtYpSI FVgVMXiUcRFTw8wcBnLrQ8RJ2TgcW0Nm8FhNgPADxPwfdKIdA+YhXPTaT736QQe4+9Jj 1SHA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=QQoB2ppn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 4/8] pinctrl: meson: remove offset continued - meson8 Date: Wed, 20 Sep 2017 15:39:23 +0200 Message-Id: <20170920133927.17390-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920133927.17390-1-jbrunet@baylibre.com> References: <20170920133927.17390-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson8.c | 964 ++++++++++++++++----------------- 1 file changed, 476 insertions(+), 488 deletions(-) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c index 970f6f14502c..7344f8577467 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8.c +++ b/drivers/pinctrl/meson/pinctrl-meson8.c @@ -14,505 +14,493 @@ #include #include "pinctrl-meson.h" -#define AO_OFF 120 - static const struct pinctrl_pin_desc meson8_cbus_pins[] = { - MESON_PIN(GPIOX_0, 0), - MESON_PIN(GPIOX_1, 0), - MESON_PIN(GPIOX_2, 0), - MESON_PIN(GPIOX_3, 0), - MESON_PIN(GPIOX_4, 0), - MESON_PIN(GPIOX_5, 0), - MESON_PIN(GPIOX_6, 0), - MESON_PIN(GPIOX_7, 0), - MESON_PIN(GPIOX_8, 0), - MESON_PIN(GPIOX_9, 0), - MESON_PIN(GPIOX_10, 0), - MESON_PIN(GPIOX_11, 0), - MESON_PIN(GPIOX_12, 0), - MESON_PIN(GPIOX_13, 0), - MESON_PIN(GPIOX_14, 0), - MESON_PIN(GPIOX_15, 0), - MESON_PIN(GPIOX_16, 0), - MESON_PIN(GPIOX_17, 0), - MESON_PIN(GPIOX_18, 0), - MESON_PIN(GPIOX_19, 0), - MESON_PIN(GPIOX_20, 0), - MESON_PIN(GPIOX_21, 0), - MESON_PIN(GPIOY_0, 0), - MESON_PIN(GPIOY_1, 0), - MESON_PIN(GPIOY_2, 0), - MESON_PIN(GPIOY_3, 0), - MESON_PIN(GPIOY_4, 0), - MESON_PIN(GPIOY_5, 0), - MESON_PIN(GPIOY_6, 0), - MESON_PIN(GPIOY_7, 0), - MESON_PIN(GPIOY_8, 0), - MESON_PIN(GPIOY_9, 0), - MESON_PIN(GPIOY_10, 0), - MESON_PIN(GPIOY_11, 0), - MESON_PIN(GPIOY_12, 0), - MESON_PIN(GPIOY_13, 0), - MESON_PIN(GPIOY_14, 0), - MESON_PIN(GPIOY_15, 0), - MESON_PIN(GPIOY_16, 0), - MESON_PIN(GPIODV_0, 0), - MESON_PIN(GPIODV_1, 0), - MESON_PIN(GPIODV_2, 0), - MESON_PIN(GPIODV_3, 0), - MESON_PIN(GPIODV_4, 0), - MESON_PIN(GPIODV_5, 0), - MESON_PIN(GPIODV_6, 0), - MESON_PIN(GPIODV_7, 0), - MESON_PIN(GPIODV_8, 0), - MESON_PIN(GPIODV_9, 0), - MESON_PIN(GPIODV_10, 0), - MESON_PIN(GPIODV_11, 0), - MESON_PIN(GPIODV_12, 0), - MESON_PIN(GPIODV_13, 0), - MESON_PIN(GPIODV_14, 0), - MESON_PIN(GPIODV_15, 0), - MESON_PIN(GPIODV_16, 0), - MESON_PIN(GPIODV_17, 0), - MESON_PIN(GPIODV_18, 0), - MESON_PIN(GPIODV_19, 0), - MESON_PIN(GPIODV_20, 0), - MESON_PIN(GPIODV_21, 0), - MESON_PIN(GPIODV_22, 0), - MESON_PIN(GPIODV_23, 0), - MESON_PIN(GPIODV_24, 0), - MESON_PIN(GPIODV_25, 0), - MESON_PIN(GPIODV_26, 0), - MESON_PIN(GPIODV_27, 0), - MESON_PIN(GPIODV_28, 0), - MESON_PIN(GPIODV_29, 0), - MESON_PIN(GPIOH_0, 0), - MESON_PIN(GPIOH_1, 0), - MESON_PIN(GPIOH_2, 0), - MESON_PIN(GPIOH_3, 0), - MESON_PIN(GPIOH_4, 0), - MESON_PIN(GPIOH_5, 0), - MESON_PIN(GPIOH_6, 0), - MESON_PIN(GPIOH_7, 0), - MESON_PIN(GPIOH_8, 0), - MESON_PIN(GPIOH_9, 0), - MESON_PIN(GPIOZ_0, 0), - MESON_PIN(GPIOZ_1, 0), - MESON_PIN(GPIOZ_2, 0), - MESON_PIN(GPIOZ_3, 0), - MESON_PIN(GPIOZ_4, 0), - MESON_PIN(GPIOZ_5, 0), - MESON_PIN(GPIOZ_6, 0), - MESON_PIN(GPIOZ_7, 0), - MESON_PIN(GPIOZ_8, 0), - MESON_PIN(GPIOZ_9, 0), - MESON_PIN(GPIOZ_10, 0), - MESON_PIN(GPIOZ_11, 0), - MESON_PIN(GPIOZ_12, 0), - MESON_PIN(GPIOZ_13, 0), - MESON_PIN(GPIOZ_14, 0), - MESON_PIN(CARD_0, 0), - MESON_PIN(CARD_1, 0), - MESON_PIN(CARD_2, 0), - MESON_PIN(CARD_3, 0), - MESON_PIN(CARD_4, 0), - MESON_PIN(CARD_5, 0), - MESON_PIN(CARD_6, 0), - MESON_PIN(BOOT_0, 0), - MESON_PIN(BOOT_1, 0), - MESON_PIN(BOOT_2, 0), - MESON_PIN(BOOT_3, 0), - MESON_PIN(BOOT_4, 0), - MESON_PIN(BOOT_5, 0), - MESON_PIN(BOOT_6, 0), - MESON_PIN(BOOT_7, 0), - MESON_PIN(BOOT_8, 0), - MESON_PIN(BOOT_9, 0), - MESON_PIN(BOOT_10, 0), - MESON_PIN(BOOT_11, 0), - MESON_PIN(BOOT_12, 0), - MESON_PIN(BOOT_13, 0), - MESON_PIN(BOOT_14, 0), - MESON_PIN(BOOT_15, 0), - MESON_PIN(BOOT_16, 0), - MESON_PIN(BOOT_17, 0), - MESON_PIN(BOOT_18, 0), + MESON_PIN(GPIOX_0), + MESON_PIN(GPIOX_1), + MESON_PIN(GPIOX_2), + MESON_PIN(GPIOX_3), + MESON_PIN(GPIOX_4), + MESON_PIN(GPIOX_5), + MESON_PIN(GPIOX_6), + MESON_PIN(GPIOX_7), + MESON_PIN(GPIOX_8), + MESON_PIN(GPIOX_9), + MESON_PIN(GPIOX_10), + MESON_PIN(GPIOX_11), + MESON_PIN(GPIOX_12), + MESON_PIN(GPIOX_13), + MESON_PIN(GPIOX_14), + MESON_PIN(GPIOX_15), + MESON_PIN(GPIOX_16), + MESON_PIN(GPIOX_17), + MESON_PIN(GPIOX_18), + MESON_PIN(GPIOX_19), + MESON_PIN(GPIOX_20), + MESON_PIN(GPIOX_21), + MESON_PIN(GPIOY_0), + MESON_PIN(GPIOY_1), + MESON_PIN(GPIOY_2), + MESON_PIN(GPIOY_3), + MESON_PIN(GPIOY_4), + MESON_PIN(GPIOY_5), + MESON_PIN(GPIOY_6), + MESON_PIN(GPIOY_7), + MESON_PIN(GPIOY_8), + MESON_PIN(GPIOY_9), + MESON_PIN(GPIOY_10), + MESON_PIN(GPIOY_11), + MESON_PIN(GPIOY_12), + MESON_PIN(GPIOY_13), + MESON_PIN(GPIOY_14), + MESON_PIN(GPIOY_15), + MESON_PIN(GPIOY_16), + MESON_PIN(GPIODV_0), + MESON_PIN(GPIODV_1), + MESON_PIN(GPIODV_2), + MESON_PIN(GPIODV_3), + MESON_PIN(GPIODV_4), + MESON_PIN(GPIODV_5), + MESON_PIN(GPIODV_6), + MESON_PIN(GPIODV_7), + MESON_PIN(GPIODV_8), + MESON_PIN(GPIODV_9), + MESON_PIN(GPIODV_10), + MESON_PIN(GPIODV_11), + MESON_PIN(GPIODV_12), + MESON_PIN(GPIODV_13), + MESON_PIN(GPIODV_14), + MESON_PIN(GPIODV_15), + MESON_PIN(GPIODV_16), + MESON_PIN(GPIODV_17), + MESON_PIN(GPIODV_18), + MESON_PIN(GPIODV_19), + MESON_PIN(GPIODV_20), + MESON_PIN(GPIODV_21), + MESON_PIN(GPIODV_22), + MESON_PIN(GPIODV_23), + MESON_PIN(GPIODV_24), + MESON_PIN(GPIODV_25), + MESON_PIN(GPIODV_26), + MESON_PIN(GPIODV_27), + MESON_PIN(GPIODV_28), + MESON_PIN(GPIODV_29), + MESON_PIN(GPIOH_0), + MESON_PIN(GPIOH_1), + MESON_PIN(GPIOH_2), + MESON_PIN(GPIOH_3), + MESON_PIN(GPIOH_4), + MESON_PIN(GPIOH_5), + MESON_PIN(GPIOH_6), + MESON_PIN(GPIOH_7), + MESON_PIN(GPIOH_8), + MESON_PIN(GPIOH_9), + MESON_PIN(GPIOZ_0), + MESON_PIN(GPIOZ_1), + MESON_PIN(GPIOZ_2), + MESON_PIN(GPIOZ_3), + MESON_PIN(GPIOZ_4), + MESON_PIN(GPIOZ_5), + MESON_PIN(GPIOZ_6), + MESON_PIN(GPIOZ_7), + MESON_PIN(GPIOZ_8), + MESON_PIN(GPIOZ_9), + MESON_PIN(GPIOZ_10), + MESON_PIN(GPIOZ_11), + MESON_PIN(GPIOZ_12), + MESON_PIN(GPIOZ_13), + MESON_PIN(GPIOZ_14), + MESON_PIN(CARD_0), + MESON_PIN(CARD_1), + MESON_PIN(CARD_2), + MESON_PIN(CARD_3), + MESON_PIN(CARD_4), + MESON_PIN(CARD_5), + MESON_PIN(CARD_6), + MESON_PIN(BOOT_0), + MESON_PIN(BOOT_1), + MESON_PIN(BOOT_2), + MESON_PIN(BOOT_3), + MESON_PIN(BOOT_4), + MESON_PIN(BOOT_5), + MESON_PIN(BOOT_6), + MESON_PIN(BOOT_7), + MESON_PIN(BOOT_8), + MESON_PIN(BOOT_9), + MESON_PIN(BOOT_10), + MESON_PIN(BOOT_11), + MESON_PIN(BOOT_12), + MESON_PIN(BOOT_13), + MESON_PIN(BOOT_14), + MESON_PIN(BOOT_15), + MESON_PIN(BOOT_16), + MESON_PIN(BOOT_17), + MESON_PIN(BOOT_18), }; static const struct pinctrl_pin_desc meson8_aobus_pins[] = { - MESON_PIN(GPIOAO_0, AO_OFF), - MESON_PIN(GPIOAO_1, AO_OFF), - MESON_PIN(GPIOAO_2, AO_OFF), - MESON_PIN(GPIOAO_3, AO_OFF), - MESON_PIN(GPIOAO_4, AO_OFF), - MESON_PIN(GPIOAO_5, AO_OFF), - MESON_PIN(GPIOAO_6, AO_OFF), - MESON_PIN(GPIOAO_7, AO_OFF), - MESON_PIN(GPIOAO_8, AO_OFF), - MESON_PIN(GPIOAO_9, AO_OFF), - MESON_PIN(GPIOAO_10, AO_OFF), - MESON_PIN(GPIOAO_11, AO_OFF), - MESON_PIN(GPIOAO_12, AO_OFF), - MESON_PIN(GPIOAO_13, AO_OFF), - MESON_PIN(GPIO_BSD_EN, AO_OFF), - MESON_PIN(GPIO_TEST_N, AO_OFF), + MESON_PIN(GPIOAO_0), + MESON_PIN(GPIOAO_1), + MESON_PIN(GPIOAO_2), + MESON_PIN(GPIOAO_3), + MESON_PIN(GPIOAO_4), + MESON_PIN(GPIOAO_5), + MESON_PIN(GPIOAO_6), + MESON_PIN(GPIOAO_7), + MESON_PIN(GPIOAO_8), + MESON_PIN(GPIOAO_9), + MESON_PIN(GPIOAO_10), + MESON_PIN(GPIOAO_11), + MESON_PIN(GPIOAO_12), + MESON_PIN(GPIOAO_13), + MESON_PIN(GPIO_BSD_EN), + MESON_PIN(GPIO_TEST_N), }; /* bank X */ -static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) }; -static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) }; -static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) }; -static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) }; -static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; - -static const unsigned int sdxc_d0_a_pins[] = { PIN(GPIOX_0, 0) }; -static const unsigned int sdxc_d13_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0), - PIN(GPIOX_3, 0) }; -static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0), - PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) }; -static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; - -static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) }; -static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) }; -static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) }; -static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) }; - -static const unsigned int uart_tx_a0_pins[] = { PIN(GPIOX_4, 0) }; -static const unsigned int uart_rx_a0_pins[] = { PIN(GPIOX_5, 0) }; -static const unsigned int uart_cts_a0_pins[] = { PIN(GPIOX_6, 0) }; -static const unsigned int uart_rts_a0_pins[] = { PIN(GPIOX_7, 0) }; - -static const unsigned int uart_tx_a1_pins[] = { PIN(GPIOX_12, 0) }; -static const unsigned int uart_rx_a1_pins[] = { PIN(GPIOX_13, 0) }; -static const unsigned int uart_cts_a1_pins[] = { PIN(GPIOX_14, 0) }; -static const unsigned int uart_rts_a1_pins[] = { PIN(GPIOX_15, 0) }; - -static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) }; -static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) }; -static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) }; - -static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) }; -static const unsigned int iso7816_clk_pins[] = { PIN(GPIOX_18, 0) }; -static const unsigned int iso7816_data_pins[] = { PIN(GPIOX_19, 0) }; - -static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) }; - -static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) }; - -static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_11, 0) }; +static const unsigned int sd_d0_a_pins[] = { GPIOX_0 }; +static const unsigned int sd_d1_a_pins[] = { GPIOX_1 }; +static const unsigned int sd_d2_a_pins[] = { GPIOX_2 }; +static const unsigned int sd_d3_a_pins[] = { GPIOX_3 }; +static const unsigned int sd_clk_a_pins[] = { GPIOX_8 }; +static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 }; + +static const unsigned int sdxc_d0_a_pins[] = { GPIOX_0 }; +static const unsigned int sdxc_d13_a_pins[] = { GPIOX_1, GPIOX_2, GPIOX_3 }; +static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5, GPIOX_6, + GPIOX_7 }; +static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 }; +static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 }; + +static const unsigned int pcm_out_a_pins[] = { GPIOX_4 }; +static const unsigned int pcm_in_a_pins[] = { GPIOX_5 }; +static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 }; +static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 }; + +static const unsigned int uart_tx_a0_pins[] = { GPIOX_4 }; +static const unsigned int uart_rx_a0_pins[] = { GPIOX_5 }; +static const unsigned int uart_cts_a0_pins[] = { GPIOX_6 }; +static const unsigned int uart_rts_a0_pins[] = { GPIOX_7 }; + +static const unsigned int uart_tx_a1_pins[] = { GPIOX_12 }; +static const unsigned int uart_rx_a1_pins[] = { GPIOX_13 }; +static const unsigned int uart_cts_a1_pins[] = { GPIOX_14 }; +static const unsigned int uart_rts_a1_pins[] = { GPIOX_15 }; + +static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 }; +static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 }; +static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 }; +static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 }; + +static const unsigned int iso7816_det_pins[] = { GPIOX_16 }; +static const unsigned int iso7816_reset_pins[] = { GPIOX_17 }; +static const unsigned int iso7816_clk_pins[] = { GPIOX_18 }; +static const unsigned int iso7816_data_pins[] = { GPIOX_19 }; + +static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 }; +static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 }; + +static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 }; +static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 }; + +static const unsigned int pwm_e_pins[] = { GPIOX_10 }; +static const unsigned int pwm_b_x_pins[] = { GPIOX_11 }; /* bank Y */ -static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_0, 0) }; -static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_1, 0) }; -static const unsigned int uart_cts_c_pins[] = { PIN(GPIOY_2, 0) }; -static const unsigned int uart_rts_c_pins[] = { PIN(GPIOY_3, 0) }; +static const unsigned int uart_tx_c_pins[] = { GPIOY_0 }; +static const unsigned int uart_rx_c_pins[] = { GPIOY_1 }; +static const unsigned int uart_cts_c_pins[] = { GPIOY_2 }; +static const unsigned int uart_rts_c_pins[] = { GPIOY_3 }; -static const unsigned int pcm_out_b_pins[] = { PIN(GPIOY_4, 0) }; -static const unsigned int pcm_in_b_pins[] = { PIN(GPIOY_5, 0) }; -static const unsigned int pcm_fs_b_pins[] = { PIN(GPIOY_6, 0) }; -static const unsigned int pcm_clk_b_pins[] = { PIN(GPIOY_7, 0) }; +static const unsigned int pcm_out_b_pins[] = { GPIOY_4 }; +static const unsigned int pcm_in_b_pins[] = { GPIOY_5 }; +static const unsigned int pcm_fs_b_pins[] = { GPIOY_6 }; +static const unsigned int pcm_clk_b_pins[] = { GPIOY_7 }; -static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIOY_0, 0) }; -static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIOY_1, 0) }; +static const unsigned int i2c_sda_c0_pins[] = { GPIOY_0 }; +static const unsigned int i2c_sck_c0_pins[] = { GPIOY_1 }; -static const unsigned int pwm_a_y_pins[] = { PIN(GPIOY_16, 0) }; +static const unsigned int pwm_a_y_pins[] = { GPIOY_16 }; -static const unsigned int i2s_out_ch45_pins[] = { PIN(GPIOY_0, 0) }; -static const unsigned int i2s_out_ch23_pins[] = { PIN(GPIOY_1, 0) }; -static const unsigned int i2s_out_ch01_pins[] = { PIN(GPIOY_4, 0) }; -static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOY_5, 0) }; -static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOY_6, 0) }; -static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOY_7, 0) }; -static const unsigned int i2s_am_clk_pins[] = { PIN(GPIOY_8, 0) }; -static const unsigned int i2s_out_ch78_pins[] = { PIN(GPIOY_9, 0) }; +static const unsigned int i2s_out_ch45_pins[] = { GPIOY_0 }; +static const unsigned int i2s_out_ch23_pins[] = { GPIOY_1 }; +static const unsigned int i2s_out_ch01_pins[] = { GPIOY_4 }; +static const unsigned int i2s_in_ch01_pins[] = { GPIOY_5 }; +static const unsigned int i2s_lr_clk_in_pins[] = { GPIOY_6 }; +static const unsigned int i2s_ao_clk_in_pins[] = { GPIOY_7 }; +static const unsigned int i2s_am_clk_pins[] = { GPIOY_8 }; +static const unsigned int i2s_out_ch78_pins[] = { GPIOY_9 }; -static const unsigned int spdif_in_pins[] = { PIN(GPIOY_2, 0) }; -static const unsigned int spdif_out_pins[] = { PIN(GPIOY_3, 0) }; +static const unsigned int spdif_in_pins[] = { GPIOY_2 }; +static const unsigned int spdif_out_pins[] = { GPIOY_3 }; /* bank DV */ -static const unsigned int dvin_rgb_pins[] = { PIN(GPIODV_0, 0), PIN(GPIODV_1, 0), - PIN(GPIODV_2, 0), PIN(GPIODV_3, 0), - PIN(GPIODV_4, 0), PIN(GPIODV_5, 0), - PIN(GPIODV_6, 0), PIN(GPIODV_7, 0), - PIN(GPIODV_8, 0), PIN(GPIODV_9, 0), - PIN(GPIODV_10, 0), PIN(GPIODV_11, 0), - PIN(GPIODV_12, 0), PIN(GPIODV_13, 0), - PIN(GPIODV_14, 0), PIN(GPIODV_15, 0), - PIN(GPIODV_16, 0), PIN(GPIODV_17, 0), - PIN(GPIODV_18, 0), PIN(GPIODV_19, 0), - PIN(GPIODV_20, 0), PIN(GPIODV_21, 0), - PIN(GPIODV_22, 0), PIN(GPIODV_23, 0) }; -static const unsigned int dvin_vs_pins[] = { PIN(GPIODV_24, 0) }; -static const unsigned int dvin_hs_pins[] = { PIN(GPIODV_25, 0) }; -static const unsigned int dvin_clk_pins[] = { PIN(GPIODV_26, 0) }; -static const unsigned int dvin_de_pins[] = { PIN(GPIODV_27, 0) }; - -static const unsigned int enc_0_pins[] = { PIN(GPIODV_0, 0) }; -static const unsigned int enc_1_pins[] = { PIN(GPIODV_1, 0) }; -static const unsigned int enc_2_pins[] = { PIN(GPIODV_2, 0) }; -static const unsigned int enc_3_pins[] = { PIN(GPIODV_3, 0) }; -static const unsigned int enc_4_pins[] = { PIN(GPIODV_4, 0) }; -static const unsigned int enc_5_pins[] = { PIN(GPIODV_5, 0) }; -static const unsigned int enc_6_pins[] = { PIN(GPIODV_6, 0) }; -static const unsigned int enc_7_pins[] = { PIN(GPIODV_7, 0) }; -static const unsigned int enc_8_pins[] = { PIN(GPIODV_8, 0) }; -static const unsigned int enc_9_pins[] = { PIN(GPIODV_9, 0) }; -static const unsigned int enc_10_pins[] = { PIN(GPIODV_10, 0) }; -static const unsigned int enc_11_pins[] = { PIN(GPIODV_11, 0) }; -static const unsigned int enc_12_pins[] = { PIN(GPIODV_12, 0) }; -static const unsigned int enc_13_pins[] = { PIN(GPIODV_13, 0) }; -static const unsigned int enc_14_pins[] = { PIN(GPIODV_14, 0) }; -static const unsigned int enc_15_pins[] = { PIN(GPIODV_15, 0) }; -static const unsigned int enc_16_pins[] = { PIN(GPIODV_16, 0) }; -static const unsigned int enc_17_pins[] = { PIN(GPIODV_17, 0) }; - -static const unsigned int uart_tx_b1_pins[] = { PIN(GPIODV_24, 0) }; -static const unsigned int uart_rx_b1_pins[] = { PIN(GPIODV_25, 0) }; -static const unsigned int uart_cts_b1_pins[] = { PIN(GPIODV_26, 0) }; -static const unsigned int uart_rts_b1_pins[] = { PIN(GPIODV_27, 0) }; - -static const unsigned int vga_vs_pins[] = { PIN(GPIODV_24, 0) }; -static const unsigned int vga_hs_pins[] = { PIN(GPIODV_25, 0) }; - -static const unsigned int pwm_c_dv9_pins[] = { PIN(GPIODV_9, 0) }; -static const unsigned int pwm_c_dv29_pins[] = { PIN(GPIODV_29, 0) }; -static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) }; +static const unsigned int dvin_rgb_pins[] = { + GPIODV_0, GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, + GPIODV_6, GPIODV_7, GPIODV_8, GPIODV_9, GPIODV_10, GPIODV_11, + GPIODV_12, GPIODV_13, GPIODV_14, GPIODV_15, GPIODV_16, GPIODV_17, + GPIODV_18, GPIODV_19, GPIODV_20, GPIODV_21, GPIODV_22, GPIODV_23 +}; +static const unsigned int dvin_vs_pins[] = { GPIODV_24 }; +static const unsigned int dvin_hs_pins[] = { GPIODV_25 }; +static const unsigned int dvin_clk_pins[] = { GPIODV_26 }; +static const unsigned int dvin_de_pins[] = { GPIODV_27 }; + +static const unsigned int enc_0_pins[] = { GPIODV_0 }; +static const unsigned int enc_1_pins[] = { GPIODV_1 }; +static const unsigned int enc_2_pins[] = { GPIODV_2 }; +static const unsigned int enc_3_pins[] = { GPIODV_3 }; +static const unsigned int enc_4_pins[] = { GPIODV_4 }; +static const unsigned int enc_5_pins[] = { GPIODV_5 }; +static const unsigned int enc_6_pins[] = { GPIODV_6 }; +static const unsigned int enc_7_pins[] = { GPIODV_7 }; +static const unsigned int enc_8_pins[] = { GPIODV_8 }; +static const unsigned int enc_9_pins[] = { GPIODV_9 }; +static const unsigned int enc_10_pins[] = { GPIODV_10 }; +static const unsigned int enc_11_pins[] = { GPIODV_11 }; +static const unsigned int enc_12_pins[] = { GPIODV_12 }; +static const unsigned int enc_13_pins[] = { GPIODV_13 }; +static const unsigned int enc_14_pins[] = { GPIODV_14 }; +static const unsigned int enc_15_pins[] = { GPIODV_15 }; +static const unsigned int enc_16_pins[] = { GPIODV_16 }; +static const unsigned int enc_17_pins[] = { GPIODV_17 }; + +static const unsigned int uart_tx_b1_pins[] = { GPIODV_24 }; +static const unsigned int uart_rx_b1_pins[] = { GPIODV_25 }; +static const unsigned int uart_cts_b1_pins[] = { GPIODV_26 }; +static const unsigned int uart_rts_b1_pins[] = { GPIODV_27 }; + +static const unsigned int vga_vs_pins[] = { GPIODV_24 }; +static const unsigned int vga_hs_pins[] = { GPIODV_25 }; + +static const unsigned int pwm_c_dv9_pins[] = { GPIODV_9 }; +static const unsigned int pwm_c_dv29_pins[] = { GPIODV_29 }; +static const unsigned int pwm_d_pins[] = { GPIODV_28 }; /* bank H */ -static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) }; -static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) }; -static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) }; -static const unsigned int hdmi_cec_pins[] = { PIN(GPIOH_3, 0) }; +static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; +static const unsigned int hdmi_sda_pins[] = { GPIOH_1 }; +static const unsigned int hdmi_scl_pins[] = { GPIOH_2 }; +static const unsigned int hdmi_cec_pins[] = { GPIOH_3 }; -static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOH_3, 0) }; -static const unsigned int spi_miso_0_pins[] = { PIN(GPIOH_4, 0) }; -static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOH_5, 0) }; -static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOH_6, 0) }; +static const unsigned int spi_ss0_0_pins[] = { GPIOH_3 }; +static const unsigned int spi_miso_0_pins[] = { GPIOH_4 }; +static const unsigned int spi_mosi_0_pins[] = { GPIOH_5 }; +static const unsigned int spi_sclk_0_pins[] = { GPIOH_6 }; -static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) }; -static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) }; +static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 }; +static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 }; /* bank Z */ -static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOZ_9, 0) }; -static const unsigned int spi_ss1_1_pins[] = { PIN(GPIOZ_10, 0) }; -static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOZ_11, 0) }; -static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOZ_12, 0) }; -static const unsigned int spi_miso_1_pins[] = { PIN(GPIOZ_13, 0) }; -static const unsigned int spi_ss2_1_pins[] = { PIN(GPIOZ_14, 0) }; - -static const unsigned int eth_tx_clk_50m_pins[] = { PIN(GPIOZ_4, 0) }; -static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_5, 0) }; -static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_6, 0) }; -static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_7, 0) }; -static const unsigned int eth_rx_clk_in_pins[] = { PIN(GPIOZ_8, 0) }; -static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_9, 0) }; -static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_10, 0) }; -static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_11, 0) }; -static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_12, 0) }; -static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_13, 0) }; - -static const unsigned int i2c_sda_a0_pins[] = { PIN(GPIOZ_0, 0) }; -static const unsigned int i2c_sck_a0_pins[] = { PIN(GPIOZ_1, 0) }; - -static const unsigned int i2c_sda_b_pins[] = { PIN(GPIOZ_2, 0) }; -static const unsigned int i2c_sck_b_pins[] = { PIN(GPIOZ_3, 0) }; - -static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOZ_4, 0) }; -static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOZ_5, 0) }; - -static const unsigned int i2c_sda_a1_pins[] = { PIN(GPIOZ_0, 0) }; -static const unsigned int i2c_sck_a1_pins[] = { PIN(GPIOZ_1, 0) }; - -static const unsigned int i2c_sda_a2_pins[] = { PIN(GPIOZ_0, 0) }; -static const unsigned int i2c_sck_a2_pins[] = { PIN(GPIOZ_1, 0) }; - -static const unsigned int pwm_a_z0_pins[] = { PIN(GPIOZ_0, 0) }; -static const unsigned int pwm_a_z7_pins[] = { PIN(GPIOZ_7, 0) }; -static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_1, 0) }; -static const unsigned int pwm_c_z_pins[] = { PIN(GPIOZ_8, 0) }; +static const unsigned int spi_ss0_1_pins[] = { GPIOZ_9 }; +static const unsigned int spi_ss1_1_pins[] = { GPIOZ_10 }; +static const unsigned int spi_sclk_1_pins[] = { GPIOZ_11 }; +static const unsigned int spi_mosi_1_pins[] = { GPIOZ_12 }; +static const unsigned int spi_miso_1_pins[] = { GPIOZ_13 }; +static const unsigned int spi_ss2_1_pins[] = { GPIOZ_14 }; + +static const unsigned int eth_tx_clk_50m_pins[] = { GPIOZ_4 }; +static const unsigned int eth_tx_en_pins[] = { GPIOZ_5 }; +static const unsigned int eth_txd1_pins[] = { GPIOZ_6 }; +static const unsigned int eth_txd0_pins[] = { GPIOZ_7 }; +static const unsigned int eth_rx_clk_in_pins[] = { GPIOZ_8 }; +static const unsigned int eth_rx_dv_pins[] = { GPIOZ_9 }; +static const unsigned int eth_rxd1_pins[] = { GPIOZ_10 }; +static const unsigned int eth_rxd0_pins[] = { GPIOZ_11 }; +static const unsigned int eth_mdio_pins[] = { GPIOZ_12 }; +static const unsigned int eth_mdc_pins[] = { GPIOZ_13 }; + +static const unsigned int i2c_sda_a0_pins[] = { GPIOZ_0 }; +static const unsigned int i2c_sck_a0_pins[] = { GPIOZ_1 }; + +static const unsigned int i2c_sda_b_pins[] = { GPIOZ_2 }; +static const unsigned int i2c_sck_b_pins[] = { GPIOZ_3 }; + +static const unsigned int i2c_sda_c1_pins[] = { GPIOZ_4 }; +static const unsigned int i2c_sck_c1_pins[] = { GPIOZ_5 }; + +static const unsigned int i2c_sda_a1_pins[] = { GPIOZ_0 }; +static const unsigned int i2c_sck_a1_pins[] = { GPIOZ_1 }; + +static const unsigned int i2c_sda_a2_pins[] = { GPIOZ_0 }; +static const unsigned int i2c_sck_a2_pins[] = { GPIOZ_1 }; + +static const unsigned int pwm_a_z0_pins[] = { GPIOZ_0 }; +static const unsigned int pwm_a_z7_pins[] = { GPIOZ_7 }; +static const unsigned int pwm_b_z_pins[] = { GPIOZ_1 }; +static const unsigned int pwm_c_z_pins[] = { GPIOZ_8 }; /* bank BOOT */ -static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) }; -static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) }; -static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) }; -static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) }; -static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_16, 0) }; -static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_17, 0) }; - -static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)}; -static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0), - PIN(BOOT_3, 0) }; -static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0), - PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; -static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_16, 0) }; -static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_17, 0) }; - -static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0), - PIN(BOOT_2, 0), PIN(BOOT_3, 0), - PIN(BOOT_4, 0), PIN(BOOT_5, 0), - PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; -static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) }; -static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) }; -static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) }; -static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) }; -static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) }; -static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) }; -static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) }; -static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, 0) }; -static const unsigned int nand_ce2_pins[] = { PIN(BOOT_16, 0) }; -static const unsigned int nand_ce3_pins[] = { PIN(BOOT_17, 0) }; - -static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) }; -static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) }; -static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) }; -static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) }; +static const unsigned int sd_d0_c_pins[] = { BOOT_0 }; +static const unsigned int sd_d1_c_pins[] = { BOOT_1 }; +static const unsigned int sd_d2_c_pins[] = { BOOT_2 }; +static const unsigned int sd_d3_c_pins[] = { BOOT_3 }; +static const unsigned int sd_cmd_c_pins[] = { BOOT_16 }; +static const unsigned int sd_clk_c_pins[] = { BOOT_17 }; + +static const unsigned int sdxc_d0_c_pins[] = { BOOT_0}; +static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2, BOOT_3 }; +static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5, BOOT_6, + BOOT_7 }; +static const unsigned int sdxc_cmd_c_pins[] = { BOOT_16 }; +static const unsigned int sdxc_clk_c_pins[] = { BOOT_17 }; + +static const unsigned int nand_io_pins[] = { + BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7 +}; +static const unsigned int nand_io_ce0_pins[] = { BOOT_8 }; +static const unsigned int nand_io_ce1_pins[] = { BOOT_9 }; +static const unsigned int nand_io_rb0_pins[] = { BOOT_10 }; +static const unsigned int nand_ale_pins[] = { BOOT_11 }; +static const unsigned int nand_cle_pins[] = { BOOT_12 }; +static const unsigned int nand_wen_clk_pins[] = { BOOT_13 }; +static const unsigned int nand_ren_clk_pins[] = { BOOT_14 }; +static const unsigned int nand_dqs_pins[] = { BOOT_15 }; +static const unsigned int nand_ce2_pins[] = { BOOT_16 }; +static const unsigned int nand_ce3_pins[] = { BOOT_17 }; + +static const unsigned int nor_d_pins[] = { BOOT_11 }; +static const unsigned int nor_q_pins[] = { BOOT_12 }; +static const unsigned int nor_c_pins[] = { BOOT_13 }; +static const unsigned int nor_cs_pins[] = { BOOT_18 }; /* bank CARD */ -static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) }; -static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) }; -static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) }; -static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) }; -static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) }; -static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) }; - -static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0), - PIN(CARD_5, 0) }; -static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) }; -static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) }; -static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) }; +static const unsigned int sd_d1_b_pins[] = { CARD_0 }; +static const unsigned int sd_d0_b_pins[] = { CARD_1 }; +static const unsigned int sd_clk_b_pins[] = { CARD_2 }; +static const unsigned int sd_cmd_b_pins[] = { CARD_3 }; +static const unsigned int sd_d3_b_pins[] = { CARD_4 }; +static const unsigned int sd_d2_b_pins[] = { CARD_5 }; + +static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4, CARD_5 }; +static const unsigned int sdxc_d0_b_pins[] = { CARD_1 }; +static const unsigned int sdxc_clk_b_pins[] = { CARD_2 }; +static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 }; /* bank AO */ -static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) }; -static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) }; -static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) }; -static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) }; +static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; +static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 }; +static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 }; +static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 }; -static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) }; -static const unsigned int remote_output_ao_pins[] = { PIN(GPIOAO_13, AO_OFF) }; +static const unsigned int remote_input_pins[] = { GPIOAO_7 }; +static const unsigned int remote_output_ao_pins[] = { GPIOAO_13 }; -static const unsigned int i2c_slave_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int i2c_slave_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; +static const unsigned int i2c_slave_sck_ao_pins[] = { GPIOAO_4 }; +static const unsigned int i2c_slave_sda_ao_pins[] = { GPIOAO_5 }; -static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) }; -static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) }; +static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 }; +static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 }; -static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) }; +static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 }; +static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 }; -static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; +static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 }; +static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 }; -static const unsigned int pwm_f_ao_pins[] = { PIN(GPIO_TEST_N, AO_OFF) }; +static const unsigned int pwm_f_ao_pins[] = { GPIO_TEST_N }; -static const unsigned int i2s_am_clk_out_ao_pins[] = { PIN(GPIOAO_8, AO_OFF) }; -static const unsigned int i2s_ao_clk_out_ao_pins[] = { PIN(GPIOAO_9, AO_OFF) }; -static const unsigned int i2s_lr_clk_out_ao_pins[] = { PIN(GPIOAO_10, AO_OFF) }; -static const unsigned int i2s_out_ch01_ao_pins[] = { PIN(GPIOAO_11, AO_OFF) }; +static const unsigned int i2s_am_clk_out_ao_pins[] = { GPIOAO_8 }; +static const unsigned int i2s_ao_clk_out_ao_pins[] = { GPIOAO_9 }; +static const unsigned int i2s_lr_clk_out_ao_pins[] = { GPIOAO_10 }; +static const unsigned int i2s_out_ch01_ao_pins[] = { GPIOAO_11 }; -static const unsigned int hdmi_cec_ao_pins[] = { PIN(GPIOAO_12, AO_OFF) }; +static const unsigned int hdmi_cec_ao_pins[] = { GPIOAO_12 }; static struct meson_pmx_group meson8_cbus_groups[] = { - GPIO_GROUP(GPIOX_0, 0), - GPIO_GROUP(GPIOX_1, 0), - GPIO_GROUP(GPIOX_2, 0), - GPIO_GROUP(GPIOX_3, 0), - GPIO_GROUP(GPIOX_4, 0), - GPIO_GROUP(GPIOX_5, 0), - GPIO_GROUP(GPIOX_6, 0), - GPIO_GROUP(GPIOX_7, 0), - GPIO_GROUP(GPIOX_8, 0), - GPIO_GROUP(GPIOX_9, 0), - GPIO_GROUP(GPIOX_10, 0), - GPIO_GROUP(GPIOX_11, 0), - GPIO_GROUP(GPIOX_12, 0), - GPIO_GROUP(GPIOX_13, 0), - GPIO_GROUP(GPIOX_14, 0), - GPIO_GROUP(GPIOX_15, 0), - GPIO_GROUP(GPIOX_16, 0), - GPIO_GROUP(GPIOX_17, 0), - GPIO_GROUP(GPIOX_18, 0), - GPIO_GROUP(GPIOX_19, 0), - GPIO_GROUP(GPIOX_20, 0), - GPIO_GROUP(GPIOX_21, 0), - GPIO_GROUP(GPIOY_0, 0), - GPIO_GROUP(GPIOY_1, 0), - GPIO_GROUP(GPIOY_2, 0), - GPIO_GROUP(GPIOY_3, 0), - GPIO_GROUP(GPIOY_4, 0), - GPIO_GROUP(GPIOY_5, 0), - GPIO_GROUP(GPIOY_6, 0), - GPIO_GROUP(GPIOY_7, 0), - GPIO_GROUP(GPIOY_8, 0), - GPIO_GROUP(GPIOY_9, 0), - GPIO_GROUP(GPIOY_10, 0), - GPIO_GROUP(GPIOY_11, 0), - GPIO_GROUP(GPIOY_12, 0), - GPIO_GROUP(GPIOY_13, 0), - GPIO_GROUP(GPIOY_14, 0), - GPIO_GROUP(GPIOY_15, 0), - GPIO_GROUP(GPIOY_16, 0), - GPIO_GROUP(GPIODV_0, 0), - GPIO_GROUP(GPIODV_1, 0), - GPIO_GROUP(GPIODV_2, 0), - GPIO_GROUP(GPIODV_3, 0), - GPIO_GROUP(GPIODV_4, 0), - GPIO_GROUP(GPIODV_5, 0), - GPIO_GROUP(GPIODV_6, 0), - GPIO_GROUP(GPIODV_7, 0), - GPIO_GROUP(GPIODV_8, 0), - GPIO_GROUP(GPIODV_9, 0), - GPIO_GROUP(GPIODV_10, 0), - GPIO_GROUP(GPIODV_11, 0), - GPIO_GROUP(GPIODV_12, 0), - GPIO_GROUP(GPIODV_13, 0), - GPIO_GROUP(GPIODV_14, 0), - GPIO_GROUP(GPIODV_15, 0), - GPIO_GROUP(GPIODV_16, 0), - GPIO_GROUP(GPIODV_17, 0), - GPIO_GROUP(GPIODV_18, 0), - GPIO_GROUP(GPIODV_19, 0), - GPIO_GROUP(GPIODV_20, 0), - GPIO_GROUP(GPIODV_21, 0), - GPIO_GROUP(GPIODV_22, 0), - GPIO_GROUP(GPIODV_23, 0), - GPIO_GROUP(GPIODV_24, 0), - GPIO_GROUP(GPIODV_25, 0), - GPIO_GROUP(GPIODV_26, 0), - GPIO_GROUP(GPIODV_27, 0), - GPIO_GROUP(GPIODV_28, 0), - GPIO_GROUP(GPIODV_29, 0), - GPIO_GROUP(GPIOH_0, 0), - GPIO_GROUP(GPIOH_1, 0), - GPIO_GROUP(GPIOH_2, 0), - GPIO_GROUP(GPIOH_3, 0), - GPIO_GROUP(GPIOH_4, 0), - GPIO_GROUP(GPIOH_5, 0), - GPIO_GROUP(GPIOH_6, 0), - GPIO_GROUP(GPIOH_7, 0), - GPIO_GROUP(GPIOH_8, 0), - GPIO_GROUP(GPIOH_9, 0), - GPIO_GROUP(GPIOZ_0, 0), - GPIO_GROUP(GPIOZ_1, 0), - GPIO_GROUP(GPIOZ_2, 0), - GPIO_GROUP(GPIOZ_3, 0), - GPIO_GROUP(GPIOZ_4, 0), - GPIO_GROUP(GPIOZ_5, 0), - GPIO_GROUP(GPIOZ_6, 0), - GPIO_GROUP(GPIOZ_7, 0), - GPIO_GROUP(GPIOZ_8, 0), - GPIO_GROUP(GPIOZ_9, 0), - GPIO_GROUP(GPIOZ_10, 0), - GPIO_GROUP(GPIOZ_11, 0), - GPIO_GROUP(GPIOZ_12, 0), - GPIO_GROUP(GPIOZ_13, 0), - GPIO_GROUP(GPIOZ_14, 0), + GPIO_GROUP(GPIOX_0), + GPIO_GROUP(GPIOX_1), + GPIO_GROUP(GPIOX_2), + GPIO_GROUP(GPIOX_3), + GPIO_GROUP(GPIOX_4), + GPIO_GROUP(GPIOX_5), + GPIO_GROUP(GPIOX_6), + GPIO_GROUP(GPIOX_7), + GPIO_GROUP(GPIOX_8), + GPIO_GROUP(GPIOX_9), + GPIO_GROUP(GPIOX_10), + GPIO_GROUP(GPIOX_11), + GPIO_GROUP(GPIOX_12), + GPIO_GROUP(GPIOX_13), + GPIO_GROUP(GPIOX_14), + GPIO_GROUP(GPIOX_15), + GPIO_GROUP(GPIOX_16), + GPIO_GROUP(GPIOX_17), + GPIO_GROUP(GPIOX_18), + GPIO_GROUP(GPIOX_19), + GPIO_GROUP(GPIOX_20), + GPIO_GROUP(GPIOX_21), + GPIO_GROUP(GPIOY_0), + GPIO_GROUP(GPIOY_1), + GPIO_GROUP(GPIOY_2), + GPIO_GROUP(GPIOY_3), + GPIO_GROUP(GPIOY_4), + GPIO_GROUP(GPIOY_5), + GPIO_GROUP(GPIOY_6), + GPIO_GROUP(GPIOY_7), + GPIO_GROUP(GPIOY_8), + GPIO_GROUP(GPIOY_9), + GPIO_GROUP(GPIOY_10), + GPIO_GROUP(GPIOY_11), + GPIO_GROUP(GPIOY_12), + GPIO_GROUP(GPIOY_13), + GPIO_GROUP(GPIOY_14), + GPIO_GROUP(GPIOY_15), + GPIO_GROUP(GPIOY_16), + GPIO_GROUP(GPIODV_0), + GPIO_GROUP(GPIODV_1), + GPIO_GROUP(GPIODV_2), + GPIO_GROUP(GPIODV_3), + GPIO_GROUP(GPIODV_4), + GPIO_GROUP(GPIODV_5), + GPIO_GROUP(GPIODV_6), + GPIO_GROUP(GPIODV_7), + GPIO_GROUP(GPIODV_8), + GPIO_GROUP(GPIODV_9), + GPIO_GROUP(GPIODV_10), + GPIO_GROUP(GPIODV_11), + GPIO_GROUP(GPIODV_12), + GPIO_GROUP(GPIODV_13), + GPIO_GROUP(GPIODV_14), + GPIO_GROUP(GPIODV_15), + GPIO_GROUP(GPIODV_16), + GPIO_GROUP(GPIODV_17), + GPIO_GROUP(GPIODV_18), + GPIO_GROUP(GPIODV_19), + GPIO_GROUP(GPIODV_20), + GPIO_GROUP(GPIODV_21), + GPIO_GROUP(GPIODV_22), + GPIO_GROUP(GPIODV_23), + GPIO_GROUP(GPIODV_24), + GPIO_GROUP(GPIODV_25), + GPIO_GROUP(GPIODV_26), + GPIO_GROUP(GPIODV_27), + GPIO_GROUP(GPIODV_28), + GPIO_GROUP(GPIODV_29), + GPIO_GROUP(GPIOH_0), + GPIO_GROUP(GPIOH_1), + GPIO_GROUP(GPIOH_2), + GPIO_GROUP(GPIOH_3), + GPIO_GROUP(GPIOH_4), + GPIO_GROUP(GPIOH_5), + GPIO_GROUP(GPIOH_6), + GPIO_GROUP(GPIOH_7), + GPIO_GROUP(GPIOH_8), + GPIO_GROUP(GPIOH_9), + GPIO_GROUP(GPIOZ_0), + GPIO_GROUP(GPIOZ_1), + GPIO_GROUP(GPIOZ_2), + GPIO_GROUP(GPIOZ_3), + GPIO_GROUP(GPIOZ_4), + GPIO_GROUP(GPIOZ_5), + GPIO_GROUP(GPIOZ_6), + GPIO_GROUP(GPIOZ_7), + GPIO_GROUP(GPIOZ_8), + GPIO_GROUP(GPIOZ_9), + GPIO_GROUP(GPIOZ_10), + GPIO_GROUP(GPIOZ_11), + GPIO_GROUP(GPIOZ_12), + GPIO_GROUP(GPIOZ_13), + GPIO_GROUP(GPIOZ_14), /* bank X */ GROUP(sd_d0_a, 8, 5), @@ -727,22 +715,22 @@ static struct meson_pmx_group meson8_cbus_groups[] = { }; static struct meson_pmx_group meson8_aobus_groups[] = { - GPIO_GROUP(GPIOAO_0, AO_OFF), - GPIO_GROUP(GPIOAO_1, AO_OFF), - GPIO_GROUP(GPIOAO_2, AO_OFF), - GPIO_GROUP(GPIOAO_3, AO_OFF), - GPIO_GROUP(GPIOAO_4, AO_OFF), - GPIO_GROUP(GPIOAO_5, AO_OFF), - GPIO_GROUP(GPIOAO_6, AO_OFF), - GPIO_GROUP(GPIOAO_7, AO_OFF), - GPIO_GROUP(GPIOAO_8, AO_OFF), - GPIO_GROUP(GPIOAO_9, AO_OFF), - GPIO_GROUP(GPIOAO_10, AO_OFF), - GPIO_GROUP(GPIOAO_11, AO_OFF), - GPIO_GROUP(GPIOAO_12, AO_OFF), - GPIO_GROUP(GPIOAO_13, AO_OFF), - GPIO_GROUP(GPIO_BSD_EN, AO_OFF), - GPIO_GROUP(GPIO_TEST_N, AO_OFF), + GPIO_GROUP(GPIOAO_0), + GPIO_GROUP(GPIOAO_1), + GPIO_GROUP(GPIOAO_2), + GPIO_GROUP(GPIOAO_3), + GPIO_GROUP(GPIOAO_4), + GPIO_GROUP(GPIOAO_5), + GPIO_GROUP(GPIOAO_6), + GPIO_GROUP(GPIOAO_7), + GPIO_GROUP(GPIOAO_8), + GPIO_GROUP(GPIOAO_9), + GPIO_GROUP(GPIOAO_10), + GPIO_GROUP(GPIOAO_11), + GPIO_GROUP(GPIOAO_12), + GPIO_GROUP(GPIOAO_13), + GPIO_GROUP(GPIO_BSD_EN), + GPIO_GROUP(GPIO_TEST_N), /* bank AO */ GROUP(uart_tx_ao_a, 0, 12), @@ -1041,19 +1029,19 @@ static struct meson_pmx_func meson8_aobus_functions[] = { }; static struct meson_bank meson8_cbus_banks[] = { - /* name first last irq pullen pull dir out in */ - BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 112, 133, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), - BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 95, 111, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), - BANK("DV", PIN(GPIODV_0, 0), PIN(GPIODV_29, 0), 65, 94, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), - BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 29, 38, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), - BANK("Z", PIN(GPIOZ_0, 0), PIN(GPIOZ_14, 0), 14, 28, 1, 0, 1, 0, 3, 17, 4, 17, 5, 17), - BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 58, 64, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), - BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 39, 57, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), + /* name first last irq pullen pull dir out in */ + BANK("X", GPIOX_0, GPIOX_21, 112, 133, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), + BANK("Y", GPIOY_0, GPIOY_16, 95, 111, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), + BANK("DV", GPIODV_0, GPIODV_29, 65, 94, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), + BANK("H", GPIOH_0, GPIOH_9, 29, 38, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), + BANK("Z", GPIOZ_0, GPIOZ_14, 14, 28, 1, 0, 1, 0, 3, 17, 4, 17, 5, 17), + BANK("CARD", CARD_0, CARD_6, 58, 64, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), + BANK("BOOT", BOOT_0, BOOT_18, 39, 57, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), }; static struct meson_bank meson8_aobus_banks[] = { - /* name first last irq pullen pull dir out in */ - BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), + /* name first last irq pullen pull dir out in */ + BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; struct meson_pinctrl_data meson8_cbus_pinctrl_data = { @@ -1071,7 +1059,7 @@ struct meson_pinctrl_data meson8_cbus_pinctrl_data = { struct meson_pinctrl_data meson8_aobus_pinctrl_data = { .name = "ao-bank", - .pin_base = 120, + .pin_base = 0, .pins = meson8_aobus_pins, .groups = meson8_aobus_groups, .funcs = meson8_aobus_functions, From patchwork Wed Sep 20 13:39:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 113126 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp690353edb; Wed, 20 Sep 2017 06:40:39 -0700 (PDT) X-Received: by 10.84.164.199 with SMTP id l7mr2114698plg.314.1505914838810; Wed, 20 Sep 2017 06:40:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505914838; cv=none; d=google.com; s=arc-20160816; b=z7Nf+b8Z8+SSuCDRxQ/lU1wHEIWSE7cT3e8B8V+HIzEF9GeMO5oB4ll5Vb5TZ95Z7I 6NEu+mTz4/TuvJXFtKLOwiB1JorTGPsaCO8hKprXdTa+zxzmdYtn51zTZomu4PStZ4hC 04ycQiCuqbitlO5gC2mh2s+Stp8+gNPM94KOkdzwvUGRok19GrqMCPfx/fslEdcsDdyo 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meson8b Date: Wed, 20 Sep 2017 15:39:24 +0200 Message-Id: <20170920133927.17390-6-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920133927.17390-1-jbrunet@baylibre.com> References: <20170920133927.17390-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson8b.c | 780 ++++++++++++++++---------------- 1 file changed, 388 insertions(+), 392 deletions(-) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c index 71f216b5b0b9..c3c247bfbc60 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8b.c +++ b/drivers/pinctrl/meson/pinctrl-meson8b.c @@ -15,407 +15,403 @@ #include #include "pinctrl-meson.h" -#define AO_OFF 130 - static const struct pinctrl_pin_desc meson8b_cbus_pins[] = { - MESON_PIN(GPIOX_0, 0), - MESON_PIN(GPIOX_1, 0), - MESON_PIN(GPIOX_2, 0), - MESON_PIN(GPIOX_3, 0), - MESON_PIN(GPIOX_4, 0), - MESON_PIN(GPIOX_5, 0), - MESON_PIN(GPIOX_6, 0), - MESON_PIN(GPIOX_7, 0), - MESON_PIN(GPIOX_8, 0), - MESON_PIN(GPIOX_9, 0), - MESON_PIN(GPIOX_10, 0), - MESON_PIN(GPIOX_11, 0), - MESON_PIN(GPIOX_16, 0), - MESON_PIN(GPIOX_17, 0), - MESON_PIN(GPIOX_18, 0), - MESON_PIN(GPIOX_19, 0), - MESON_PIN(GPIOX_20, 0), - MESON_PIN(GPIOX_21, 0), - - MESON_PIN(GPIOY_0, 0), - MESON_PIN(GPIOY_1, 0), - MESON_PIN(GPIOY_3, 0), - MESON_PIN(GPIOY_6, 0), - MESON_PIN(GPIOY_7, 0), - MESON_PIN(GPIOY_8, 0), - MESON_PIN(GPIOY_9, 0), - MESON_PIN(GPIOY_10, 0), - MESON_PIN(GPIOY_11, 0), - MESON_PIN(GPIOY_12, 0), - MESON_PIN(GPIOY_13, 0), - MESON_PIN(GPIOY_14, 0), - - MESON_PIN(GPIODV_9, 0), - MESON_PIN(GPIODV_24, 0), - MESON_PIN(GPIODV_25, 0), - MESON_PIN(GPIODV_26, 0), - MESON_PIN(GPIODV_27, 0), - MESON_PIN(GPIODV_28, 0), - MESON_PIN(GPIODV_29, 0), - - MESON_PIN(GPIOH_0, 0), - MESON_PIN(GPIOH_1, 0), - MESON_PIN(GPIOH_2, 0), - MESON_PIN(GPIOH_3, 0), - MESON_PIN(GPIOH_4, 0), - MESON_PIN(GPIOH_5, 0), - MESON_PIN(GPIOH_6, 0), - MESON_PIN(GPIOH_7, 0), - MESON_PIN(GPIOH_8, 0), - MESON_PIN(GPIOH_9, 0), - - MESON_PIN(CARD_0, 0), - MESON_PIN(CARD_1, 0), - MESON_PIN(CARD_2, 0), - MESON_PIN(CARD_3, 0), - MESON_PIN(CARD_4, 0), - MESON_PIN(CARD_5, 0), - MESON_PIN(CARD_6, 0), - - MESON_PIN(BOOT_0, 0), - MESON_PIN(BOOT_1, 0), - MESON_PIN(BOOT_2, 0), - MESON_PIN(BOOT_3, 0), - MESON_PIN(BOOT_4, 0), - MESON_PIN(BOOT_5, 0), - MESON_PIN(BOOT_6, 0), - MESON_PIN(BOOT_7, 0), - MESON_PIN(BOOT_8, 0), - MESON_PIN(BOOT_9, 0), - MESON_PIN(BOOT_10, 0), - MESON_PIN(BOOT_11, 0), - MESON_PIN(BOOT_12, 0), - MESON_PIN(BOOT_13, 0), - MESON_PIN(BOOT_14, 0), - MESON_PIN(BOOT_15, 0), - MESON_PIN(BOOT_16, 0), - MESON_PIN(BOOT_17, 0), - MESON_PIN(BOOT_18, 0), - - MESON_PIN(DIF_0_P, 0), - MESON_PIN(DIF_0_N, 0), - MESON_PIN(DIF_1_P, 0), - MESON_PIN(DIF_1_N, 0), - MESON_PIN(DIF_2_P, 0), - MESON_PIN(DIF_2_N, 0), - MESON_PIN(DIF_3_P, 0), - MESON_PIN(DIF_3_N, 0), - MESON_PIN(DIF_4_P, 0), - MESON_PIN(DIF_4_N, 0), + MESON_PIN(GPIOX_0), + MESON_PIN(GPIOX_1), + MESON_PIN(GPIOX_2), + MESON_PIN(GPIOX_3), + MESON_PIN(GPIOX_4), + MESON_PIN(GPIOX_5), + MESON_PIN(GPIOX_6), + MESON_PIN(GPIOX_7), + MESON_PIN(GPIOX_8), + MESON_PIN(GPIOX_9), + MESON_PIN(GPIOX_10), + MESON_PIN(GPIOX_11), + MESON_PIN(GPIOX_16), + MESON_PIN(GPIOX_17), + MESON_PIN(GPIOX_18), + MESON_PIN(GPIOX_19), + MESON_PIN(GPIOX_20), + MESON_PIN(GPIOX_21), + + MESON_PIN(GPIOY_0), + MESON_PIN(GPIOY_1), + MESON_PIN(GPIOY_3), + MESON_PIN(GPIOY_6), + MESON_PIN(GPIOY_7), + MESON_PIN(GPIOY_8), + MESON_PIN(GPIOY_9), + MESON_PIN(GPIOY_10), + MESON_PIN(GPIOY_11), + MESON_PIN(GPIOY_12), + MESON_PIN(GPIOY_13), + MESON_PIN(GPIOY_14), + + MESON_PIN(GPIODV_9), + MESON_PIN(GPIODV_24), + MESON_PIN(GPIODV_25), + MESON_PIN(GPIODV_26), + MESON_PIN(GPIODV_27), + MESON_PIN(GPIODV_28), + MESON_PIN(GPIODV_29), + + MESON_PIN(GPIOH_0), + MESON_PIN(GPIOH_1), + MESON_PIN(GPIOH_2), + MESON_PIN(GPIOH_3), + MESON_PIN(GPIOH_4), + MESON_PIN(GPIOH_5), + MESON_PIN(GPIOH_6), + MESON_PIN(GPIOH_7), + MESON_PIN(GPIOH_8), + MESON_PIN(GPIOH_9), + + MESON_PIN(CARD_0), + MESON_PIN(CARD_1), + MESON_PIN(CARD_2), + MESON_PIN(CARD_3), + MESON_PIN(CARD_4), + MESON_PIN(CARD_5), + MESON_PIN(CARD_6), + + MESON_PIN(BOOT_0), + MESON_PIN(BOOT_1), + MESON_PIN(BOOT_2), + MESON_PIN(BOOT_3), + MESON_PIN(BOOT_4), + MESON_PIN(BOOT_5), + MESON_PIN(BOOT_6), + MESON_PIN(BOOT_7), + MESON_PIN(BOOT_8), + MESON_PIN(BOOT_9), + MESON_PIN(BOOT_10), + MESON_PIN(BOOT_11), + MESON_PIN(BOOT_12), + MESON_PIN(BOOT_13), + MESON_PIN(BOOT_14), + MESON_PIN(BOOT_15), + MESON_PIN(BOOT_16), + MESON_PIN(BOOT_17), + MESON_PIN(BOOT_18), + + MESON_PIN(DIF_0_P), + MESON_PIN(DIF_0_N), + MESON_PIN(DIF_1_P), + MESON_PIN(DIF_1_N), + MESON_PIN(DIF_2_P), + MESON_PIN(DIF_2_N), + MESON_PIN(DIF_3_P), + MESON_PIN(DIF_3_N), + MESON_PIN(DIF_4_P), + MESON_PIN(DIF_4_N), }; static const struct pinctrl_pin_desc meson8b_aobus_pins[] = { - MESON_PIN(GPIOAO_0, AO_OFF), - MESON_PIN(GPIOAO_1, AO_OFF), - MESON_PIN(GPIOAO_2, AO_OFF), - MESON_PIN(GPIOAO_3, AO_OFF), - MESON_PIN(GPIOAO_4, AO_OFF), - MESON_PIN(GPIOAO_5, AO_OFF), - MESON_PIN(GPIOAO_6, AO_OFF), - MESON_PIN(GPIOAO_7, AO_OFF), - MESON_PIN(GPIOAO_8, AO_OFF), - MESON_PIN(GPIOAO_9, AO_OFF), - MESON_PIN(GPIOAO_10, AO_OFF), - MESON_PIN(GPIOAO_11, AO_OFF), - MESON_PIN(GPIOAO_12, AO_OFF), - MESON_PIN(GPIOAO_13, AO_OFF), + MESON_PIN(GPIOAO_0), + MESON_PIN(GPIOAO_1), + MESON_PIN(GPIOAO_2), + MESON_PIN(GPIOAO_3), + MESON_PIN(GPIOAO_4), + MESON_PIN(GPIOAO_5), + MESON_PIN(GPIOAO_6), + MESON_PIN(GPIOAO_7), + MESON_PIN(GPIOAO_8), + MESON_PIN(GPIOAO_9), + MESON_PIN(GPIOAO_10), + MESON_PIN(GPIOAO_11), + MESON_PIN(GPIOAO_12), + MESON_PIN(GPIOAO_13), /* * The following 2 pins are not mentionned in the public datasheet * According to this datasheet, they can't be used with the gpio * interrupt controller */ - MESON_PIN(GPIO_BSD_EN, AO_OFF), - MESON_PIN(GPIO_TEST_N, AO_OFF), + MESON_PIN(GPIO_BSD_EN), + MESON_PIN(GPIO_TEST_N), }; /* bank X */ -static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) }; -static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) }; -static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) }; -static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) }; -static const unsigned int sdxc_d0_0_a_pins[] = { PIN(GPIOX_4, 0) }; -static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0), - PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) }; -static const unsigned int sdxc_d13_0_a_pins[] = { PIN(GPIOX_5, 0), PIN(GPIOX_6, 0), - PIN(GPIOX_7, 0) }; -static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; -static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) }; -static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) }; -static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) }; -static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) }; - -static const unsigned int sdxc_d0_1_a_pins[] = { PIN(GPIOX_0, 0) }; -static const unsigned int sdxc_d13_1_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0), - PIN(GPIOX_3, 0) }; -static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) }; -static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) }; -static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) }; -static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) }; -static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; -static const unsigned int pwm_vs_0_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int pwm_e_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int pwm_vs_1_pins[] = { PIN(GPIOX_11, 0) }; - -static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_4, 0) }; -static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_5, 0) }; -static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_6, 0) }; -static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_7, 0) }; -static const unsigned int uart_tx_b1_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int uart_rx_b1_pins[] = { PIN(GPIOX_9, 0) }; -static const unsigned int uart_cts_b1_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int uart_rts_b1_pins[] = { PIN(GPIOX_20, 0) }; - -static const unsigned int iso7816_0_clk_pins[] = { PIN(GPIOX_6, 0) }; -static const unsigned int iso7816_0_data_pins[] = { PIN(GPIOX_7, 0) }; -static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int spi_miso_0_pins[] = { PIN(GPIOX_9, 0) }; -static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) }; -static const unsigned int iso7816_1_clk_pins[] = { PIN(GPIOX_18, 0) }; -static const unsigned int iso7816_1_data_pins[] = { PIN(GPIOX_19, 0) }; -static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOX_20, 0) }; - -static const unsigned int tsin_clk_b_pins[] = { PIN(GPIOX_8, 0) }; -static const unsigned int tsin_sop_b_pins[] = { PIN(GPIOX_9, 0) }; -static const unsigned int tsin_d0_b_pins[] = { PIN(GPIOX_10, 0) }; -static const unsigned int pwm_b_pins[] = { PIN(GPIOX_11, 0) }; -static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) }; -static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) }; -static const unsigned int tsin_d_valid_b_pins[] = { PIN(GPIOX_20, 0) }; +static const unsigned int sd_d0_a_pins[] = { GPIOX_0 }; +static const unsigned int sd_d1_a_pins[] = { GPIOX_1 }; +static const unsigned int sd_d2_a_pins[] = { GPIOX_2 }; +static const unsigned int sd_d3_a_pins[] = { GPIOX_3 }; +static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 }; +static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5, + GPIOX_6, GPIOX_7 }; +static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6, + GPIOX_7 }; +static const unsigned int sd_clk_a_pins[] = { GPIOX_8 }; +static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 }; +static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 }; +static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 }; +static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 }; +static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 }; +static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 }; +static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 }; + +static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 }; +static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1, GPIOX_2, + GPIOX_3 }; +static const unsigned int pcm_out_a_pins[] = { GPIOX_4 }; +static const unsigned int pcm_in_a_pins[] = { GPIOX_5 }; +static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 }; +static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 }; +static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 }; +static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 }; +static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 }; +static const unsigned int pwm_e_pins[] = { GPIOX_10 }; +static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 }; + +static const unsigned int uart_tx_a_pins[] = { GPIOX_4 }; +static const unsigned int uart_rx_a_pins[] = { GPIOX_5 }; +static const unsigned int uart_cts_a_pins[] = { GPIOX_6 }; +static const unsigned int uart_rts_a_pins[] = { GPIOX_7 }; +static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 }; +static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 }; +static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 }; +static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 }; + +static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 }; +static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 }; +static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 }; +static const unsigned int spi_miso_0_pins[] = { GPIOX_9 }; +static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 }; +static const unsigned int iso7816_det_pins[] = { GPIOX_16 }; +static const unsigned int iso7816_reset_pins[] = { GPIOX_17 }; +static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 }; +static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 }; +static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 }; + +static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 }; +static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 }; +static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 }; +static const unsigned int pwm_b_pins[] = { GPIOX_11 }; +static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 }; +static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 }; +static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 }; /* bank Y */ -static const unsigned int tsin_d_valid_a_pins[] = { PIN(GPIOY_0, 0) }; -static const unsigned int tsin_sop_a_pins[] = { PIN(GPIOY_1, 0) }; -static const unsigned int tsin_d17_a_pins[] = { PIN(GPIOY_6, 0), PIN(GPIOY_7, 0), - PIN(GPIOY_10, 0), PIN(GPIOY_11, 0), - PIN(GPIOY_12, 0), PIN(GPIOY_13, 0), - PIN(GPIOY_14, 0) }; -static const unsigned int tsin_clk_a_pins[] = { PIN(GPIOY_8, 0) }; -static const unsigned int tsin_d0_a_pins[] = { PIN(GPIOY_9, 0) }; +static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 }; +static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 }; +static const unsigned int tsin_d17_a_pins[] = { + GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14, +}; +static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 }; +static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 }; -static const unsigned int spdif_out_0_pins[] = { PIN(GPIOY_3, 0) }; +static const unsigned int spdif_out_0_pins[] = { GPIOY_3 }; -static const unsigned int xtal_24m_pins[] = { PIN(GPIOY_3, 0) }; -static const unsigned int iso7816_2_clk_pins[] = { PIN(GPIOY_13, 0) }; -static const unsigned int iso7816_2_data_pins[] = { PIN(GPIOY_14, 0) }; +static const unsigned int xtal_24m_pins[] = { GPIOY_3 }; +static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 }; +static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 }; /* bank DV */ -static const unsigned int pwm_d_pins[] = { PIN(GPIODV_28, 0) }; -static const unsigned int pwm_c0_pins[] = { PIN(GPIODV_29, 0) }; +static const unsigned int pwm_d_pins[] = { GPIODV_28 }; +static const unsigned int pwm_c0_pins[] = { GPIODV_29 }; -static const unsigned int pwm_vs_2_pins[] = { PIN(GPIODV_9, 0) }; -static const unsigned int pwm_vs_3_pins[] = { PIN(GPIODV_28, 0) }; -static const unsigned int pwm_vs_4_pins[] = { PIN(GPIODV_29, 0) }; +static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 }; +static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 }; +static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 }; -static const unsigned int xtal24_out_pins[] = { PIN(GPIODV_29, 0) }; +static const unsigned int xtal24_out_pins[] = { GPIODV_29 }; -static const unsigned int uart_tx_c_pins[] = { PIN(GPIODV_24, 0) }; -static const unsigned int uart_rx_c_pins[] = { PIN(GPIODV_25, 0) }; -static const unsigned int uart_cts_c_pins[] = { PIN(GPIODV_26, 0) }; -static const unsigned int uart_rts_c_pins[] = { PIN(GPIODV_27, 0) }; +static const unsigned int uart_tx_c_pins[] = { GPIODV_24 }; +static const unsigned int uart_rx_c_pins[] = { GPIODV_25 }; +static const unsigned int uart_cts_c_pins[] = { GPIODV_26 }; +static const unsigned int uart_rts_c_pins[] = { GPIODV_27 }; -static const unsigned int pwm_c1_pins[] = { PIN(GPIODV_9, 0) }; +static const unsigned int pwm_c1_pins[] = { GPIODV_9 }; -static const unsigned int i2c_sda_a_pins[] = { PIN(GPIODV_24, 0) }; -static const unsigned int i2c_sck_a_pins[] = { PIN(GPIODV_25, 0) }; -static const unsigned int i2c_sda_b0_pins[] = { PIN(GPIODV_26, 0) }; -static const unsigned int i2c_sck_b0_pins[] = { PIN(GPIODV_27, 0) }; -static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIODV_28, 0) }; -static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIODV_29, 0) }; +static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 }; +static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 }; +static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 }; +static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 }; +static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 }; +static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 }; /* bank H */ -static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) }; -static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) }; -static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) }; -static const unsigned int hdmi_cec_0_pins[] = { PIN(GPIOH_3, 0) }; -static const unsigned int eth_txd1_0_pins[] = { PIN(GPIOH_5, 0) }; -static const unsigned int eth_txd0_0_pins[] = { PIN(GPIOH_6, 0) }; -static const unsigned int clk_24m_out_pins[] = { PIN(GPIOH_9, 0) }; - -static const unsigned int spi_ss1_pins[] = { PIN(GPIOH_0, 0) }; -static const unsigned int spi_ss2_pins[] = { PIN(GPIOH_1, 0) }; -static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOH_3, 0) }; -static const unsigned int spi_miso_1_pins[] = { PIN(GPIOH_4, 0) }; -static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOH_5, 0) }; -static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOH_6, 0) }; - -static const unsigned int eth_txd3_pins[] = { PIN(GPIOH_7, 0) }; -static const unsigned int eth_txd2_pins[] = { PIN(GPIOH_8, 0) }; -static const unsigned int eth_tx_clk_pins[] = { PIN(GPIOH_9, 0) }; - -static const unsigned int i2c_sda_b1_pins[] = { PIN(GPIOH_3, 0) }; -static const unsigned int i2c_sck_b1_pins[] = { PIN(GPIOH_4, 0) }; -static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOH_5, 0) }; -static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOH_6, 0) }; -static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) }; -static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) }; +static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; +static const unsigned int hdmi_sda_pins[] = { GPIOH_1 }; +static const unsigned int hdmi_scl_pins[] = { GPIOH_2 }; +static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 }; +static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 }; +static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 }; +static const unsigned int clk_24m_out_pins[] = { GPIOH_9 }; + +static const unsigned int spi_ss1_pins[] = { GPIOH_0 }; +static const unsigned int spi_ss2_pins[] = { GPIOH_1 }; +static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 }; +static const unsigned int spi_miso_1_pins[] = { GPIOH_4 }; +static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 }; +static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 }; + +static const unsigned int eth_txd3_pins[] = { GPIOH_7 }; +static const unsigned int eth_txd2_pins[] = { GPIOH_8 }; +static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 }; + +static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 }; +static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 }; +static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 }; +static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 }; +static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 }; +static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 }; /* bank BOOT */ -static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0), - PIN(BOOT_2, 0), PIN(BOOT_3, 0), - PIN(BOOT_4, 0), PIN(BOOT_5, 0), - PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; -static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) }; -static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) }; -static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) }; -static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) }; -static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) }; -static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) }; -static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) }; -static const unsigned int nand_dqs_15_pins[] = { PIN(BOOT_15, 0) }; -static const unsigned int nand_dqs_18_pins[] = { PIN(BOOT_18, 0) }; - -static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)}; -static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0), - PIN(BOOT_3, 0) }; -static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0), - PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; -static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_8, 0) }; -static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_10, 0) }; -static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) }; -static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) }; -static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) }; -static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) }; - -static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) }; -static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) }; -static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) }; -static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) }; -static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_8, 0) }; -static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_10, 0) }; +static const unsigned int nand_io_pins[] = { + BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7 +}; +static const unsigned int nand_io_ce0_pins[] = { BOOT_8 }; +static const unsigned int nand_io_ce1_pins[] = { BOOT_9 }; +static const unsigned int nand_io_rb0_pins[] = { BOOT_10 }; +static const unsigned int nand_ale_pins[] = { BOOT_11 }; +static const unsigned int nand_cle_pins[] = { BOOT_12 }; +static const unsigned int nand_wen_clk_pins[] = { BOOT_13 }; +static const unsigned int nand_ren_clk_pins[] = { BOOT_14 }; +static const unsigned int nand_dqs_15_pins[] = { BOOT_15 }; +static const unsigned int nand_dqs_18_pins[] = { BOOT_18 }; + +static const unsigned int sdxc_d0_c_pins[] = { BOOT_0}; +static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2, + BOOT_3 }; +static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5, + BOOT_6, BOOT_7 }; +static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 }; +static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 }; +static const unsigned int nor_d_pins[] = { BOOT_11 }; +static const unsigned int nor_q_pins[] = { BOOT_12 }; +static const unsigned int nor_c_pins[] = { BOOT_13 }; +static const unsigned int nor_cs_pins[] = { BOOT_18 }; + +static const unsigned int sd_d0_c_pins[] = { BOOT_0 }; +static const unsigned int sd_d1_c_pins[] = { BOOT_1 }; +static const unsigned int sd_d2_c_pins[] = { BOOT_2 }; +static const unsigned int sd_d3_c_pins[] = { BOOT_3 }; +static const unsigned int sd_cmd_c_pins[] = { BOOT_8 }; +static const unsigned int sd_clk_c_pins[] = { BOOT_10 }; /* bank CARD */ -static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) }; -static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) }; -static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) }; -static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) }; -static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) }; -static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) }; - -static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0), - PIN(CARD_5, 0) }; -static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) }; -static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) }; -static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) }; +static const unsigned int sd_d1_b_pins[] = { CARD_0 }; +static const unsigned int sd_d0_b_pins[] = { CARD_1 }; +static const unsigned int sd_clk_b_pins[] = { CARD_2 }; +static const unsigned int sd_cmd_b_pins[] = { CARD_3 }; +static const unsigned int sd_d3_b_pins[] = { CARD_4 }; +static const unsigned int sd_d2_b_pins[] = { CARD_5 }; + +static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4, + CARD_5 }; +static const unsigned int sdxc_d0_b_pins[] = { CARD_1 }; +static const unsigned int sdxc_clk_b_pins[] = { CARD_2 }; +static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 }; /* bank AO */ -static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) }; -static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) }; -static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) }; -static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) }; -static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; -static const unsigned int clk_32k_in_out_pins[] = { PIN(GPIOAO_6, AO_OFF) }; -static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) }; -static const unsigned int hdmi_cec_1_pins[] = { PIN(GPIOAO_12, AO_OFF) }; -static const unsigned int ir_blaster_pins[] = { PIN(GPIOAO_13, AO_OFF) }; - -static const unsigned int pwm_c2_pins[] = { PIN(GPIOAO_3, AO_OFF) }; -static const unsigned int i2c_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int i2c_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; -static const unsigned int ir_remote_out_pins[] = { PIN(GPIOAO_7, AO_OFF) }; -static const unsigned int i2s_am_clk_out_pins[] = { PIN(GPIOAO_8, AO_OFF) }; -static const unsigned int i2s_ao_clk_out_pins[] = { PIN(GPIOAO_9, AO_OFF) }; -static const unsigned int i2s_lr_clk_out_pins[] = { PIN(GPIOAO_10, AO_OFF) }; -static const unsigned int i2s_out_01_pins[] = { PIN(GPIOAO_11, AO_OFF) }; - -static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) }; -static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) }; -static const unsigned int uart_cts_ao_b_pins[] = { PIN(GPIOAO_2, AO_OFF) }; -static const unsigned int uart_rts_ao_b_pins[] = { PIN(GPIOAO_3, AO_OFF) }; -static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) }; -static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) }; -static const unsigned int spdif_out_1_pins[] = { PIN(GPIOAO_6, AO_OFF) }; - -static const unsigned int i2s_in_ch01_pins[] = { PIN(GPIOAO_6, AO_OFF) }; -static const unsigned int i2s_ao_clk_in_pins[] = { PIN(GPIOAO_9, AO_OFF) }; -static const unsigned int i2s_lr_clk_in_pins[] = { PIN(GPIOAO_10, AO_OFF) }; +static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; +static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 }; +static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 }; +static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 }; +static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 }; +static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 }; +static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 }; +static const unsigned int remote_input_pins[] = { GPIOAO_7 }; +static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 }; +static const unsigned int ir_blaster_pins[] = { GPIOAO_13 }; + +static const unsigned int pwm_c2_pins[] = { GPIOAO_3 }; +static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 }; +static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 }; +static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 }; +static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 }; +static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 }; +static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 }; +static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 }; + +static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 }; +static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 }; +static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 }; +static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 }; +static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 }; +static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 }; +static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 }; + +static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 }; +static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 }; +static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 }; /* bank DIF */ -static const unsigned int eth_rxd1_pins[] = { PIN(DIF_0_P, 0) }; -static const unsigned int eth_rxd0_pins[] = { PIN(DIF_0_N, 0) }; -static const unsigned int eth_rx_dv_pins[] = { PIN(DIF_1_P, 0) }; -static const unsigned int eth_rx_clk_pins[] = { PIN(DIF_1_N, 0) }; -static const unsigned int eth_txd0_1_pins[] = { PIN(DIF_2_P, 0) }; -static const unsigned int eth_txd1_1_pins[] = { PIN(DIF_2_N, 0) }; -static const unsigned int eth_tx_en_pins[] = { PIN(DIF_3_P, 0) }; -static const unsigned int eth_ref_clk_pins[] = { PIN(DIF_3_N, 0) }; -static const unsigned int eth_mdc_pins[] = { PIN(DIF_4_P, 0) }; -static const unsigned int eth_mdio_en_pins[] = { PIN(DIF_4_N, 0) }; +static const unsigned int eth_rxd1_pins[] = { DIF_0_P }; +static const unsigned int eth_rxd0_pins[] = { DIF_0_N }; +static const unsigned int eth_rx_dv_pins[] = { DIF_1_P }; +static const unsigned int eth_rx_clk_pins[] = { DIF_1_N }; +static const unsigned int eth_txd0_1_pins[] = { DIF_2_P }; +static const unsigned int eth_txd1_1_pins[] = { DIF_2_N }; +static const unsigned int eth_tx_en_pins[] = { DIF_3_P }; +static const unsigned int eth_ref_clk_pins[] = { DIF_3_N }; +static const unsigned int eth_mdc_pins[] = { DIF_4_P }; +static const unsigned int eth_mdio_en_pins[] = { DIF_4_N }; static struct meson_pmx_group meson8b_cbus_groups[] = { - GPIO_GROUP(GPIOX_0, 0), - GPIO_GROUP(GPIOX_1, 0), - GPIO_GROUP(GPIOX_2, 0), - GPIO_GROUP(GPIOX_3, 0), - GPIO_GROUP(GPIOX_4, 0), - GPIO_GROUP(GPIOX_5, 0), - GPIO_GROUP(GPIOX_6, 0), - GPIO_GROUP(GPIOX_7, 0), - GPIO_GROUP(GPIOX_8, 0), - GPIO_GROUP(GPIOX_9, 0), - GPIO_GROUP(GPIOX_10, 0), - GPIO_GROUP(GPIOX_11, 0), - GPIO_GROUP(GPIOX_16, 0), - GPIO_GROUP(GPIOX_17, 0), - GPIO_GROUP(GPIOX_18, 0), - GPIO_GROUP(GPIOX_19, 0), - GPIO_GROUP(GPIOX_20, 0), - GPIO_GROUP(GPIOX_21, 0), - - GPIO_GROUP(GPIOY_0, 0), - GPIO_GROUP(GPIOY_1, 0), - GPIO_GROUP(GPIOY_3, 0), - GPIO_GROUP(GPIOY_6, 0), - GPIO_GROUP(GPIOY_7, 0), - GPIO_GROUP(GPIOY_8, 0), - GPIO_GROUP(GPIOY_9, 0), - GPIO_GROUP(GPIOY_10, 0), - GPIO_GROUP(GPIOY_11, 0), - GPIO_GROUP(GPIOY_12, 0), - GPIO_GROUP(GPIOY_13, 0), - GPIO_GROUP(GPIOY_14, 0), - - GPIO_GROUP(GPIODV_9, 0), - GPIO_GROUP(GPIODV_24, 0), - GPIO_GROUP(GPIODV_25, 0), - GPIO_GROUP(GPIODV_26, 0), - GPIO_GROUP(GPIODV_27, 0), - GPIO_GROUP(GPIODV_28, 0), - GPIO_GROUP(GPIODV_29, 0), - - GPIO_GROUP(GPIOH_0, 0), - GPIO_GROUP(GPIOH_1, 0), - GPIO_GROUP(GPIOH_2, 0), - GPIO_GROUP(GPIOH_3, 0), - GPIO_GROUP(GPIOH_4, 0), - GPIO_GROUP(GPIOH_5, 0), - GPIO_GROUP(GPIOH_6, 0), - GPIO_GROUP(GPIOH_7, 0), - GPIO_GROUP(GPIOH_8, 0), - GPIO_GROUP(GPIOH_9, 0), - - GPIO_GROUP(DIF_0_P, 0), - GPIO_GROUP(DIF_0_N, 0), - GPIO_GROUP(DIF_1_P, 0), - GPIO_GROUP(DIF_1_N, 0), - GPIO_GROUP(DIF_2_P, 0), - GPIO_GROUP(DIF_2_N, 0), - GPIO_GROUP(DIF_3_P, 0), - GPIO_GROUP(DIF_3_N, 0), - GPIO_GROUP(DIF_4_P, 0), - GPIO_GROUP(DIF_4_N, 0), + GPIO_GROUP(GPIOX_0), + GPIO_GROUP(GPIOX_1), + GPIO_GROUP(GPIOX_2), + GPIO_GROUP(GPIOX_3), + GPIO_GROUP(GPIOX_4), + GPIO_GROUP(GPIOX_5), + GPIO_GROUP(GPIOX_6), + GPIO_GROUP(GPIOX_7), + GPIO_GROUP(GPIOX_8), + GPIO_GROUP(GPIOX_9), + GPIO_GROUP(GPIOX_10), + GPIO_GROUP(GPIOX_11), + GPIO_GROUP(GPIOX_16), + GPIO_GROUP(GPIOX_17), + GPIO_GROUP(GPIOX_18), + GPIO_GROUP(GPIOX_19), + GPIO_GROUP(GPIOX_20), + GPIO_GROUP(GPIOX_21), + + GPIO_GROUP(GPIOY_0), + GPIO_GROUP(GPIOY_1), + GPIO_GROUP(GPIOY_3), + GPIO_GROUP(GPIOY_6), + GPIO_GROUP(GPIOY_7), + GPIO_GROUP(GPIOY_8), + GPIO_GROUP(GPIOY_9), + GPIO_GROUP(GPIOY_10), + GPIO_GROUP(GPIOY_11), + GPIO_GROUP(GPIOY_12), + GPIO_GROUP(GPIOY_13), + GPIO_GROUP(GPIOY_14), + + GPIO_GROUP(GPIODV_9), + GPIO_GROUP(GPIODV_24), + GPIO_GROUP(GPIODV_25), + GPIO_GROUP(GPIODV_26), + GPIO_GROUP(GPIODV_27), + GPIO_GROUP(GPIODV_28), + GPIO_GROUP(GPIODV_29), + + GPIO_GROUP(GPIOH_0), + GPIO_GROUP(GPIOH_1), + GPIO_GROUP(GPIOH_2), + GPIO_GROUP(GPIOH_3), + GPIO_GROUP(GPIOH_4), + GPIO_GROUP(GPIOH_5), + GPIO_GROUP(GPIOH_6), + GPIO_GROUP(GPIOH_7), + GPIO_GROUP(GPIOH_8), + GPIO_GROUP(GPIOH_9), + + GPIO_GROUP(DIF_0_P), + GPIO_GROUP(DIF_0_N), + GPIO_GROUP(DIF_1_P), + GPIO_GROUP(DIF_1_N), + GPIO_GROUP(DIF_2_P), + GPIO_GROUP(DIF_2_N), + GPIO_GROUP(DIF_3_P), + GPIO_GROUP(DIF_3_N), + GPIO_GROUP(DIF_4_P), + GPIO_GROUP(DIF_4_N), /* bank X */ GROUP(sd_d0_a, 8, 5), @@ -577,22 +573,22 @@ static struct meson_pmx_group meson8b_cbus_groups[] = { }; static struct meson_pmx_group meson8b_aobus_groups[] = { - GPIO_GROUP(GPIOAO_0, AO_OFF), - GPIO_GROUP(GPIOAO_1, AO_OFF), - GPIO_GROUP(GPIOAO_2, AO_OFF), - GPIO_GROUP(GPIOAO_3, AO_OFF), - GPIO_GROUP(GPIOAO_4, AO_OFF), - GPIO_GROUP(GPIOAO_5, AO_OFF), - GPIO_GROUP(GPIOAO_6, AO_OFF), - GPIO_GROUP(GPIOAO_7, AO_OFF), - GPIO_GROUP(GPIOAO_8, AO_OFF), - GPIO_GROUP(GPIOAO_9, AO_OFF), - GPIO_GROUP(GPIOAO_10, AO_OFF), - GPIO_GROUP(GPIOAO_11, AO_OFF), - GPIO_GROUP(GPIOAO_12, AO_OFF), - GPIO_GROUP(GPIOAO_13, AO_OFF), - GPIO_GROUP(GPIO_BSD_EN, AO_OFF), - GPIO_GROUP(GPIO_TEST_N, AO_OFF), + GPIO_GROUP(GPIOAO_0), + GPIO_GROUP(GPIOAO_1), + GPIO_GROUP(GPIOAO_2), + GPIO_GROUP(GPIOAO_3), + GPIO_GROUP(GPIOAO_4), + GPIO_GROUP(GPIOAO_5), + GPIO_GROUP(GPIOAO_6), + GPIO_GROUP(GPIOAO_7), + GPIO_GROUP(GPIOAO_8), + GPIO_GROUP(GPIOAO_9), + GPIO_GROUP(GPIOAO_10), + GPIO_GROUP(GPIOAO_11), + GPIO_GROUP(GPIOAO_12), + GPIO_GROUP(GPIOAO_13), + GPIO_GROUP(GPIO_BSD_EN), + GPIO_GROUP(GPIO_TEST_N), /* bank AO */ GROUP(uart_tx_ao_a, 0, 12), @@ -887,25 +883,25 @@ static struct meson_pmx_func meson8b_aobus_functions[] = { }; static struct meson_bank meson8b_cbus_banks[] = { - /* name first last irq pullen pull dir out in */ - BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 97, 118, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), - BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_14, 0), 80, 96, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), - BANK("DV", PIN(GPIODV_9, 0), PIN(GPIODV_29, 0), 59, 79, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), - BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), - BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), - BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), + /* name first last irq pullen pull dir out in */ + BANK("X", GPIOX_0, GPIOX_21, 97, 118, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), + BANK("Y", GPIOY_0, GPIOY_14, 80, 96, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), + BANK("DV", GPIODV_9, GPIODV_29, 59, 79, 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), + BANK("H", GPIOH_0, GPIOH_9, 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), + BANK("CARD", CARD_0, CARD_6, 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), + BANK("BOOT", BOOT_0, BOOT_18, 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), /* * The following bank is not mentionned in the public datasheet * There is no information whether it can be used with the gpio * interrupt controller */ - BANK("DIF", PIN(DIF_0_P, 0), PIN(DIF_4_N, 0), -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12), + BANK("DIF", DIF_0_P, DIF_4_N, -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12), }; static struct meson_bank meson8b_aobus_banks[] = { - /* name first last irq pullen pull dir out in */ - BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), + /* name first lastc irq pullen pull dir out in */ + BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { @@ -923,7 +919,7 @@ struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { .name = "aobus-banks", - .pin_base = 130, + .pin_base = 0, .pins = meson8b_aobus_pins, .groups = meson8b_aobus_groups, .funcs = meson8b_aobus_functions, From patchwork Wed Sep 20 13:39:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 113124 Delivered-To: patch@linaro.org Received: by 10.80.163.150 with SMTP id s22csp689772edb; Wed, 20 Sep 2017 06:40:02 -0700 (PDT) X-Received: by 10.101.93.132 with SMTP id f4mr2246981pgt.408.1505914802436; Wed, 20 Sep 2017 06:40:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505914802; cv=none; d=google.com; s=arc-20160816; b=r4DiC/kT4RQV2CAXxhobF7pqlGfDjMni3WyhLm8PFADXv87L1rHwFrUMwUFx0MWCPk aVgIpnghJpMgGX6+PNiDRkSZQTg/9PcTOUEKAy8IPXaSju8hHrb+bjH6Vo8aDIRpwtPE R9R4c+4l7XZodJ8blCXtqL77eFErrNqO9R0RyftJ6jmKQw893J5InhgeHKiWw6YHRsnY 6DQ9Q9L2rRcwXiMIuKLhsDHE2mHiKZ0m76IU0depsjnE/VlaeeRS1xdkWC5nc1Znn5kq iwW1WTgviYg/l75miBs+tUvYt3yq9QF/jpco326J1meNq8je7+4hpL7IKl1QRkroATUY lZgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=rh7olZQZpO9yhCEfzPqJjkHK3m4iek1g7j7EnBxz4TM=; b=goth8ikx5IJERp8wMiTbRrM45ve0Q5dq79rWygsgWVIuMdL2Ku71lDd33ePSvKRoRX wWP4V4Xax6tBQCyK8TBoJE6wqx5fLqXEKEZrB++CW8ZWWbjruLP5Z7dkOA+oojFIZgl8 Kky7FR/wuP7cLn9IS2asaWrMotz5JXgYx9IeAZG56vRTUnBnGEDhXHU74dEtNfGwnfXu VZJQYa8zH+8AVlviojlkL70Esy4oM90lZr+r8p39fGN7UCOfZBoubz12z7H95ubKfBvz v/HMbb1roFLo2s+bGfhg2aQDsV2Tk3w393BqBy//lO5dW/9GAY2VH3Nv3xs50RSNlwDb BcXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=1GbxRyVI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Move the pin to the appropriate controller Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 8 ++++---- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 8 ++++---- include/dt-bindings/gpio/meson-gxbb-gpio.h | 2 +- include/dt-bindings/gpio/meson-gxl-gpio.h | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 8e0d6e4a31b4..1305d68b0954 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -141,8 +141,6 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOCLK_1), MESON_PIN(GPIOCLK_2), MESON_PIN(GPIOCLK_3), - - MESON_PIN(GPIO_TEST_N), }; static const unsigned int emmc_nand_d07_pins[] = { @@ -258,6 +256,8 @@ static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_11), MESON_PIN(GPIOAO_12), MESON_PIN(GPIOAO_13), + + MESON_PIN(GPIO_TEST_N), }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; @@ -596,8 +596,6 @@ static const char * const gpio_periphs_groups[] = { "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", "GPIOX_20", "GPIOX_21", "GPIOX_22", - - "GPIO_TEST_N", }; static const char * const emmc_groups[] = { @@ -706,6 +704,8 @@ static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13", + + "GPIO_TEST_N", }; static const char * const uart_ao_groups[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 0d90ddab6ddd..04334e807170 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -122,8 +122,6 @@ static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { MESON_PIN(GPIOCLK_0), MESON_PIN(GPIOCLK_1), - - MESON_PIN(GPIO_TEST_N), }; static const unsigned int emmc_nand_d07_pins[] = { @@ -263,6 +261,8 @@ static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { MESON_PIN(GPIOAO_7), MESON_PIN(GPIOAO_8), MESON_PIN(GPIOAO_9), + + MESON_PIN(GPIO_TEST_N), }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; @@ -587,8 +587,6 @@ static const char * const gpio_periphs_groups[] = { "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", - - "GPIO_TEST_N", }; static const char * const emmc_groups[] = { @@ -703,6 +701,8 @@ static const char * const tsin_a_groups[] = { static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", + + "GPIO_TEST_N", }; static const char * const uart_ao_groups[] = { diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h index 58654fd7aa1e..43a68a1110f0 100644 --- a/include/dt-bindings/gpio/meson-gxbb-gpio.h +++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h @@ -29,6 +29,7 @@ #define GPIOAO_11 11 #define GPIOAO_12 12 #define GPIOAO_13 13 +#define GPIO_TEST_N 14 #define GPIOZ_0 0 #define GPIOZ_1 1 @@ -149,6 +150,5 @@ #define GPIOCLK_1 116 #define GPIOCLK_2 117 #define GPIOCLK_3 118 -#define GPIO_TEST_N 119 #endif diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h index 684d0d7add1c..01f2a2abd35e 100644 --- a/include/dt-bindings/gpio/meson-gxl-gpio.h +++ b/include/dt-bindings/gpio/meson-gxl-gpio.h @@ -25,6 +25,7 @@ #define GPIOAO_7 7 #define GPIOAO_8 8 #define GPIOAO_9 9 +#define GPIO_TEST_N 10 #define GPIOZ_0 0 #define GPIOZ_1 1 @@ -126,6 +127,5 @@ #define GPIOX_18 97 #define GPIOCLK_0 98 #define GPIOCLK_1 99 -#define GPIO_TEST_N 100 #endif From patchwork Wed Sep 20 13:39:27 2017 Content-Type: text/plain; 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This hole trigger an error while reading the pingroup debugfs entry GPIOX_22 is no routed externally. For all we know, it could an internal pin of SoC Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 1 + 1 file changed, 1 insertion(+) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 1305d68b0954..62483b67f114 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -136,6 +136,7 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOX_19), MESON_PIN(GPIOX_20), MESON_PIN(GPIOX_21), + MESON_PIN(GPIOX_22), MESON_PIN(GPIOCLK_0), MESON_PIN(GPIOCLK_1),