From patchwork Wed Apr 29 14:04:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 220323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 391E3C83006 for ; Wed, 29 Apr 2020 14:04:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A4632082E for ; Wed, 29 Apr 2020 14:04:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728243AbgD2OEy (ORCPT ); Wed, 29 Apr 2020 10:04:54 -0400 Received: from mga17.intel.com ([192.55.52.151]:59791 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727999AbgD2OEx (ORCPT ); Wed, 29 Apr 2020 10:04:53 -0400 IronPort-SDR: UMe38SFktzIVQqjv4pn+6qgVTD1oqJn+DKkAl2eFRr7rFuT/wcdE1y7eD4jrQH0SWf5AeQMR/v I8fA5eU9inbg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2020 07:04:52 -0700 IronPort-SDR: tl6CWAPx+/XcLBREN+hOokqB9e/ui6QIaIhe16VZKzgRhS3bL/sF7OGmNn9JnMDIPB0aSPDt9d S3kfgWZHtgcg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,332,1583222400"; d="scan'208";a="459205135" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 29 Apr 2020 07:04:50 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B14A317F; Wed, 29 Apr 2020 17:04:49 +0300 (EEST) From: Andy Shevchenko To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , linux-stm32@st-md-mailman.stormreply.com, "David S. Miller" , netdev@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v1 3/5] stmmac: intel: Convert to use pci_alloc_irq_vectors() API Date: Wed, 29 Apr 2020 17:04:47 +0300 Message-Id: <20200429140449.9484-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200429140449.9484-1-andriy.shevchenko@linux.intel.com> References: <20200429140449.9484-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org pci_enable_msi() is deprecated API, thus, switch to modern pci_alloc_irq_vectors(). Signed-off-by: Andy Shevchenko --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 87743036df78b3..46e3e4d6a34ac8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -649,15 +649,18 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, if (ret) return ret; - pci_enable_msi(pdev); + ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); + if (ret < 0) + return ret; memset(&res, 0, sizeof(res)); res.addr = pcim_iomap_table(pdev)[0]; - res.wol_irq = pdev->irq; - res.irq = pdev->irq; + res.wol_irq = pci_irq_vector(pdev, 0); + res.irq = pci_irq_vector(pdev, 0); ret = stmmac_dvr_probe(&pdev->dev, plat, &res); if (ret) { + pci_free_irq_vectors(pdev); clk_unregister_fixed_rate(plat->stmmac_clk); } @@ -678,6 +681,8 @@ static void intel_eth_pci_remove(struct pci_dev *pdev) stmmac_dvr_remove(&pdev->dev); + pci_free_irq_vectors(pdev); + clk_unregister_fixed_rate(priv->plat->stmmac_clk); pcim_iounmap_regions(pdev, BIT(0)); From patchwork Wed Apr 29 14:04:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 220322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85BEEC83006 for ; Wed, 29 Apr 2020 14:04:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 529192082E for ; Wed, 29 Apr 2020 14:04:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728258AbgD2OE6 (ORCPT ); Wed, 29 Apr 2020 10:04:58 -0400 Received: from mga18.intel.com ([134.134.136.126]:11964 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727869AbgD2OE5 (ORCPT ); Wed, 29 Apr 2020 10:04:57 -0400 IronPort-SDR: iLWgJpgRFYRMtT6t2c9z53D0yw1TwL05O+L3goBJuM9Sf9iA6ueg8wAJV8aNK6A5iToglERgKO Pka66ogSdtHQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Apr 2020 07:04:52 -0700 IronPort-SDR: hjWhcEhqGrqrJTscULvpQVBhMT0bQfWXlg6xJ2eRyDeM/MHiwMVZ4vYqchY/6A+NxUcMi1Ejpd rNlW5mq/qTXQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,332,1583222400"; d="scan'208";a="257970234" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga003.jf.intel.com with ESMTP; 29 Apr 2020 07:04:50 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id CE6F5425; Wed, 29 Apr 2020 17:04:49 +0300 (EEST) From: Andy Shevchenko To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , linux-stm32@st-md-mailman.stormreply.com, "David S. Miller" , netdev@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v1 5/5] stmmac: intel: Fix indentation to put on one line affected code Date: Wed, 29 Apr 2020 17:04:49 +0300 Message-Id: <20200429140449.9484-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200429140449.9484-1-andriy.shevchenko@linux.intel.com> References: <20200429140449.9484-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org There is no competition to get more LOCs into the kernel, and driver can look better and have improved readability without those additional line breaks. While at it, shorten info structures that they are all PCI, at the end it's a PCI driver for Intel hardware. Signed-off-by: Andy Shevchenko --- .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 92 +++++++------------ 1 file changed, 32 insertions(+), 60 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index c6154b6347a41f..4710b8e3a22f89 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -83,13 +83,9 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) serdes_phy_addr = intel_priv->mdio_adhoc_addr; /* assert clk_req */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); - + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data |= SERDES_PLL_CLK; - - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* check for clk_ack assertion */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -103,13 +99,9 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) } /* assert lane reset */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); - + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data |= SERDES_RST; - - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* check for assert lane reset reflection */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -123,14 +115,12 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data) } /* move power state to P0 */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data &= ~SERDES_PWR_ST_MASK; data |= SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT; - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* Check for P0 state */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -159,14 +149,12 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data) serdes_phy_addr = intel_priv->mdio_adhoc_addr; /* move power state to P3 */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data &= ~SERDES_PWR_ST_MASK; data |= SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT; - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* Check for P3 state */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -180,13 +168,9 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data) } /* de-assert clk_req */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); - + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data &= ~SERDES_PLL_CLK; - - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* check for clk_ack de-assert */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -200,13 +184,9 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data) } /* de-assert lane reset */ - data = mdiobus_read(priv->mii, serdes_phy_addr, - SERDES_GCR0); - + data = mdiobus_read(priv->mii, serdes_phy_addr, SERDES_GCR0); data &= ~SERDES_RST; - - mdiobus_write(priv->mii, serdes_phy_addr, - SERDES_GCR0, data); + mdiobus_write(priv->mii, serdes_phy_addr, SERDES_GCR0, data); /* check for de-assert lane reset reflection */ data = serdes_status_poll(priv, serdes_phy_addr, @@ -367,7 +347,7 @@ static int ehl_sgmii_data(struct pci_dev *pdev, return ehl_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_sgmii1g_pci_info = { +static struct stmmac_pci_info ehl_sgmii1g_info = { .setup = ehl_sgmii_data, }; @@ -381,7 +361,7 @@ static int ehl_rgmii_data(struct pci_dev *pdev, return ehl_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_rgmii1g_pci_info = { +static struct stmmac_pci_info ehl_rgmii1g_info = { .setup = ehl_rgmii_data, }; @@ -400,7 +380,7 @@ static int ehl_pse0_rgmii1g_data(struct pci_dev *pdev, return ehl_pse0_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_pse0_rgmii1g_pci_info = { +static struct stmmac_pci_info ehl_pse0_rgmii1g_info = { .setup = ehl_pse0_rgmii1g_data, }; @@ -413,7 +393,7 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, return ehl_pse0_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_pse0_sgmii1g_pci_info = { +static struct stmmac_pci_info ehl_pse0_sgmii1g_info = { .setup = ehl_pse0_sgmii1g_data, }; @@ -432,7 +412,7 @@ static int ehl_pse1_rgmii1g_data(struct pci_dev *pdev, return ehl_pse1_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_pse1_rgmii1g_pci_info = { +static struct stmmac_pci_info ehl_pse1_rgmii1g_info = { .setup = ehl_pse1_rgmii1g_data, }; @@ -445,7 +425,7 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, return ehl_pse1_common_data(pdev, plat); } -static struct stmmac_pci_info ehl_pse1_sgmii1g_pci_info = { +static struct stmmac_pci_info ehl_pse1_sgmii1g_info = { .setup = ehl_pse1_sgmii1g_data, }; @@ -470,7 +450,7 @@ static int tgl_sgmii_data(struct pci_dev *pdev, return tgl_common_data(pdev, plat); } -static struct stmmac_pci_info tgl_sgmii1g_pci_info = { +static struct stmmac_pci_info tgl_sgmii1g_info = { .setup = tgl_sgmii_data, }; @@ -573,7 +553,7 @@ static int quark_default_data(struct pci_dev *pdev, return 0; } -static const struct stmmac_pci_info quark_pci_info = { +static const struct stmmac_pci_info quark_info = { .setup = quark_default_data, }; @@ -598,8 +578,7 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, struct stmmac_resources res; int ret; - intel_priv = devm_kzalloc(&pdev->dev, sizeof(*intel_priv), - GFP_KERNEL); + intel_priv = devm_kzalloc(&pdev->dev, sizeof(*intel_priv), GFP_KERNEL); if (!intel_priv) return -ENOMEM; @@ -734,26 +713,19 @@ static SIMPLE_DEV_PM_OPS(intel_eth_pm_ops, intel_eth_pci_suspend, #define PCI_DEVICE_ID_INTEL_TGL_SGMII1G_ID 0xa0ac static const struct pci_device_id intel_eth_pci_id_table[] = { - { PCI_DEVICE_DATA(INTEL, QUARK_ID, &quark_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_RGMII1G_ID, &ehl_rgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_SGMII1G_ID, &ehl_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_SGMII2G5_ID, &ehl_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE0_RGMII1G_ID, - &ehl_pse0_rgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII1G_ID, - &ehl_pse0_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII2G5_ID, - &ehl_pse0_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE1_RGMII1G_ID, - &ehl_pse1_rgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII1G_ID, - &ehl_pse1_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII2G5_ID, - &ehl_pse1_sgmii1g_pci_info) }, - { PCI_DEVICE_DATA(INTEL, TGL_SGMII1G_ID, &tgl_sgmii1g_pci_info) }, + { PCI_DEVICE_DATA(INTEL, QUARK_ID, &quark_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_RGMII1G_ID, &ehl_rgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_SGMII1G_ID, &ehl_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_SGMII2G5_ID, &ehl_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE0_RGMII1G_ID, &ehl_pse0_rgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII1G_ID, &ehl_pse0_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE0_SGMII2G5_ID, &ehl_pse0_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE1_RGMII1G_ID, &ehl_pse1_rgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII1G_ID, &ehl_pse1_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, EHL_PSE1_SGMII2G5_ID, &ehl_pse1_sgmii1g_info) }, + { PCI_DEVICE_DATA(INTEL, TGL_SGMII1G_ID, &tgl_sgmii1g_info) }, {} }; - MODULE_DEVICE_TABLE(pci, intel_eth_pci_id_table); static struct pci_driver intel_eth_pci_driver = {