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[46.4.26.8]) by smtp.gmail.com with ESMTPSA id w2sm5422511wrb.67.2017.09.18.03.04.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Sep 2017 03:04:45 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH] ARM: dts: qcom-apq8064: disable gsbi6 i2c by default at soc dtsi Date: Mon, 18 Sep 2017 12:04:37 +0200 Message-Id: <20170918100437.27105-1-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.11.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Srinivas Kandagatla This patch marks gsbi i2c node at soc level dtsi, so that kernel would not assume that its enabled and result in pin conflicts on some boards like IFC6410 which do use these pins for uart. Without this patch we see below pin conflict: apq8064-pinctrl 800000.pinctrl: pin GPIO_16 already requested by 16540000.serial; cannot claim for 16580000.i2c apq8064-pinctrl 800000.pinctrl: pin-16 (16580000.i2c) status -22 apq8064-pinctrl 800000.pinctrl: could not request pin 16 (GPIO_16) from group gpio16 on device 800000.pinctrl i2c_qup 16580000.i2c: Error applying setting, reverse things back i2c_qup: probe of 16580000.i2c failed with error -22 Signed-off-by: Srinivas Kandagatla --- arch/arm/boot/dts/qcom-apq8064.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index f3db185a6809..f0438bc671f7 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -590,6 +590,7 @@ clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>; clock-names = "core", "iface"; + status = "disabled"; }; };