From patchwork Fri Feb 21 00:07:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 216444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2EE7C11D25 for ; Fri, 21 Feb 2020 00:07:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7DC92222C4 for ; Fri, 21 Feb 2020 00:07:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243677; bh=M25i0YkmNLx1PLVrcNbOU2o4PsZG3RliP3EJZKN/f/4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ZZ8S5LAk9HiZpet3QpM/1Ge4aJukU4mJ4+yYtQTDEDXZ/Eus51u5mEurwGSG3KHQU BbYpGqCsagw9vOROH+HkJCwyJgwYYQM6zTQGAKE/sDws3onUDxbKckXvTlfRW1JGcf 3em2ElOYEn5K/SWhKA8KDcrYBpyVr03O81p7KVX0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729448AbgBUAH5 (ORCPT ); Thu, 20 Feb 2020 19:07:57 -0500 Received: from mail.kernel.org ([198.145.29.99]:38488 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729387AbgBUAH4 (ORCPT ); Thu, 20 Feb 2020 19:07:56 -0500 Received: from localhost.localdomain (unknown [151.48.137.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 770342071E; Fri, 21 Feb 2020 00:07:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243675; bh=M25i0YkmNLx1PLVrcNbOU2o4PsZG3RliP3EJZKN/f/4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JC6R9VESJbZG/IYKBb0qePMI9SLL/8To25SqIrKNszciSGjoK1MdGfB5na+1lrGva qVl1et1SVQs2IH+ZpoJjDOwd/cgfuvI0WTOF3GgEk+GmXHcxfNxPxz3bRIlD0BrNC7 akDB2ldhQMq85gEdjDaXcbFQ7F/y3hkPCPRuVycw= From: Lorenzo Bianconi To: nbd@nbd.name Cc: lorenzo.bianconi@redhat.com, linux-wireless@vger.kernel.org, sean.wang@mediatek.com, ryder.lee@mediatek.com Subject: [PATCH 1/8] mt76: mt7615: introduce mt7615_register_map Date: Fri, 21 Feb 2020 01:07:28 +0100 Message-Id: X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org In order to reuse mt7615 code adding support for mt7663e driver, introduce mt7615e_reg_map since mt7663e and mt7615 rely on a different base registers definitions. Co-developed-by: Sean Wang Signed-off-by: Sean Wang Co-developed-by: Ryder Lee Signed-off-by: Ryder Lee Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7615/mac.c | 14 ++-- .../net/wireless/mediatek/mt76/mt7615/mmio.c | 27 ++++++- .../wireless/mediatek/mt76/mt7615/mt7615.h | 5 +- .../net/wireless/mediatek/mt76/mt7615/pci.c | 3 +- .../net/wireless/mediatek/mt76/mt7615/regs.h | 72 +++++++++++++------ .../net/wireless/mediatek/mt76/mt7615/soc.c | 2 +- 6 files changed, 91 insertions(+), 32 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c index 145366dbc39b..cb576df9a561 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c @@ -703,9 +703,9 @@ void mt7615_txp_skb_unmap(struct mt76_dev *dev, mt7615_txp_skb_unmap_hw(dev, &txp->hw); } -static u32 mt7615_mac_wtbl_addr(int wcid) +static u32 mt7615_mac_wtbl_addr(struct mt7615_dev *dev, int wcid) { - return MT_WTBL_BASE + wcid * MT_WTBL_ENTRY_SIZE; + return MT_WTBL_BASE(dev) + wcid * MT_WTBL_ENTRY_SIZE; } bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask) @@ -751,7 +751,7 @@ void mt7615_mac_sta_poll(struct mt7615_dev *dev) list_del_init(&msta->poll_list); spin_unlock_bh(&dev->sta_poll_lock); - addr = mt7615_mac_wtbl_addr(msta->wcid.idx) + 19 * 4; + addr = mt7615_mac_wtbl_addr(dev, msta->wcid.idx) + 19 * 4; for (i = 0; i < 4; i++, addr += 8) { u32 tx_last = msta->airtime_ac[i]; @@ -801,7 +801,7 @@ void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, struct mt76_phy *mphy = phy->mt76; struct ieee80211_tx_rate *ref; int wcid = sta->wcid.idx; - u32 addr = mt7615_mac_wtbl_addr(wcid); + u32 addr = mt7615_mac_wtbl_addr(dev, wcid); bool stbc = false; int n_rates = sta->n_rates; u8 bw, bw_prev, bw_idx = 0; @@ -966,7 +966,7 @@ mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, struct mt76_wcid *wcid, enum mt7615_cipher_type cipher, enum set_key_cmd cmd) { - u32 addr = mt7615_mac_wtbl_addr(wcid->idx) + 30 * 4; + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4; u8 data[32] = {}; if (key->keylen > sizeof(data)) @@ -1004,7 +1004,7 @@ mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev, struct mt76_wcid *wcid, enum mt7615_cipher_type cipher, int keyidx, enum set_key_cmd cmd) { - u32 addr = mt7615_mac_wtbl_addr(wcid->idx), w0, w1; + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx), w0, w1; if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000)) return -ETIMEDOUT; @@ -1040,7 +1040,7 @@ mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev, struct mt76_wcid *wcid, enum mt7615_cipher_type cipher, enum set_key_cmd cmd) { - u32 addr = mt7615_mac_wtbl_addr(wcid->idx); + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx); if (cmd == SET_KEY) { if (cipher != MT_CIPHER_BIP_CMAC_128 || !wcid->cipher) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c b/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c index 0b445471b6e8..fb4a76270ad4 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c @@ -2,9 +2,32 @@ #include #include "mt7615.h" +#include "regs.h" #include "mac.h" #include "../trace.h" +const u32 mt7615e_reg_map[] = { + [MT_TOP_CFG_BASE] = 0x01000, + [MT_HW_BASE] = 0x01000, + [MT_PCIE_REMAP_2] = 0x02504, + [MT_HIF_BASE] = 0x04000, + [MT_CSR_BASE] = 0x07000, + [MT_PHY_BASE] = 0x10000, + [MT_CFG_BASE] = 0x20200, + [MT_AGG_BASE] = 0x20a00, + [MT_TMAC_BASE] = 0x21000, + [MT_RMAC_BASE] = 0x21200, + [MT_DMA_BASE] = 0x21800, + [MT_WTBL_BASE_ON] = 0x23000, + [MT_WTBL_BASE_OFF] = 0x23400, + [MT_LPON_BASE] = 0x24200, + [MT_MIB_BASE] = 0x24800, + [MT_WTBL_BASE_ADDR] = 0x30000, + [MT_PCIE_REMAP_BASE2] = 0x80000, + [MT_TOP_MISC_BASE] = 0xc0000, + [MT_EFUSE_ADDR_BASE] = 0x81070000, +}; + u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr) { u32 base = addr & MT_MCU_PCIE_REMAP_2_BASE; @@ -66,7 +89,8 @@ static irqreturn_t mt7615_irq_handler(int irq, void *dev_instance) return IRQ_HANDLED; } -int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq) +int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, + int irq, const u32 *map) { static const struct mt76_driver_ops drv_ops = { /* txwi_size = txd size + txp size */ @@ -95,6 +119,7 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq) dev = container_of(mdev, struct mt7615_dev, mt76); mt76_mmio_init(&dev->mt76, mem_base); + dev->reg_map = map; mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | (mt76_rr(dev, MT_HW_REV) & 0xff); dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h index a84a9b4cbf4e..b6c9fdec869b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h @@ -157,6 +157,7 @@ struct mt7615_dev { u16 chainmask; struct regmap *infracfg; + const u32 *reg_map; struct work_struct mcu_work; @@ -257,6 +258,7 @@ mt7615_ext_phy(struct mt7615_dev *dev) } extern const struct ieee80211_ops mt7615_ops; +extern const u32 mt7615e_reg_map[__MT_BASE_MAX]; extern struct pci_driver mt7615_pci_driver; extern struct platform_driver mt7622_wmac_driver; @@ -269,7 +271,8 @@ static inline int mt7622_wmac_init(struct mt7615_dev *dev) } #endif -int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq); +int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, + int irq, const u32 *map); u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); int mt7615_register_device(struct mt7615_dev *dev); diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/pci.c b/drivers/net/wireless/mediatek/mt76/mt7615/pci.c index 43e02128cc48..d20db968c7ec 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/pci.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/pci.c @@ -35,7 +35,8 @@ static int mt7615_pci_probe(struct pci_dev *pdev, if (ret) return ret; - return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], pdev->irq); + return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], + pdev->irq, mt7615e_reg_map); } static void mt7615_pci_remove(struct pci_dev *pdev) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h index fe68f6b2cbf8..b422a9c71089 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/regs.h @@ -4,15 +4,40 @@ #ifndef __MT7615_REGS_H #define __MT7615_REGS_H -#define MT_HW_REV 0x1000 -#define MT_HW_CHIPID 0x1008 -#define MT_TOP_STRAP_STA 0x1010 +enum mt7615_reg_base { + MT_TOP_CFG_BASE, + MT_HW_BASE, + MT_PCIE_REMAP_2, + MT_HIF_BASE, + MT_CSR_BASE, + MT_PHY_BASE, + MT_CFG_BASE, + MT_AGG_BASE, + MT_TMAC_BASE, + MT_RMAC_BASE, + MT_DMA_BASE, + MT_WTBL_BASE_ON, + MT_WTBL_BASE_OFF, + MT_LPON_BASE, + MT_MIB_BASE, + MT_WTBL_BASE_ADDR, + MT_PCIE_REMAP_BASE2, + MT_TOP_MISC_BASE, + MT_EFUSE_ADDR_BASE, + __MT_BASE_MAX, +}; + +#define MT_HW_INFO_BASE ((dev)->reg_map[MT_HW_BASE]) +#define MT_HW_INFO(ofs) (MT_HW_INFO_BASE + (ofs)) +#define MT_HW_REV MT_HW_INFO(0x000) +#define MT_HW_CHIPID MT_HW_INFO(0x008) +#define MT_TOP_STRAP_STA MT_HW_INFO(0x010) #define MT_TOP_3NSS BIT(24) #define MT_TOP_OFF_RSV 0x1128 #define MT_TOP_OFF_RSV_FW_STATE GENMASK(18, 16) -#define MT_TOP_MISC2 0x1134 +#define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134) #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0) #define MT_MCU_BASE 0x2000 @@ -23,13 +48,12 @@ #define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18) #define MT_PCIE_REMAP_BASE_1 0x40000 -#define MT_MCU_PCIE_REMAP_2 MT_MCU(0x504) +#define MT_MCU_PCIE_REMAP_2 ((dev)->reg_map[MT_PCIE_REMAP_2]) #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0) #define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19) -#define MT_PCIE_REMAP_BASE_2 0x80000 +#define MT_PCIE_REMAP_BASE_2 ((dev)->reg_map[MT_PCIE_REMAP_BASE2]) -#define MT_HIF_BASE 0x4000 -#define MT_HIF(ofs) (MT_HIF_BASE + (ofs)) +#define MT_HIF(ofs) ((dev)->reg_map[MT_HIF_BASE] + (ofs)) #define MT_CFG_LPCR_HOST MT_HIF(0x1f0) #define MT_CFG_LPCR_HOST_FW_OWN BIT(0) @@ -95,6 +119,9 @@ #define MT_WPDMA_ABT_CFG MT_HIF(0x530) #define MT_WPDMA_ABT_CFG1 MT_HIF(0x534) +#define MT_CSR(ofs) ((dev)->reg_map[MT_CSR_BASE] + (ofs)) +#define MT_CONN_HIF_ON_LPCTL MT_CSR(0x000) + #define MT_PLE_BASE 0x8000 #define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) @@ -106,7 +133,7 @@ #define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x300 + 0x10 * (ac) + \ ((n) << 2)) -#define MT_WF_PHY_BASE 0x10000 +#define MT_WF_PHY_BASE ((dev)->reg_map[MT_PHY_BASE]) #define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs)) #define MT_WF_PHY_WF2_RFCTRL0(n) MT_WF_PHY(0x1900 + (n) * 0x400) @@ -139,7 +166,7 @@ #define MT_WF_PHY_RXTD2_BASE MT_WF_PHY(0x2a00) #define MT_WF_PHY_RXTD2(_n) (MT_WF_PHY_RXTD2_BASE + ((_n) << 2)) -#define MT_WF_CFG_BASE 0x20200 +#define MT_WF_CFG_BASE ((dev)->reg_map[MT_CFG_BASE]) #define MT_WF_CFG(ofs) (MT_WF_CFG_BASE + (ofs)) #define MT_CFG_CCR MT_WF_CFG(0x000) @@ -148,7 +175,7 @@ #define MT_CFG_CCR_MAC_D1_2X_GC_EN BIT(30) #define MT_CFG_CCR_MAC_D0_2X_GC_EN BIT(31) -#define MT_WF_AGG_BASE 0x20a00 +#define MT_WF_AGG_BASE ((dev)->reg_map[MT_AGG_BASE]) #define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs)) #define MT_AGG_ARCR MT_WF_AGG(0x010) @@ -188,7 +215,7 @@ #define MT_ARB_SCR_TX1_DISABLE BIT(10) #define MT_ARB_SCR_RX1_DISABLE BIT(11) -#define MT_WF_TMAC_BASE 0x21000 +#define MT_WF_TMAC_BASE ((dev)->reg_map[MT_TMAC_BASE]) #define MT_WF_TMAC(ofs) (MT_WF_TMAC_BASE + (ofs)) #define MT_TMAC_CDTR MT_WF_TMAC(0x090) @@ -212,7 +239,7 @@ #define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17) #define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18) -#define MT_WF_RMAC_BASE 0x21200 +#define MT_WF_RMAC_BASE ((dev)->reg_map[MT_RMAC_BASE]) #define MT_WF_RMAC(ofs) (MT_WF_RMAC_BASE + (ofs)) #define MT_WF_RFCR(_band) MT_WF_RMAC((_band) ? 0x100 : 0x000) @@ -257,7 +284,7 @@ #define MT_WF_RMAC_MIB_TIME6 MT_WF_RMAC(0x03dc) #define MT_MIB_OBSSTIME_MASK GENMASK(23, 0) -#define MT_WF_DMA_BASE 0x21800 +#define MT_WF_DMA_BASE ((dev)->reg_map[MT_DMA_BASE]) #define MT_WF_DMA(ofs) (MT_WF_DMA_BASE + (ofs)) #define MT_DMA_DCR0 MT_WF_DMA(0x000) @@ -272,10 +299,10 @@ #define MT_DMA_RCFR0_RX_DROPPED_UCAST GENMASK(25, 24) #define MT_DMA_RCFR0_RX_DROPPED_MCAST GENMASK(27, 26) -#define MT_WTBL_BASE 0x30000 +#define MT_WTBL_BASE(dev) ((dev)->reg_map[MT_WTBL_BASE_ADDR]) #define MT_WTBL_ENTRY_SIZE 256 -#define MT_WTBL_OFF_BASE 0x23400 +#define MT_WTBL_OFF_BASE ((dev)->reg_map[MT_WTBL_BASE_OFF]) #define MT_WTBL_OFF(n) (MT_WTBL_OFF_BASE + (n)) #define MT_WTBL_W0_KEY_IDX GENMASK(24, 23) @@ -292,7 +319,11 @@ #define MT_WTBL_UPDATE_TX_COUNT_CLEAR BIT(14) #define MT_WTBL_UPDATE_BUSY BIT(31) -#define MT_WTBL_ON_BASE 0x23000 +#define MT_TOP_MISC(ofs) ((dev)->reg_map[MT_TOP_MISC_BASE] + (ofs)) +#define MT_CONN_ON_MISC MT_TOP_MISC(0x1140) +#define MT_TOP_MISC2_FW_N9_RDY BIT(2) + +#define MT_WTBL_ON_BASE ((dev)->reg_map[MT_WTBL_BASE_ON]) #define MT_WTBL_ON(_n) (MT_WTBL_ON_BASE + (_n)) #define MT_WTBL_RICR0 MT_WTBL_ON(0x010) @@ -328,8 +359,7 @@ #define MT_WTBL_W27_CC_BW_SEL GENMASK(6, 5) -#define MT_LPON_BASE 0x24200 -#define MT_LPON(_n) (MT_LPON_BASE + (_n)) +#define MT_LPON(_n) ((dev)->reg_map[MT_LPON_BASE] + (_n)) #define MT_LPON_T0CR MT_LPON(0x010) #define MT_LPON_T0CR_MODE GENMASK(1, 0) @@ -337,7 +367,7 @@ #define MT_LPON_UTTR0 MT_LPON(0x018) #define MT_LPON_UTTR1 MT_LPON(0x01c) -#define MT_WF_MIB_BASE 0x24800 +#define MT_WF_MIB_BASE (dev->reg_map[MT_MIB_BASE]) #define MT_WF_MIB(ofs) (MT_WF_MIB_BASE + (ofs)) #define MT_MIB_M0_MISC_CR MT_WF_MIB(0x00c) @@ -406,7 +436,7 @@ #define MT_LED_STATUS_ON GENMASK(23, 16) #define MT_LED_STATUS_DURATION GENMASK(15, 0) -#define MT_EFUSE_BASE 0x81070000 +#define MT_EFUSE_BASE ((dev)->reg_map[MT_EFUSE_ADDR_BASE]) #define MT_EFUSE_BASE_CTRL 0x000 #define MT_EFUSE_BASE_CTRL_EMPTY BIT(30) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/soc.c b/drivers/net/wireless/mediatek/mt76/mt7615/soc.c index 07ec9ec282f5..43aa49706c66 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/soc.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/soc.c @@ -47,7 +47,7 @@ static int mt7622_wmac_probe(struct platform_device *pdev) return PTR_ERR(mem_base); } - return mt7615_mmio_probe(&pdev->dev, mem_base, irq); + return mt7615_mmio_probe(&pdev->dev, mem_base, irq, mt7615e_reg_map); } static int mt7622_wmac_remove(struct platform_device *pdev) From patchwork Fri Feb 21 00:07:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 216443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DBFFC11D00 for ; Fri, 21 Feb 2020 00:08:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 58F1F208E4 for ; Fri, 21 Feb 2020 00:08:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243681; bh=F3ezLyPAEF0ppQSPhDFdznR6I5ZXXQGpYSAVOQZLoAk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ZuDsqI2cTpK8QgTQ4pQ0sDJk75CJedeyxTAQix0Ce/OUym1rbrrorvYxk371xmOy7 wsoCugOkt1sWhxf8DgAZEKtQlU+yAMXoaDrd19p72Uplbej13JKab+e0sOWycGwys7 6Pu78I7v97bqubnr7kyKMF50P4B363rd11bFtvY4= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729451AbgBUAIA (ORCPT ); Thu, 20 Feb 2020 19:08:00 -0500 Received: from mail.kernel.org ([198.145.29.99]:38564 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729373AbgBUAIA (ORCPT ); Thu, 20 Feb 2020 19:08:00 -0500 Received: from localhost.localdomain (unknown [151.48.137.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 027682071E; Fri, 21 Feb 2020 00:07:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243680; bh=F3ezLyPAEF0ppQSPhDFdznR6I5ZXXQGpYSAVOQZLoAk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OBIwPGOapgTVkCebjHpRWpLjg8lonPIWNmLgS+d6S9UjpGfVtOOqev1jF5OBs2GzQ ISUK5K/LprLSPWkydvlUm8iHt7lIuK4zSkHX2c2Pwne9sQPA85vR27Oy9/m7FRkLM1 rTl6BqTbd+YjNBxVMvoqL61dJhW5mV17HaqCFvbk= From: Lorenzo Bianconi To: nbd@nbd.name Cc: lorenzo.bianconi@redhat.com, linux-wireless@vger.kernel.org, sean.wang@mediatek.com, ryder.lee@mediatek.com Subject: [PATCH 3/8] mt76: mt7615: add mt7663 support to mt7615_mcu_set_tx_ba Date: Fri, 21 Feb 2020 01:07:30 +0100 Message-Id: <5708ec66f5b2a8ed55f53a0bb3e43bfb6808835b.1582243031.git.lorenzo@kernel.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Extend mt7615_mcu_set_tx_ba routine in order to support mt7663e driver Co-developed-by: Sean Wang Signed-off-by: Sean Wang Co-developed-by: Ryder Lee Signed-off-by: Ryder Lee Signed-off-by: Lorenzo Bianconi --- drivers/net/wireless/mediatek/mt76/mt7615/mcu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c index 7218a3041ead..1b8c8da56b84 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c @@ -1746,7 +1746,9 @@ int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, wtbl_ba->sn = add ? cpu_to_le16(params->ssn) : 0; wtbl_ba->ba_en = add; - if (add) { + if (is_mt7663(&dev->mt76)) { + wtbl_ba->ba_winsize = cpu_to_le16(params->buf_size); + } else if (add) { u8 idx, ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; for (idx = 7; idx > 0; idx--) { From patchwork Fri Feb 21 00:07:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 216442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBB0BC11D00 for ; Fri, 21 Feb 2020 00:08:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B424B222C4 for ; Fri, 21 Feb 2020 00:08:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243693; bh=7+18sp25jTYgLmeUI9KTxSL/+oFBGmYyxBuYYLoCKzw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=WjAaLlvpRXBDfrXLZ0POZy5wVjX/w/46gjxkYY7WUj1PDWTQKMCUL4gC/9kuVcoXn EhUyGGkrZggr8nzauaMzSFaEpW9c2iWzl90c9QNhcz/SQyJ/4ACY0tIOLXiZ/FGVuF F215IaUcN/lVDxTQ93EAxAJRmYnrSduwqG7+kGCM= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729456AbgBUAIN (ORCPT ); Thu, 20 Feb 2020 19:08:13 -0500 Received: from mail.kernel.org ([198.145.29.99]:38712 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729373AbgBUAIM (ORCPT ); Thu, 20 Feb 2020 19:08:12 -0500 Received: from localhost.localdomain (unknown [151.48.137.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 112382071E; Fri, 21 Feb 2020 00:08:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243692; bh=7+18sp25jTYgLmeUI9KTxSL/+oFBGmYyxBuYYLoCKzw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EWk6w7Z5YEMH3Vl4DDfAjhUzlMo4fIzVY6rR0NNt+Nwb6wpHLs5O5qlB/2yvBhxqB eLdbXhhtGEPMpwSrx6P3YqTVGIE3NeFdrjExhL0j/NBe6fAspQ5Oqd0kB5qY/5DtwO Xm9eFNiyAds9Jbp270HFzkc/nO4fHunOGtmf2mJs= From: Lorenzo Bianconi To: nbd@nbd.name Cc: lorenzo.bianconi@redhat.com, linux-wireless@vger.kernel.org, sean.wang@mediatek.com, ryder.lee@mediatek.com Subject: [PATCH 5/8] mt76: mt7615: add mt7663e support to mt7615_mcu_set_eeprom Date: Fri, 21 Feb 2020 01:07:32 +0100 Message-Id: X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Extend mt7615_mcu_set_eeprom routine in order to be reused adding mt7663e support to mt7615 driver Co-developed-by: Sean Wang Signed-off-by: Sean Wang Co-developed-by: Ryder Lee Signed-off-by: Ryder Lee Signed-off-by: Lorenzo Bianconi --- .../wireless/mediatek/mt76/mt7615/eeprom.h | 2 ++ .../net/wireless/mediatek/mt76/mt7615/mcu.c | 21 ++++++++++++++----- 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h index 18c7301521b7..8a2a64b7fcd3 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h @@ -18,11 +18,13 @@ enum mt7615_eeprom_field { MT_EE_TX1_5G_G0_TARGET_POWER = 0x098, MT_EE_EXT_PA_2G_TARGET_POWER = 0x0f2, MT_EE_EXT_PA_5G_TARGET_POWER = 0x0f3, + MT7663_EE_TX0_2G_TARGET_POWER = 0x123, MT_EE_TX2_5G_G0_TARGET_POWER = 0x142, MT_EE_TX3_5G_G0_TARGET_POWER = 0x16a, MT7615_EE_MAX = 0x3bf, MT7622_EE_MAX = 0x3db, + MT7663_EE_MAX = 0x400, }; #define MT_EE_NIC_CONF_TX_MASK GENMASK(7, 4) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c index a244585d78df..fbf892750e2c 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c @@ -731,18 +731,29 @@ int mt7615_mcu_set_eeprom(struct mt7615_dev *dev) { struct { u8 buffer_mode; - u8 pad; + u8 content_format; __le16 len; } __packed req_hdr = { .buffer_mode = 1, }; - int ret, len, eep_len; + int ret, len, eep_len, offset; u8 *req, *eep = (u8 *)dev->mt76.eeprom.data; - if (is_mt7622(&dev->mt76)) + switch (mt76_chip(&dev->mt76)) { + case 0x7622: eep_len = MT7622_EE_MAX - MT_EE_NIC_CONF_0; - else + offset = MT_EE_NIC_CONF_0; + break; + case 0x7663: + eep_len = MT7663_EE_MAX - MT_EE_CHIP_ID; + req_hdr.content_format = 1; + offset = MT_EE_CHIP_ID; + break; + default: eep_len = MT7615_EE_MAX - MT_EE_NIC_CONF_0; + offset = MT_EE_NIC_CONF_0; + break; + } len = sizeof(req_hdr) + eep_len; req = kzalloc(len, GFP_KERNEL); @@ -751,7 +762,7 @@ int mt7615_mcu_set_eeprom(struct mt7615_dev *dev) req_hdr.len = cpu_to_le16(eep_len); memcpy(req, &req_hdr, sizeof(req_hdr)); - memcpy(req + sizeof(req_hdr), eep + MT_EE_NIC_CONF_0, eep_len); + memcpy(req + sizeof(req_hdr), eep + offset, eep_len); ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_BUFFER_MODE, req, len, true); From patchwork Fri Feb 21 00:07:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 216441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.3 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,UPPERCASE_50_75,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A7A9C11D00 for ; Fri, 21 Feb 2020 00:08:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55E3A222C4 for ; Fri, 21 Feb 2020 00:08:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243700; bh=yPjQWKKEmwSRkHni04jZO/dnsyHMaJaeCV45jMEsGic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=BMPMcCy7bZmv9av05XAjVjnvzW64qi2Lt+IFszRelyhG4ZH+P7aNfWy7vP6gtR4A5 NWlbGu7s+Z8cECaexnqrSAtByef98cBj5azTcWw7eAAZpwSsYL7kW7VF2HmOth4F8u pUnvu6AaC0wqXDSyl8EP6Vq5RXZf6FUOAf0FMdRI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729462AbgBUAIT (ORCPT ); Thu, 20 Feb 2020 19:08:19 -0500 Received: from mail.kernel.org ([198.145.29.99]:38788 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729410AbgBUAIT (ORCPT ); Thu, 20 Feb 2020 19:08:19 -0500 Received: from localhost.localdomain (unknown [151.48.137.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 2F44E2071E; Fri, 21 Feb 2020 00:08:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1582243698; bh=yPjQWKKEmwSRkHni04jZO/dnsyHMaJaeCV45jMEsGic=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xYRwiHQotlg7Y3Dduq4u5/ReGqnrPOsk8/kBf+rrKuAklbdRH3nAETZOWx37DyEk4 2yk9OGAhYVDuXIYqEpMA28WttC5CkudS6UhsrMWZr2qYSDZiTCCP/HtszHKGv0TjkM Yqf7yjOWU2q+qIHf9gUUdl6vZiqwkSTlSyv8eDG0= From: Lorenzo Bianconi To: nbd@nbd.name Cc: lorenzo.bianconi@redhat.com, linux-wireless@vger.kernel.org, sean.wang@mediatek.com, ryder.lee@mediatek.com Subject: [PATCH 7/8] mt76: mt7615: introduce mt7615_init_mac_chain routine Date: Fri, 21 Feb 2020 01:07:34 +0100 Message-Id: X-Mailer: git-send-email 2.24.1 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Introduce mt7615_init_mac_chain routine to configure per band mac register since new devices (e.g. mt7663e) do not support dbdc Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt7615/init.c | 118 +++++++++--------- 1 file changed, 62 insertions(+), 56 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/init.c b/drivers/net/wireless/mediatek/mt76/mt7615/init.c index 889eb72ad6bd..cbb9c63737aa 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/init.c @@ -18,27 +18,66 @@ static void mt7615_phy_init(struct mt7615_dev *dev) mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); } -static void mt7615_mac_init(struct mt7615_dev *dev) +static void +mt7615_init_mac_chain(struct mt7615_dev *dev, int chain) { u32 val, mask, set; - int i; + + if (!chain) + val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN; + else + val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN; /* enable band 0/1 clk */ - mt76_set(dev, MT_CFG_CCR, - MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN | - MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN); - - val = mt76_rmw(dev, MT_TMAC_TRCR(0), - MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, - FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | - FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); - mt76_wr(dev, MT_TMAC_TRCR(1), val); - - val = MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | - FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | - FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT); - mt76_wr(dev, MT_AGG_ACR(0), val); - mt76_wr(dev, MT_AGG_ACR(1), val); + mt76_set(dev, MT_CFG_CCR, val); + + mt76_rmw(dev, MT_TMAC_TRCR(chain), + MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, + FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | + FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); + + mt76_wr(dev, MT_AGG_ACR(chain), + MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | + FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | + FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); + + mt76_wr(dev, MT_AGG_ARUCR(chain), + FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); + + mt76_wr(dev, MT_AGG_ARDCR(chain), + FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | + FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1)); + + mask = MT_DMA_RCFR0_MCU_RX_MGMT | + MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | + MT_DMA_RCFR0_MCU_RX_CTL_BAR | + MT_DMA_RCFR0_MCU_RX_BYPASS | + MT_DMA_RCFR0_RX_DROPPED_UCAST | + MT_DMA_RCFR0_RX_DROPPED_MCAST; + set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | + FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); + mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set); +} + +static void mt7615_mac_init(struct mt7615_dev *dev) +{ + int i; + + mt7615_init_mac_chain(dev, 0); + mt7615_init_mac_chain(dev, 1); mt76_rmw_field(dev, MT_TMAC_CTCR0, MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); @@ -56,47 +95,14 @@ static void mt7615_mac_init(struct mt7615_dev *dev) mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS, MT_AGG_SCR_NLNAV_MID_PTEC_DIS); - mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP | - FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072)); - - val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1); - mt76_wr(dev, MT_AGG_ARUCR(0), val); - mt76_wr(dev, MT_AGG_ARUCR(1), val); - - val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | - FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1); - mt76_wr(dev, MT_AGG_ARDCR(0), val); - mt76_wr(dev, MT_AGG_ARDCR(1), val); - mt76_wr(dev, MT_AGG_ARCR, - (FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | - MT_AGG_ARCR_RATE_DOWN_RATIO_EN | - FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | - FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4))); + FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | + MT_AGG_ARCR_RATE_DOWN_RATIO_EN | + FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | + FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)); - mask = MT_DMA_RCFR0_MCU_RX_MGMT | - MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | - MT_DMA_RCFR0_MCU_RX_CTL_BAR | - MT_DMA_RCFR0_MCU_RX_BYPASS | - MT_DMA_RCFR0_RX_DROPPED_UCAST | - MT_DMA_RCFR0_RX_DROPPED_MCAST; - set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | - FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); - mt76_rmw(dev, MT_DMA_RCFR0(0), mask, set); - mt76_rmw(dev, MT_DMA_RCFR0(1), mask, set); + mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP | + FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072)); for (i = 0; i < MT7615_WTBL_SIZE; i++) mt7615_mac_wtbl_update(dev, i,