From patchwork Tue Jan 7 15:51:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jack Mitchell X-Patchwork-Id: 215183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF29FC33C8C for ; Tue, 7 Jan 2020 15:52:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 97FF22077B for ; Tue, 7 Jan 2020 15:52:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728189AbgAGPwF (ORCPT ); Tue, 7 Jan 2020 10:52:05 -0500 Received: from unsecure-smtp.soverin.net ([94.130.159.241]:44119 "EHLO g02sm02.soverin.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727994AbgAGPwF (ORCPT ); Tue, 7 Jan 2020 10:52:05 -0500 Received: from soverin.net by soverin.net From: Jack Mitchell Cc: ml@embed.me.uk, Wim Van Sebroeck , Guenter Roeck , linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] watchdog: dw_wdt: ping watchdog to reset countdown before start Date: Tue, 7 Jan 2020 15:51:55 +0000 Message-Id: <20200107155155.278521-1-ml@embed.me.uk> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.99.2 at g02sm02 X-Virus-Status: Clean To: unlisted-recipients:; (no To-header on input) Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Currently on an rk3288 SoC when trying to use the watchdog the SoC will instantly reset. This is due to the watchdog countdown counter being set to its initial value of 0x0. Reset the watchdog counter before start in order to correctly start the countdown timer from the right position. Signed-off-by: Jack Mitchell --- drivers/watchdog/dw_wdt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c index fef7c61f5555..4a902d015bc2 100644 --- a/drivers/watchdog/dw_wdt.c +++ b/drivers/watchdog/dw_wdt.c @@ -135,6 +135,7 @@ static int dw_wdt_start(struct watchdog_device *wdd) struct dw_wdt *dw_wdt = to_dw_wdt(wdd); dw_wdt_set_timeout(wdd, wdd->timeout); + dw_wdt_ping(&dw_wdt->wdd); dw_wdt_arm_system_reset(dw_wdt); return 0;