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Thu, 19 Mar 2020 15:07:05 +0000 (GMT) From: Alim Akhtar To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-scsi@vger.kernel.org Cc: krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v3 3/5] Documentation: devicetree: ufs: Add DT bindings for exynos UFS host controller Date: Thu, 19 Mar 2020 20:30:29 +0530 Message-Id: <20200319150031.11024-4-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200319150031.11024-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjleLIzCtJLcpLzFFi42LZdlhTS3dOV3GcwRR2iwfztrFZvPx5lc3i 0/plrBbzj5xjtTh/fgO7xc0tR1ksNj2+xmpxedccNosZ5/cxWXRf38Fmsfz4PyaL1r1H2C2W br3J6MDrcbmvl8lj06pONo/NS+o9Wk7uZ/H4+PQWi0ffllWMHp83yXm0H+hmCuCI4rJJSc3J LEst0rdL4MrofbifpWCLdsXkH6dZGxinK3UxcnJICJhInOzYwtbFyMUhJLCbUeLf+jWMEM4n RonLcw6zQzjfGCWa9naywrS0LD3IBJHYyyhxa/4eqKoWJonF+5cxg1SxCWhL3J2+hQnEFhEI kLj0/iDYEmaBeUwSix71ACU4OIQFMiTuf5IBqWERUJW4/W0HWJhXwEai71EaxDJ5idUbDoCN 5BSwlZhz4ToLyBgJgcdsEufnN7NAFLlIfNj/nxHCFpZ4dXwLO4QtJfH53V42kJkSAtkSPbuM IcI1EkvnHYNqtZc4cGUOC0gJs4CmxPpd+iBhZgE+id7fT5ggOnklOtqEIKpVJZrfXYXqlJaY 2N0NDRIPiT/re8DiQgITGCW6f4ZOYJSdhTB0ASPjKkbJ1ILi3PTUYtMC47zUcr3ixNzi0rx0 veT83E2M4FSi5b2DcdM5n0OMAhyMSjy8M9qK44RYE8uKK3MPMUpwMCuJ8OqmA4V4UxIrq1KL 8uOLSnNSiw8xSnOwKInzTmK9GiMkkJ5YkpqdmlqQWgSTZeLglGpgtD7F0b0wINzWjHlarhHH Hv0vpwSMZQI4u701l+3gyZvfFJSVxLCA80M0h+W+p8H5Jy7YOdUE9nYtK2kS+R+/fP1frjOH Gdv5ftp/lnxolRnjYSQ47e/SI0WLXpx7/2LDTdNFoX4qc63e8AYU7rBaebdurrDz1ZIU5tVb iq5vPfpbQid3/fsFSizFGYmGWsxFxYkA/UynSCEDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrALMWRmVeSWpSXmKPExsWy7bCSvO7sruI4g+WL5S0ezNvGZvHy51U2 i0/rl7FazD9yjtXi/PkN7BY3txxlsdj0+BqrxeVdc9gsZpzfx2TRfX0Hm8Xy4/+YLFr3HmG3 WLr1JqMDr8flvl4mj02rOtk8Ni+p92g5uZ/F4+PTWywefVtWMXp83iTn0X6gmymAI4rLJiU1 J7MstUjfLoEro/fhfpaCLdoVk3+cZm1gnK7UxcjJISFgItGy9CBTFyMXh5DAbkaJAz++sEIk pCWub5zADmELS6z895wdoqiJSWL13Q4WkASbgLbE3elbmEBsEYEgiXtr1rKCFDELrGKS6Ow9 ywiSEBZIk/gw4TxYA4uAqsTtbzuAGjg4eAVsJPoepUEskJdYveEAM4jNKWArMefCdbByIaCS zlfX2CYw8i1gZFjFKJlaUJybnltsWGCYl1quV5yYW1yal66XnJ+7iREczlqaOxgvL4k/xCjA wajEwzujrThOiDWxrLgy9xCjBAezkgivbjpQiDclsbIqtSg/vqg0J7X4EKM0B4uSOO/TvGOR QgLpiSWp2ampBalFMFkmDk6pBsaVv7sqNPRyBX9euH7q528e46M3eo88rCiaHRw7s+3L+2OP Ph27pijv+dGes6jTecMVDoaUf7Pfymk1bfJYN/MQq//d87NO16smyEbd8Cla5O6sPi1/Veh2 q1iWddbOylln/8Z628Wui15i97/zBafUsgd178NiLq4Rl80SP/q0JCFw/r/YNxxKLMUZiYZa zEXFiQBtGZmNYwIAAA== X-CMS-MailID: 20200319150707epcas5p12cd31988fe8d11357519ddaee1b98ef9 X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200319150707epcas5p12cd31988fe8d11357519ddaee1b98ef9 References: <20200319150031.11024-1-alim.akhtar@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This adds Exynos Universal Flash Storage (UFS) Host Controller DT bindings. Signed-off-by: Seungwon Jeon Signed-off-by: Alim Akhtar --- .../devicetree/bindings/ufs/ufs-exynos.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/ufs-exynos.txt diff --git a/Documentation/devicetree/bindings/ufs/ufs-exynos.txt b/Documentation/devicetree/bindings/ufs/ufs-exynos.txt new file mode 100644 index 000000000000..08e2d1497b1b --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ufs-exynos.txt @@ -0,0 +1,104 @@ +* Exynos Universal Flash Storage (UFS) Host Controller + +UFSHC nodes are defined to describe on-chip UFS host controllers. +Each UFS controller instance should have its own node. + +Required properties: +- compatible : compatible name, contains "samsung,exynos7-ufs" +- interrupts : +- reg : Should contain HCI, vendor specific, UNIPRO and + UFS protector address space +- reg-names : "hci", "vs_hci", "unipro", "ufsp"; + +Optional properties: +- vdd-hba-supply : phandle to UFS host controller supply regulator node +- vcc-supply : phandle to VCC supply regulator node +- vccq-supply : phandle to VCCQ supply regulator node +- vccq2-supply : phandle to VCCQ2 supply regulator node +- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V + or 2.7-3.6V. This boolean property when set, specifies + to use low voltage range of 1.7-1.95V. Note for external + UFS cards this property is invalid and valid VCC range is + always 2.7-3.6V. +- vcc-max-microamp : specifies max. load that can be drawn from vcc supply +- vccq-max-microamp : specifies max. load that can be drawn from vccq supply +- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply +- -fixed-regulator : boolean property specifying that -supply is a fixed regulator + +- clocks : List of phandle and clock specifier pairs +- clock-names : List of clock input name strings sorted in the same + order as the clocks property. + "core", "sclk_unipro_main", "ref" and ref_parent + +- freq-table-hz : Array of operating frequencies stored in the same + order as the clocks property. If this property is not + defined or a value in the array is "0" then it is assumed + that the frequency is set by the parent clock or a + fixed rate clock source. +- pclk-freq-avail-range : specifies available frequency range(min/max) for APB clock +- ufs,pwr-attr-mode : specifies mode value for power mode change, possible values are + "FAST", "SLOW", "FAST_auto" and "SLOW_auto" +- ufs,pwr-attr-lane : specifies lane count value for power mode change + allowed values are 1 or 2 +- ufs,pwr-attr-gear : specifies gear count value for power mode change + allowed values are 1 or 2 +- ufs,pwr-attr-hs-series : specifies HS rate series for power mode change + can be one of "HS_rate_b" or "HS_rate_a" +- ufs,pwr-local-l2-timer : specifies array of local UNIPRO L2 timer values + 3 timers supported + +- ufs,pwr-remote-l2-timer : specifies array of remote UNIPRO L2 timer values + 3 timers supported + +- ufs-rx-adv-fine-gran-sup_en : specifies support of fine granularity of MPHY, + this is a boolean property. +- ufs-rx-adv-fine-gran-step : specifies granularity steps of MPHY, + allowed step size is 0 to 3 +- ufs-rx-adv-min-activate-time-cap : specifies rx advanced minimum activate time of MPHY + range is 1 to 9 +- ufs-pa-granularity : specifies Granularity for PA_TActivate and PA_Hibern8Time +- ufs-pa-tacctivate : specifies time to wake-up remote M-RX +- ufs-pa-hibern8time : specifies minimum time to wait in HIBERN8 state + +Note: If above properties are not defined it can be assumed that the supply +regulators or clocks are always on. + +Example: + ufshc@0x15570000 { + compatible = "samsung,exynos7-ufs"; + reg = <0x15570000 0x100>, + <0x15570100 0x100>, + <0x15571000 0x200>, + <0x15572000 0x300>; + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <0 200 0>; + + vdd-hba-supply = <&xxx_reg0>; + vdd-hba-fixed-regulator; + vcc-supply = <&xxx_reg1>; + vcc-supply-1p8; + vccq-supply = <&xxx_reg2>; + vccq2-supply = <&xxx_reg3>; + vcc-max-microamp = 500000; + vccq-max-microamp = 200000; + vccq2-max-microamp = 200000; + + clocks = <&core 0>, <&ref 0>, <&iface 0>; + clock-names = "core", "sclk_unipro_main", "ref", "ref_parent"; + freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>; + + pclk-freq-avail-range = <70000000 133000000>; + + ufs,pwr-attr-mode = "FAST"; + ufs,pwr-attr-lane = <2>; + ufs,pwr-attr-gear = <2>; + ufs,pwr-attr-hs-series = "HS_rate_b"; + ufs,pwr-local-l2-timer = <8000 28000 20000>; + ufs,pwr-remote-l2-timer = <12000 32000 16000>; + ufs-rx-adv-fine-gran-sup_en = <1>; + ufs-rx-adv-fine-gran-step = <3>; + ufs-rx-adv-min-activate-time-cap = <9>; + ufs-pa-granularity = <6>; + ufs-pa-tacctivate = <6>; + ufs-pa-hibern8time = <20>; + }; From patchwork Thu Mar 19 15:00:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 213521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1856FC5518B for ; Thu, 19 Mar 2020 15:07:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E5F1C2137B for ; Thu, 19 Mar 2020 15:07:20 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Thu, 19 Mar 2020 15:07:12 +0000 (GMT) X-AuditID: b6c32a4a-353ff700000012aa-d4-5e738aa0ed70 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id 47.C7.04158.F9A837E5; Fri, 20 Mar 2020 00:07:11 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.108.73.139]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20200319150710epsmtip2adc5f1a20c9c7e26761a97114114bbbb~9vPr9SItU0525805258epsmtip2N; Thu, 19 Mar 2020 15:07:09 +0000 (GMT) From: Alim Akhtar To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-scsi@vger.kernel.org Cc: krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v3 5/5] arm64: dts: Add node for ufs exynos7 Date: Thu, 19 Mar 2020 20:30:31 +0530 Message-Id: <20200319150031.11024-6-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200319150031.11024-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIKsWRmVeSWpSXmKPExsWy7bCmuu6CruI4g3vzhCwezNvGZvHy51U2 i0/rl7FazD9yjtXi/PkN7BY3txxlsdj0+BqrxeVdc9gsZpzfx2TRfX0Hm8Xy4/+YLFr3HmG3 WLr1JqMDr8flvl4mj02rOtk8Ni+p92g5uZ/F4+PTWywefVtWMXp83iTn0X6gmymAI4rLJiU1 J7MstUjfLoEr493m98wFx6Qq+tY0MDUwHhTtYuTkkBAwkVj3ZyVzFyMXh5DAbkaJCzMmQjmf GCVOLrrABuF8Y5Ton3CNBabl+t1fUIm9jBJLfrSAJYQEWpgk/m1SA7HZBLQl7k7fwgRiiwgE SFx6fxCsgVlgHpPEokc9YAlhARuJu5tvsYHYLAKqEssWrmMGsXmB4le6+tkhtslLrN5wACzO KWArMefCdRaQQRICt9kknizdBnWSi8T0KxugGoQlXh3fAmVLSbzsbwOyOYDsbImeXcYQ4RqJ pfOOQbXaSxy4MocFpIRZQFNi/S59kDCzAJ9E7+8nTBCdvBIdbUIQ1aoSze+uQnVKS0zs7maF sD0k+k4cgIbJBEaJWw9msU9glJ2FMHUBI+MqRsnUguLc9NRi0wKjvNRyveLE3OLSvHS95Pzc TYzghKLltYNx2TmfQ4wCHIxKPLwz2orjhFgTy4orcw8xSnAwK4nw6qYDhXhTEiurUovy44tK c1KLDzFKc7AoifNOYr0aIySQnliSmp2aWpBaBJNl4uCUamDkmxLHoup44I+O9/M/NvecBPQn Hz12eXeFz/wix/nZ51q6v66yPP69269UxC3uat7jRywMLl63V04/e+x0sV773k8pu1jW2rje vWSn5rXv9OqCjNwZ5VYXd/JGlB5y0H4cXMpw53/gFW1xMfZrjzNmPxPj4TnQ2bF9Pqf7M6b2 8GtNW5QbHsoqsRRnJBpqMRcVJwIAsXinLiQDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsWy7bCSvO78ruI4gwdfbSwezNvGZvHy51U2 i0/rl7FazD9yjtXi/PkN7BY3txxlsdj0+BqrxeVdc9gsZpzfx2TRfX0Hm8Xy4/+YLFr3HmG3 WLr1JqMDr8flvl4mj02rOtk8Ni+p92g5uZ/F4+PTWywefVtWMXp83iTn0X6gmymAI4rLJiU1 J7MstUjfLoEr493m98wFx6Qq+tY0MDUwHhTtYuTkkBAwkbh+9xdbFyMXh5DAbkaJPzO/MUMk pCWub5zADmELS6z895wdoqiJSWLixnZGkASbgLbE3elbmEBsEYEgiXtr1rKCFDELrGKS6Ow9 C1YkLGAjcXfzLTYQm0VAVWLZwnVgG3iB4le6+qE2yEus3nAALM4pYCsx58J1FhBbCKim89U1 tgmMfAsYGVYxSqYWFOem5xYbFhjlpZbrFSfmFpfmpesl5+duYgQHtJbWDsYTJ+IPMQpwMCrx 8Dq0FMcJsSaWFVfmHmKU4GBWEuHVTQcK8aYkVlalFuXHF5XmpBYfYpTmYFES55XPPxYpJJCe WJKanZpakFoEk2Xi4JRqYFxzQzxD5tDrO/ftlyhfk4/S+sY1UW759HVN6Xl9pzY0MjPNCEl2 vm99n/dGYvK39yZm6TzlUlH31mt0B4fIzMy+aKSnGCbrWnnYyylqydqj4nKxs8Iud/yTDFu5 bFfc02WcYU7b/7T/WpnhVZMeWld+Z+cSlxMWXNqZHXz3PZfMmHHiTrfLNyWW4oxEQy3mouJE ACQ6OEpkAgAA X-CMS-MailID: 20200319150712epcas5p24e99ea681e65e14cd2ca815b78ad0957 X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200319150712epcas5p24e99ea681e65e14cd2ca815b78ad0957 References: <20200319150031.11024-1-alim.akhtar@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Adding dt node foe UFS and UFS-PHY for exynos7 SoC. Signed-off-by: Alim Akhtar --- .../boot/dts/exynos/exynos7-espresso.dts | 16 +++++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 43 ++++++++++++++++++- 2 files changed, 57 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index 7af288fa9475..b59a0a32620a 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -406,6 +406,22 @@ }; }; +&ufs { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + ufs,pwr-attr-mode = "FAST"; + ufs,pwr-attr-lane = <2>; + ufs,pwr-attr-gear = <2>; + ufs,pwr-attr-hs-series = "HS_rate_b"; + ufs-rx-adv-fine-gran-sup_en = <1>; + ufs-rx-adv-fine-gran-step = <3>; + ufs-rx-adv-min-activate-time-cap = <9>; + ufs-pa-granularity = <6>; + ufs-pa-tacctivate = <3>; + ufs-pa-hibern8time = <20>; +}; + &usbdrd_phy { vbus-supply = <&usb30_vbus_reg>; vbus-boost-supply = <&usb3drd_boost_5v>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 5558045637ac..9d16c90edd07 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -220,9 +220,14 @@ #clock-cells = <1>; clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>, <&clock_top1 DOUT_SCLK_MMC0>, - <&clock_top1 DOUT_SCLK_MMC1>; + <&clock_top1 DOUT_SCLK_MMC1>, + <&clock_top1 DOUT_SCLK_UFSUNIPRO20>, + <&clock_top1 DOUT_SCLK_PHY_FSYS1>, + <&clock_top1 DOUT_SCLK_PHY_FSYS1_26M>; clock-names = "fin_pll", "dout_aclk_fsys1_200", - "dout_sclk_mmc0", "dout_sclk_mmc1"; + "dout_sclk_mmc0", "dout_sclk_mmc1", + "dout_sclk_ufsunipro20", "dout_sclk_phy_fsys1", + "dout_sclk_phy_fsys1_26m"; }; serial_0: serial@13630000 { @@ -601,6 +606,40 @@ }; }; + ufs: ufs@15570000 { + compatible = "samsung,exynos7-ufs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x15570000 0x100>, /* 0: HCI standard */ + <0x15570100 0x100>, /* 1: Vendor specificed */ + <0x15571000 0x200>, /* 2: UNIPRO */ + <0x15572000 0x300>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&clock_fsys1 ACLK_UFS20_LINK>, + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pclk-freq-avail-range = <70000000 133000000>; + ufs,pwr-local-l2-timer = <8000 28000 20000>; + ufs,pwr-remote-l2-timer = <12000 32000 16000>; + phys = <&ufs_phy>; + phy-names = "ufs-phy"; + status = "disabled"; + }; + + ufs_phy: ufs-phy@0x15571800 { + compatible = "samsung,exynos7-ufs-phy"; + reg = <0x15571800 0x240>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys1 MOUT_FSYS1_PHYCLK_SEL1>, + <&clock_top1 CLK_SCLK_PHY_FSYS1_26M>; + clock-names = "ref_clk_parent", "ref_clk"; + }; + usbdrd_phy: phy@15500000 { compatible = "samsung,exynos7-usbdrd-phy"; reg = <0x15500000 0x100>;