From patchwork Thu Mar 19 19:02:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 212545 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79CA0C4332D for ; Thu, 19 Mar 2020 19:04:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48FAB20754 for ; Thu, 19 Mar 2020 19:04:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="hdZiJC4z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727533AbgCSTEP (ORCPT ); Thu, 19 Mar 2020 15:04:15 -0400 Received: from mail-lf1-f67.google.com ([209.85.167.67]:38170 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726589AbgCSTEM (ORCPT ); Thu, 19 Mar 2020 15:04:12 -0400 Received: by mail-lf1-f67.google.com with SMTP id n13so2575483lfh.5; Thu, 19 Mar 2020 12:04:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AlGN/9KxfqGP1gha8cnpAV1qjiffCVac50q6n9Lx2fc=; b=hdZiJC4z0SdQqSyWftZwUgVtGcjthk7l45qSR1wQTB9u37zfMyrwHIx5GlsSx57aLs 0/RU9gjAKCJipg32LTOoe7jX1MYQ3m0KR7IHp5sz8cwbI7TMsSeHDHDkGVVnAqiJD6nO mfEJILqQ4G2BpCOnwLEIXbzYjl2FeVGpkwmPSnkQNRxUybXap2Si5WpBgIxXwoBIeAUA iJaa8SzoCu4wY4Ak2F5kL/8yaRo1G+v7BcW0rdcRKEmkNGcfRjqxLo0Zr+zkeGU3LvlP wx3Rw9lbhv+fTstB2uF8xRam24n5N9AaQNCDAz9oK91qo4QvyFgU5msjGp+BwBtV1PSV YhpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AlGN/9KxfqGP1gha8cnpAV1qjiffCVac50q6n9Lx2fc=; b=P6t3ooIo2HN3hIP+l5RTr65n3M/cEdMOOdlHNBe5XKPh/XlbHEHUkLYFFPZ5VdgGNY iEAtGOsHSlzzkD/uwMOdfwhqPGTjCAtSwZvE4JezV2t/ODAYNN6XRMGgrUSszkVeXfEd OCAjPpQAyBIRyldTcgZp53tz2f8/3Zr1bOQdTCU6JUx/UtsSJqbcTPedTxo3o4Stcwi6 f5oVG8eiRaWQTTpnZgKwm0PxCIO8ycfxbVUVq4UtNZCNMLOdjhiRPtQ188e4pOALEIxR uu2nuEI8e9PiFuv7R+0OwBO9eV8QjtiIvisFVUtNywg2f20BykuGyoXJz8gbLMWdqS9E 37rw== X-Gm-Message-State: ANhLgQ0wuS+iJYT5KzCLtbuXtU+BuCq2AYHey4b8114YFMzrz8TkG3XM w2grvQX2RGdui9EkpdS3ZYg= X-Google-Smtp-Source: ADFU+vt1ZXbG+Xg7AuEkHJu+k3N6+eh1nkUz9bxUj9O/sc9v+WC6JGwJKZXoUTupdzN3gYl+JvVjtQ== X-Received: by 2002:ac2:4145:: with SMTP id c5mr3009914lfi.19.1584644649164; Thu, 19 Mar 2020 12:04:09 -0700 (PDT) Received: from localhost.localdomain (94-29-39-224.dynamic.spd-mgts.ru. [94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:08 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 02/12] clk: tegra: pll: Add pre/post rate-change hooks Date: Thu, 19 Mar 2020 22:02:19 +0300 Message-Id: <20200319190229.32200-3-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org There is a need to temporarily re-parent CCLK away from PLLX if PLLX's rate is about to change. The newly introduced PLL pre/post rate-change hooks allow to handle such case. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-pll.c | 12 +++++++++++- drivers/clk/tegra/clk.h | 6 ++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 531c2b3d814e..0b212cf2e794 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -744,13 +744,19 @@ static int _program_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, state = clk_pll_is_enabled(hw); + if (state && pll->params->pre_rate_change) { + ret = pll->params->pre_rate_change(); + if (WARN_ON(ret)) + return ret; + } + _get_pll_mnp(pll, &old_cfg); if (state && pll->params->defaults_set && pll->params->dyn_ramp && (cfg->m == old_cfg.m) && (cfg->p == old_cfg.p)) { ret = pll->params->dyn_ramp(pll, cfg); if (!ret) - return 0; + goto done; } if (state) { @@ -772,6 +778,10 @@ static int _program_pll(struct clk_hw *hw, struct tegra_clk_pll_freq_table *cfg, pll_clk_start_ss(pll); } +done: + if (state && pll->params->post_rate_change) + pll->params->post_rate_change(); + return ret; } diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 412d4b47ecfd..e67c19eadb19 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -266,6 +266,10 @@ struct tegra_clk_pll; * disabled. * @dyn_ramp: Callback which can be used to define a custom * dynamic ramp function for a given PLL. + * @pre_rate_change: Callback which is invoked just before changing + * PLL's rate. + * @post_rate_change: Callback which is invoked right after changing + * PLL's rate. * * Flags: * TEGRA_PLL_USE_LOCK - This flag indicated to use lock bits for @@ -342,6 +346,8 @@ struct tegra_clk_pll_params { void (*set_defaults)(struct tegra_clk_pll *pll); int (*dyn_ramp)(struct tegra_clk_pll *pll, struct tegra_clk_pll_freq_table *cfg); + int (*pre_rate_change)(void); + void (*post_rate_change)(void); }; #define TEGRA_PLL_USE_LOCK BIT(0) From patchwork Thu Mar 19 19:02:22 2020 Content-Type: text/plain; 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[94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:13 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 05/12] clk: tegra30: Use custom CCLK implementation Date: Thu, 19 Mar 2020 22:02:22 +0300 Message-Id: <20200319190229.32200-6-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org We're going to use the generic cpufreq-dt driver on Tegra30 and thus CCLK intermediate re-parenting will be performed by the clock driver. There is now special CCLK implementation that supports all CCLK quirks, this patch makes Tegra30 SoCs to use that implementation. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- drivers/clk/tegra/clk-tegra30.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 3255f82e61b5..37244a7e68c2 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -499,6 +499,8 @@ static struct tegra_clk_pll_params pll_x_params __ro_after_init = { .freq_table = pll_x_freq_table, .flags = TEGRA_PLL_HAS_CPCON | TEGRA_PLL_SET_DCCON | TEGRA_PLL_USE_LOCK | TEGRA_PLL_HAS_LOCK_ENABLE, + .pre_rate_change = tegra_cclk_pre_pllx_rate_change, + .post_rate_change = tegra_cclk_post_pllx_rate_change, }; static struct tegra_clk_pll_params pll_e_params __ro_after_init = { @@ -926,11 +928,11 @@ static void __init tegra30_super_clk_init(void) clk_register_clkdev(clk, "pll_p_out4_cclkg", NULL); /* CCLKG */ - clk = tegra_clk_register_super_mux("cclk_g", cclk_g_parents, + clk = tegra_clk_register_super_cclk("cclk_g", cclk_g_parents, ARRAY_SIZE(cclk_g_parents), CLK_SET_RATE_PARENT, clk_base + CCLKG_BURST_POLICY, - 0, 4, 0, 0, NULL); + 0, NULL); clks[TEGRA30_CLK_CCLK_G] = clk; /* From patchwork Thu Mar 19 19:02:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 212540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45E10C43332 for ; Thu, 19 Mar 2020 19:04:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1F48C20663 for ; Thu, 19 Mar 2020 19:04:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fgDbP8zs" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726867AbgCSTEY (ORCPT ); Thu, 19 Mar 2020 15:04:24 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:45534 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727605AbgCSTES (ORCPT ); Thu, 19 Mar 2020 15:04:18 -0400 Received: by mail-lj1-f194.google.com with SMTP id y17so3738483ljk.12; Thu, 19 Mar 2020 12:04:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QuRqkZzuBA2/gmQ7xtdmACyr3vk58NcEc2vx8jtn50U=; b=fgDbP8zsUAW9bA62o3tLbYLIVEbM2eTutxjzwU3WD7St4VHgYg6sc3FbITh2C1JgJ1 DIkXLFmvcV8rb6MQgtt2svBglbhbtkJVwK3X3rItTf6xPcPlKk6Bv6HznqLmPT3eZWkt 0Q+k1X62dpHvSIFnda1AdpsbIySHIrKRxEZMcnJ9Qh8pHXH3ovG464TFpb0wVFtTIX2I AyYcJHwC0sExsxh2uyFX8VBDQ16yq39jEJ79q9XZ9xVCiSJyBc2Jx2BLIe1fc5qQ3wY8 BSusDPzzRov1m5N3QvM35ET8xF1LACtVdUjEkc3jhDZmFTMS23ak2dKVpOXxhqoRUEwY GvoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QuRqkZzuBA2/gmQ7xtdmACyr3vk58NcEc2vx8jtn50U=; b=H+BoippxQhAlY+EmTat5nFJcZyWk7oEdODyXrkRnIpZeV8QvoGnVRHjqpg9cu0XvWu iCQf2z3j71cnvOX9B925c/3CjtVqj99ZhgXKQ908BN0FkJrJBzKQ+G0DDhNGVpQxRybw KlNW/cKphg5Fvi2Guc46eapNZSrpBKwwJ77dSdABH4B/iqms4UzohCuoER95OfH+vHYg 9nFw8S6/YmTqY2rH4QtHOadD0n4dpMcYmwEcPtWhC4o/6YJI1jULa+EcFalsx3WHkRyi xdqjHswDSlYtFpo0/ZBpgzi3pmpluEZS3LJdM2sHK/6KtSKgAyuQkQcBE4C53qRsTeBm fU1w== X-Gm-Message-State: ANhLgQ0lAZNJj5NDfc+m5sVfg/OmhM43efcqRYa/U9J+NOofdAz0anto baRxbJGxDBqQc595gS1PvLo= X-Google-Smtp-Source: ADFU+vsyNXvrrCmF9RHJb8MzXpeuDppLJbR+WLUOx2J32CGevDmUiS8+zyoVSdTm79PbsRfRxQS9cw== X-Received: by 2002:a05:651c:1190:: with SMTP id w16mr3019696ljo.119.1584644654870; Thu, 19 Mar 2020 12:04:14 -0700 (PDT) Received: from localhost.localdomain (94-29-39-224.dynamic.spd-mgts.ru. [94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:14 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 06/12] ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 Date: Thu, 19 Mar 2020 22:02:23 +0300 Message-Id: <20200319190229.32200-7-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The early-resume code shall not switch CPU to PLLX because PLLX configuration could be unstable or PLLX should be simply disabled if CPU enters into suspend running off some other PLL (the case if CPUFREQ driver is active). The actual burst policy is restored by the clock drivers. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/sleep-tegra30.S | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index e7bcf7dc4675..9942265ed650 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -398,11 +398,8 @@ _pll_m_c_x_done: ldr r4, [r5, #0x1C] @ restore SCLK_BURST str r4, [r0, #CLK_RESET_SCLK_BURST] - cmp r10, #TEGRA30 - movweq r4, #:lower16:((1 << 28) | (0x8)) @ burst policy is PLLX - movteq r4, #:upper16:((1 << 28) | (0x8)) - movwne r4, #:lower16:((1 << 28) | (0xe)) - movtne r4, #:upper16:((1 << 28) | (0xe)) + movw r4, #:lower16:((1 << 28) | (0x4)) @ burst policy is PLLP + movt r4, #:upper16:((1 << 28) | (0x4)) str r4, [r0, #CLK_RESET_CCLK_BURST] /* Restore pad power state to normal */ From patchwork Thu Mar 19 19:02:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 212543 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43233C4332E for ; Thu, 19 Mar 2020 19:04:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 15C0620767 for ; Thu, 19 Mar 2020 19:04:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="oSCaS/SY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727721AbgCSTE0 (ORCPT ); Thu, 19 Mar 2020 15:04:26 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:34432 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727532AbgCSTEU (ORCPT ); Thu, 19 Mar 2020 15:04:20 -0400 Received: by mail-lj1-f195.google.com with SMTP id s13so3803315ljm.1; Thu, 19 Mar 2020 12:04:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6NDM3y718xZuy8aOtgXuzMNzfqLpqznJlVGk7yDXVsI=; b=oSCaS/SYuXxnhdgHKyWrJhoZyTBX5rU/amUONz2Ljsi/UiU7X9UhOb6QOCdMI9hK7Z Eg3hP/HymfYWM547Fz875jonQgbas/3ZQDC5ZoVellGkCAKC6iMxYLEZy2J7oCaiNMfO UH4+I/++JolujZGrZ3u0P+NaL0MOs+O3UH/4W41YsdjdP1mZUck7aEbkFrKmt4kg3fnB 2jashczYx/oyzhIf+uB/NYO8Tg0tUBEML5MWUDykUxQUfPDf9IHYoI+AHBCMt/kHYmjr vx/lyT/ODByTEil/EPM2sM0/6PQi+94rfHaMEwPA5tI7OD+29A1P2F3RZQ9M0GSYohnw TdNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6NDM3y718xZuy8aOtgXuzMNzfqLpqznJlVGk7yDXVsI=; b=USLp0Dj/KUc5kAXvkiCGWeoVwZ/TmDqEfeqkYMmoc9dR/x/d1dsL/Fls0eV3CYIvnJ ngv9rrHN73I4yu1nY3qT/CuMP3R+/WdOdPklMhkEbHdgD2jGwyqWY1+EYAjVPgGrANza HWFADgzF37GZXNsTY5xFlRJPh5Cb/IHUxi0aTzwMwnj2xZat8vRrXU2rZdSmQGoqEL7c dUOQAQVrCdMN5IMNO7T9NMGjgWZ8y05taKEUsBiiFFQAQUY3JJNqSLsEbrgpSB8/kitW G4tbbPgMYAO0tCtWBtDktRpAhgiApP/cMiErnLWmUm1r/SDT2Hp93H1ycW0KVYUpyNot d+Vg== X-Gm-Message-State: ANhLgQ3ZBGjC3CMQZRrV63OjFrwm1uwDXIjT54tiQ1k/o5ZwcYgQWNQj q3/mWv3SLm5tM6eL5NbIt9Q= X-Google-Smtp-Source: ADFU+vsT7jEftmMyIkFi6InTDoQcYx/pXDz1dObMgQwcHj/ITyzMDqlO3CNcFOHP4By0rSwhidK8Pg== X-Received: by 2002:a2e:860e:: with SMTP id a14mr2934829lji.218.1584644658471; Thu, 19 Mar 2020 12:04:18 -0700 (PDT) Received: from localhost.localdomain (94-29-39-224.dynamic.spd-mgts.ru. [94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:17 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 08/12] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30 Date: Thu, 19 Mar 2020 22:02:25 +0300 Message-Id: <20200319190229.32200-9-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add device-tree binding that describes CPU frequency-scaling hardware found on NVIDIA Tegra20/30 SoCs. Acked-by: Viresh Kumar Reviewed-by: Rob Herring Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- .../cpufreq/nvidia,tegra20-cpufreq.txt | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt diff --git a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt new file mode 100644 index 000000000000..daeca6ae6b76 --- /dev/null +++ b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt @@ -0,0 +1,56 @@ +Binding for NVIDIA Tegra20 CPUFreq +================================== + +Required properties: +- clocks: Must contain an entry for the CPU clock. + See ../clocks/clock-bindings.txt for details. +- operating-points-v2: See ../bindings/opp/opp.txt for details. +- #cooling-cells: Should be 2. See ../thermal/thermal.txt for details. + +For each opp entry in 'operating-points-v2' table: +- opp-supported-hw: Two bitfields indicating: + On Tegra20: + 1. CPU process ID mask + 2. SoC speedo ID mask + + On Tegra30: + 1. CPU process ID mask + 2. CPU speedo ID mask + + A bitwise AND is performed against these values and if any bit + matches, the OPP gets enabled. + +- opp-microvolt: CPU voltage triplet. + +Optional properties: +- cpu-supply: Phandle to the CPU power supply. + +Example: + regulators { + cpu_reg: regulator0 { + regulator-name = "vdd_cpu"; + }; + }; + + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@456000000 { + clock-latency-ns = <125000>; + opp-microvolt = <825000 825000 1125000>; + opp-supported-hw = <0x03 0x0001>; + opp-hz = /bits/ 64 <456000000>; + }; + + ... + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + clocks = <&tegra_car TEGRA20_CLK_CCLK>; + operating-points-v2 = <&cpu0_opp_table>; + cpu-supply = <&cpu_reg>; + #cooling-cells = <2>; + }; + }; From patchwork Thu Mar 19 19:02:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 212541 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2AE16C4332D for ; Thu, 19 Mar 2020 19:04:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 055FF2072C for ; Thu, 19 Mar 2020 19:04:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="feeFqaI4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727706AbgCSTEZ (ORCPT ); Thu, 19 Mar 2020 15:04:25 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:36054 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727279AbgCSTEY (ORCPT ); Thu, 19 Mar 2020 15:04:24 -0400 Received: by mail-lf1-f66.google.com with SMTP id s1so2572595lfd.3; Thu, 19 Mar 2020 12:04:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mrx6enxmE5rGr1bvvcfpjzqZxRZxQ6z8sM9vbLY+H/I=; b=feeFqaI46hVNYGlFk9z5z8b8cY+jQXz/JovqRmRA5Y/CQe1uu3pwO+f5l3joj3c4zE 2TglVxKJ20Wj0TGqnXUSNqH9lTlXHneovS2C7AJBT5uEkxnFDfv7Eq1h7RzoQF2QxapU Bylr0doMH17gs67TxYqxTe6fpyvA0a3W6ZDT3VGA7L8JwcxZ1LgAgG37cFurV7C782gS Dszu/KoD7oSpvAsrBbp5JhAfVm6FGUqWCZrI+vGjxKFnNTRyAx8l314BM1S47o9fOMEZ zL+lPmzDwBb1Cw0p/GBvk6rvQNEBzTUFS33lXROlnOqNmcSv/RcpO8KfgU+2CXRr22ay FiRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mrx6enxmE5rGr1bvvcfpjzqZxRZxQ6z8sM9vbLY+H/I=; b=QHTJnkr3tYC+6GCJUOpEaaJpUi5lTWxc+3BpYpKx6RxjkDTFjqYEkG8CepWQQHLX9z BfeNcFM6R30vg9ThP3lamuU0rom1mKrD1Lxc3ZJSj3zqo1aywkU6MoiRuyf+F9W+lluy ZJC3AJC94tXYXN/ChkuHxoFsCL+YfKRFMHGlV5TtJFhBJ9xLkgWvsjW0vDr7j0hZpG8B oXtlJSvBMe3cyRu6KXm8TijsU0J33BqP4sVHum9DPxNGXG4vOBFBqdmzYYbw20zuPgaE bLVxPmxB0eyls++UBj5XQmNx84Hp89mOKRSsqJhGhusTHzV0snDoGfRPeDYNmyUsZyOe wXAA== X-Gm-Message-State: ANhLgQ0V3zZoket7Yx6IjYoVbbZS77esbmNzxQtyoXScuPThO7mRkXY+ XBqDOkwcsS4yGsDUYPH1pcA= X-Google-Smtp-Source: ADFU+vtxnrQyRT7PRmc8o2TVUmUf9rkCCQABxJ6M4QeuS21nsc7NRq2i/38MAs9/zAkrZgDeGzCXjA== X-Received: by 2002:a19:4350:: with SMTP id m16mr2981697lfj.67.1584644661668; Thu, 19 Mar 2020 12:04:21 -0700 (PDT) Received: from localhost.localdomain (94-29-39-224.dynamic.spd-mgts.ru. [94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:21 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 10/12] ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 Date: Thu, 19 Mar 2020 22:02:27 +0300 Message-Id: <20200319190229.32200-11-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The tegra20-cpufreq now instantiates cpufreq-dt and Tegra30 is fully supported by that driver. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Marcel Ziswiler Tested-by: Jasper Korten Tested-by: David Heidelberg Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/tegra.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index f1ce2857a251..3882a6c66969 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -96,6 +96,10 @@ static void __init tegra_dt_init_late(void) if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); + + if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && + of_machine_is_compatible("nvidia,tegra30")) + platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); } static const char * const tegra_dt_board_compat[] = { From patchwork Thu Mar 19 19:02:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 212542 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35D88C4332E for ; Thu, 19 Mar 2020 19:04:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 02B5220774 for ; Thu, 19 Mar 2020 19:04:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="La/uSPx8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727803AbgCSTE2 (ORCPT ); Thu, 19 Mar 2020 15:04:28 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:35735 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727605AbgCSTE2 (ORCPT ); Thu, 19 Mar 2020 15:04:28 -0400 Received: by mail-lf1-f65.google.com with SMTP id m15so2585204lfp.2; Thu, 19 Mar 2020 12:04:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FzD7KM1adJ8Gdad+SjbdNnB2giwK8d8O4lhpA1iChjI=; b=La/uSPx8FTVei4FU1VbWMVxuNbaBvJfMTXeORDKylSu+QXDz+dxViJJlI31XLVT5fl KADAGdkDgWWfN63q0601+IsmlJVBm4EHCl4LWxvjMiOf255nzjLer+RTZqMkhVzSe0rM Q0sMbTnR6J+HgVFsZOYnjh+4FApTXfv0TxEqfTLQRg72QMPTrWcSpoZxdp2g8SkxFxs+ dLKBK4l0yEs7mnnMHD07skmYV9KkeYkvJjmLun/S1cWMHO+dPSK+yDD01dVeQQOrn/84 tnrh/Kws8GJU+XW2RSWWpqwa/Itc5fa0fkbV10PDe21uUPITgwmZqCJ3jnQrf3XAySqP m0Qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FzD7KM1adJ8Gdad+SjbdNnB2giwK8d8O4lhpA1iChjI=; b=X9MMtvrhf7ElfqQipc/TAcQaw9SHQUUcHvJNKt5cVhmAYir6jRQ57j20LWXQiLz/Tu 4xh8xSG1nGIkrRoFbAxi//UgBEO5X1tpDyMPS97oMdGPoKnYZc0Dc/Hyrh4cxmhaBVBQ xODKCKgDV1xwjKbvV8MFw73OcS8UbVXSLxBWBOzbxjLJDp0cgVbkbJ0cH1EEOr8hXy+n XdP8inDcZLICnkMp3d1bzzWJPPpJgv605MmmajS/wgG7INJMMVefA/O24dv44oHj4FhO 2bTYPXS3OHvGpVo9TLjGtBF7qWbJDSXqXaTzEfpc5sPOidoKkXp7qAnL3S7UsNHIYh4t kjuA== X-Gm-Message-State: ANhLgQ0LDqDBMI5dYhZJyF/x0FjVO454urARoIHxQ8sk3v4XqV35Al5W JbreBYcRcml/Px5zyLTxXpI= X-Google-Smtp-Source: ADFU+vvXgwoXHt8F4Hhxl+v/+A9sCmOkV1/dC6+JllXYIW1tUhx3W7HUxzuvar+MVCBV61kah2kmcA== X-Received: by 2002:a05:6512:68b:: with SMTP id t11mr3063580lfe.214.1584644664509; Thu, 19 Mar 2020 12:04:24 -0700 (PDT) Received: from localhost.localdomain (94-29-39-224.dynamic.spd-mgts.ru. [94.29.39.224]) by smtp.gmail.com with ESMTPSA id k14sm2025380lfg.96.2020.03.19.12.04.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 12:04:23 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , Prashant Gaikwad , "Rafael J. Wysocki" , Viresh Kumar , Michael Turquette , Stephen Boyd , Peter Geis , Nicolas Chauvet , Marcel Ziswiler , =?utf-8?b?TWljaGHFgiBN?= =?utf-8?q?iros=C5=82aw?= , Jasper Korten , David Heidelberg Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 12/12] ARM: dts: tegra30: beaver: Add CPU Operating Performance Points Date: Thu, 19 Mar 2020 22:02:29 +0300 Message-Id: <20200319190229.32200-13-digetx@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200319190229.32200-1-digetx@gmail.com> References: <20200319190229.32200-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Utilize common Tegra30 CPU OPP table. CPU DVFS is available now on beaver. Signed-off-by: Dmitry Osipenko --- arch/arm/boot/dts/tegra30-beaver.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index a143cac22340..6b6fd8a8058f 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -2,6 +2,8 @@ /dts-v1/; #include "tegra30.dtsi" +#include "tegra30-cpu-opp.dtsi" +#include "tegra30-cpu-opp-microvolt.dtsi" / { model = "NVIDIA Tegra30 Beaver evaluation board"; @@ -2130,4 +2132,26 @@ sound { assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>, <&tegra_car TEGRA30_CLK_EXTERN1>; }; + + cpus { + cpu0: cpu@0 { + cpu-supply = <&vddctrl_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@1 { + cpu-supply = <&vddctrl_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@2 { + cpu-supply = <&vddctrl_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@3 { + cpu-supply = <&vddctrl_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; };