From patchwork Wed Feb 19 08:22:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211177 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65520C3404D for ; Wed, 19 Feb 2020 08:30:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3B5C52464E for ; Wed, 19 Feb 2020 08:30:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726645AbgBSIaI (ORCPT ); Wed, 19 Feb 2020 03:30:08 -0500 Received: from inva020.nxp.com ([92.121.34.13]:48222 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726638AbgBSIaI (ORCPT ); Wed, 19 Feb 2020 03:30:08 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3A5A01A0A29; Wed, 19 Feb 2020 09:30:07 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C43B71A4976; Wed, 19 Feb 2020 09:30:03 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 48D72402DD; Wed, 19 Feb 2020 16:29:59 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 02/14] mmc: sdhci-esdhc-imx: no fail when no pinctrl available Date: Wed, 19 Feb 2020 16:22:41 +0800 Message-Id: <1582100563-20555-3-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100563-20555-1-git-send-email-haibo.chen@nxp.com> References: <1582100563-20555-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen When using jailhouse to support two Linux on i.MX8MQ EVK, we use the 1st Linux to configure pinctrl for the 2nd Linux. Then the 2nd Linux could use the mmc without pinctrl driver. So give a warning message when no pinctrl available, but no fail probe. Signed-off-by: Haibo Chen Acked-by: Adrian Hunter Acked-by: Linus Walleij --- drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 382f25b2fa45..8c802681ad2c 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -1488,7 +1488,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) imx_data->pinctrl = devm_pinctrl_get(&pdev->dev); if (IS_ERR(imx_data->pinctrl)) { err = PTR_ERR(imx_data->pinctrl); - goto disable_ahb_clk; + dev_warn(mmc_dev(host->mmc), "could not get pinctrl\n"); } if (esdhc_is_usdhc(imx_data)) { From patchwork Wed Feb 19 08:22:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6D13C34022 for ; Wed, 19 Feb 2020 08:30:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AFE442464E for ; Wed, 19 Feb 2020 08:30:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726484AbgBSIaM (ORCPT ); Wed, 19 Feb 2020 03:30:12 -0500 Received: from inva021.nxp.com ([92.121.34.21]:36624 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726354AbgBSIaM (ORCPT ); Wed, 19 Feb 2020 03:30:12 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2979620054C; Wed, 19 Feb 2020 09:30:10 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id B183820478F; Wed, 19 Feb 2020 09:30:06 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 93898402E2; Wed, 19 Feb 2020 16:30:00 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 04/14] mmc: sdhci-esdhc-imx: restore the per_clk rate in PM_RUNTIME Date: Wed, 19 Feb 2020 16:22:43 +0800 Message-Id: <1582100563-20555-5-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100563-20555-1-git-send-email-haibo.chen@nxp.com> References: <1582100563-20555-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen When pm_runtime_suspend is run, a call to SCFW power off the SS (SS is a power domain, usdhc belong to this SS power domain) in which the resource resides is made. The SCFW can power off the SS if no other resource in active in that SS. If so, all state associated with all the resources within the SS that is powered off is lost, this includes the clock rates, clock state etc. When pm_runtime_resume is called, the SS associated with that resource is powered up. But the clocks are left in the default state. This patch restore clock rate in pm_runtime_resume, make sure the clock is right rather than depending on the default state setting by SCFW. Signed-off-by: Haibo Chen Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 9b5afa2514c6..6bcdc5743d94 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -162,6 +162,8 @@ #define ESDHC_FLAG_PMQOS BIT(13) /* The IP state got lost in low power mode */ #define ESDHC_FLAG_STATE_LOST_IN_LPMODE BIT(14) +/* The IP lost clock rate in PM_RUNTIME */ +#define ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME BIT(15) struct esdhc_soc_data { u32 flags; @@ -225,7 +227,8 @@ static struct esdhc_soc_data usdhc_imx8qxp_data = { | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES | ESDHC_FLAG_CQHCI - | ESDHC_FLAG_STATE_LOST_IN_LPMODE, + | ESDHC_FLAG_STATE_LOST_IN_LPMODE + | ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME, }; struct pltfm_imx_data { @@ -1698,6 +1701,9 @@ static int sdhci_esdhc_runtime_resume(struct device *dev) pm_qos_add_request(&imx_data->pm_qos_req, PM_QOS_CPU_DMA_LATENCY, 0); + if (imx_data->socdata->flags & ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME) + clk_set_rate(imx_data->clk_per, pltfm_host->clock); + err = clk_prepare_enable(imx_data->clk_ahb); if (err) goto remove_pm_qos_request; From patchwork Wed Feb 19 08:25:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64DDCC34022 for ; Wed, 19 Feb 2020 08:31:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 411B124656 for ; Wed, 19 Feb 2020 08:31:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726558AbgBSIbt (ORCPT ); Wed, 19 Feb 2020 03:31:49 -0500 Received: from inva021.nxp.com ([92.121.34.21]:38428 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725904AbgBSIbt (ORCPT ); Wed, 19 Feb 2020 03:31:49 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id F3CDC204785; Wed, 19 Feb 2020 09:31:46 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 87877201296; Wed, 19 Feb 2020 09:31:43 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 14510402DD; Wed, 19 Feb 2020 16:31:39 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 06/14] mmc: sdhci-esdhc-imx: add strobe-dll-delay-target support Date: Wed, 19 Feb 2020 16:25:49 +0800 Message-Id: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen strobe-dll-delay-target is the delay cell add on the strobe line. Strobe line the the uSDHC loopback read clock which is use in HS400 mode. Different strobe-dll-delay-target may need to set for different board/SoC. If this delay cell is not set to an appropriate value, we may see some read operation meet CRC error after HS400 mode select which already pass the tuning. This patch add the strobe-dll-delay-target setting in driver, so that user can easily config this delay cell in dts file. Signed-off-by: Haibo Chen Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 12 +++++++++++- include/linux/platform_data/mmc-esdhc-imx.h | 1 + 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 6bcdc5743d94..3359153304a3 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -73,6 +73,7 @@ #define ESDHC_STROBE_DLL_CTRL 0x70 #define ESDHC_STROBE_DLL_CTRL_ENABLE (1 << 0) #define ESDHC_STROBE_DLL_CTRL_RESET (1 << 1) +#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 #define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3 #define ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT (4 << 20) @@ -993,6 +994,9 @@ static int esdhc_change_pinstate(struct sdhci_host *host, */ static void esdhc_set_strobe_dll(struct sdhci_host *host) { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); + u32 strobe_delay; u32 v; /* disable clock before enabling strobe dll */ @@ -1010,9 +1014,13 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host) * enable strobe dll ctrl and adjust the delay target * for the uSDHC loopback read clock */ + if (imx_data->boarddata.strobe_dll_delay_target) + strobe_delay = imx_data->boarddata.strobe_dll_delay_target; + else + strobe_delay = ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT; v = ESDHC_STROBE_DLL_CTRL_ENABLE | ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT | - (7 << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); + (strobe_delay << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL); /* wait 5us to make sure strobe dll status register stable */ udelay(5); @@ -1338,6 +1346,8 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, of_property_read_u32(np, "fsl,tuning-start-tap", &boarddata->tuning_start_tap); + of_property_read_u32(np, "fsl,strobe-dll-delay-target", + &boarddata->strobe_dll_delay_target); if (of_find_property(np, "no-1-8-v", NULL)) host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h index 6c006078c8a1..0434f68eda86 100644 --- a/include/linux/platform_data/mmc-esdhc-imx.h +++ b/include/linux/platform_data/mmc-esdhc-imx.h @@ -37,5 +37,6 @@ struct esdhc_platform_data { unsigned int delay_line; unsigned int tuning_step; /* The delay cell steps in tuning procedure */ unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */ + unsigned int strobe_dll_delay_target; /* The delay cell for strobe pad (read clock) */ }; #endif /* __ASM_ARCH_IMX_ESDHC_H */ From patchwork Wed Feb 19 08:25:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CF92C3404D for ; Wed, 19 Feb 2020 08:31:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1EBBF2464E for ; Wed, 19 Feb 2020 08:31:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726514AbgBSIbu (ORCPT ); Wed, 19 Feb 2020 03:31:50 -0500 Received: from inva021.nxp.com ([92.121.34.21]:38450 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726495AbgBSIbu (ORCPT ); Wed, 19 Feb 2020 03:31:50 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D248A203957; Wed, 19 Feb 2020 09:31:47 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2F77120054C; Wed, 19 Feb 2020 09:31:44 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id AF9EA402E1; Wed, 19 Feb 2020 16:31:39 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 07/14] mmc: sdhci-esdhc-imx: optimize the clock setting Date: Wed, 19 Feb 2020 16:25:50 +0800 Message-Id: <1582100757-20683-2-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> References: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen When force clock off, check the SDOFF of register PRSSTAT to make sure the clock is gate off. Before force clock on, check the SDSTB of register PRSSTAT to make sure the clock is stable, this will eliminate the clock glitch. Signed-off-by: Haibo Chen Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 24 +++++++++++++++++++++++- drivers/mmc/host/sdhci-esdhc.h | 1 + 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 3359153304a3..6ca01b766604 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -312,6 +313,17 @@ static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, i writel(((readl(base) & ~(mask << shift)) | (val << shift)), base); } +static inline void esdhc_wait_for_card_clock_gate_off(struct sdhci_host *host) +{ + u32 present_state; + int ret; + + ret = readl_poll_timeout(host->ioaddr + ESDHC_PRSSTAT, present_state, + (present_state & ESDHC_CLOCK_GATE_OFF), 2, 100); + if (ret == -ETIMEDOUT) + dev_warn(mmc_dev(host->mmc), "%s: card clock still not gate off in 100us!.\n", __func__); +} + static u32 esdhc_readl_le(struct sdhci_host *host, int reg) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -525,6 +537,8 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) else new_val &= ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON; writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC); + if (!(new_val & ESDHC_VENDOR_SPEC_FRC_SDCLK_ON)) + esdhc_wait_for_card_clock_gate_off(host); return; case SDHCI_HOST_CONTROL2: new_val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); @@ -753,12 +767,14 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, int ddr_pre_div = imx_data->is_ddr ? 2 : 1; int pre_div = 1; int div = 1; + int ret; u32 temp, val; if (esdhc_is_usdhc(imx_data)) { val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON, host->ioaddr + ESDHC_VENDOR_SPEC); + esdhc_wait_for_card_clock_gate_off(host); } if (clock == 0) { @@ -813,13 +829,18 @@ static inline void esdhc_pltfm_set_clock(struct sdhci_host *host, | (pre_div << ESDHC_PREDIV_SHIFT)); sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); + /* need to wait the bit 3 of the PRSSTAT to be set, make sure card clock is stable */ + ret = readl_poll_timeout(host->ioaddr + ESDHC_PRSSTAT, temp, + (temp & ESDHC_CLOCK_STABLE), 2, 100); + if (ret == -ETIMEDOUT) + dev_warn(mmc_dev(host->mmc), "card clock still not stable in 100us!.\n"); + if (esdhc_is_usdhc(imx_data)) { val = readl(host->ioaddr + ESDHC_VENDOR_SPEC); writel(val | ESDHC_VENDOR_SPEC_FRC_SDCLK_ON, host->ioaddr + ESDHC_VENDOR_SPEC); } - mdelay(1); } static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host) @@ -1003,6 +1024,7 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host) writel(readl(host->ioaddr + ESDHC_VENDOR_SPEC) & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON, host->ioaddr + ESDHC_VENDOR_SPEC); + esdhc_wait_for_card_clock_gate_off(host); /* force a reset on strobe dll */ writel(ESDHC_STROBE_DLL_CTRL_RESET, diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h index 9289bb4d633e..947212f16bc6 100644 --- a/drivers/mmc/host/sdhci-esdhc.h +++ b/drivers/mmc/host/sdhci-esdhc.h @@ -31,6 +31,7 @@ /* Present State Register */ #define ESDHC_PRSSTAT 0x24 +#define ESDHC_CLOCK_GATE_OFF 0x00000080 #define ESDHC_CLOCK_STABLE 0x00000008 /* Protocol Control Register */ From patchwork Wed Feb 19 08:25:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D370C34051 for ; Wed, 19 Feb 2020 08:31:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3003B2464E for ; Wed, 19 Feb 2020 08:31:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726793AbgBSIby (ORCPT ); Wed, 19 Feb 2020 03:31:54 -0500 Received: from inva021.nxp.com ([92.121.34.21]:38502 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726672AbgBSIbx (ORCPT ); Wed, 19 Feb 2020 03:31:53 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5832B204785; Wed, 19 Feb 2020 09:31:50 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A60AC204781; Wed, 19 Feb 2020 09:31:46 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id F0F6A402E6; Wed, 19 Feb 2020 16:31:40 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 09/14] mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_BROKEN_AUTO_CMD23 Date: Wed, 19 Feb 2020 16:25:52 +0800 Message-Id: <1582100757-20683-4-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> References: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen Since L4.15, community involve the commit 105819c8a545 ("mmc: core: use mrq->sbc when sending CMD23 for RPMB"), let the usdhc to decide whether to use ACMD23 for RPMB. This CMD23 for RPMB need to set the bit 31 to its argument, if not, the RPMB write operation will return general fail. According to the sdhci logic, SDMA mode will disable the ACMD23, and only in ADMA mode, it will chose to use ACMD23 if the host support. But according to debug, and confirm with IC, the imx6qpdl/imx6sx/imx6sl/imx7d do not support the ACMD23 feature completely. These SoCs only use the 16 bit block count of the register 0x4 (BLOCK_ATT) as the CMD23's argument in ACMD23 mode, which means it will ignore the upper 16 bit of the CMD23's argument. This will block the reliable write operation in RPMB, because RPMB reliable write need to set the bit31 of the CMD23's argument. This is the hardware limitation. So for imx6qpdl/imx6sx/imx6sl/imx7d, it need to broke the ACMD23 for eMMC, SD card do not has this limitation, because SD card do not support reliable write. For imx6ul/imx6ull/imx6sll/imx7ulp/imx8, it support the ACMD23 completely, it change to use the 0x0 register (DS_ADDR) to put the CMD23's argument in ADMA mode. This patch add a new flag ESDHC_FLAG_BROKEN_AUTO_CMD23, and add this flag to imx6q/imx6sx/imx6sl/imx7d, and due to the imx6sll share the same compatible string with imx6sx before, and imx6sll do not has this limitation, so add a new compatible string for imx6sll. Signed-off-by: Haibo Chen Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 34 ++++++++++++++++++++++++++---- 1 file changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 1ec35cc45fc5..98b91b6ff2a9 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -166,6 +166,18 @@ #define ESDHC_FLAG_STATE_LOST_IN_LPMODE BIT(14) /* The IP lost clock rate in PM_RUNTIME */ #define ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME BIT(15) +/* + * The IP do not support the ACMD23 feature completely when use ADMA mode. + * In ADMA mode, it only use the 16 bit block count of the register 0x4 + * (BLOCK_ATT) as the CMD23's argument for ACMD23 mode, which means it will + * ignore the upper 16 bit of the CMD23's argument. This will block the reliable + * write operation in RPMB, because RPMB reliable write need to set the bit31 + * of the CMD23's argument. + * imx6qpdl/imx6sx/imx6sl/imx7d has this limitation only for ADMA mode, SDMA + * do not has this limitation. so when these SoC use ADMA mode, it need to + * disable the ACMD23 feature. + */ +#define ESDHC_FLAG_BROKEN_AUTO_CMD23 BIT(16) struct esdhc_soc_data { u32 flags; @@ -188,21 +200,30 @@ static const struct esdhc_soc_data esdhc_imx53_data = { }; static const struct esdhc_soc_data usdhc_imx6q_data = { - .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING, + .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING + | ESDHC_FLAG_BROKEN_AUTO_CMD23, }; static const struct esdhc_soc_data usdhc_imx6sl_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_ERR004536 - | ESDHC_FLAG_HS200, + | ESDHC_FLAG_HS200 + | ESDHC_FLAG_BROKEN_AUTO_CMD23, }; -static const struct esdhc_soc_data usdhc_imx6sx_data = { +static const struct esdhc_soc_data usdhc_imx6sll_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 | ESDHC_FLAG_STATE_LOST_IN_LPMODE, }; +static const struct esdhc_soc_data usdhc_imx6sx_data = { + .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_STATE_LOST_IN_LPMODE + | ESDHC_FLAG_BROKEN_AUTO_CMD23, +}; + static const struct esdhc_soc_data usdhc_imx6ull_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 @@ -214,7 +235,8 @@ static const struct esdhc_soc_data usdhc_imx7d_data = { .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 | ESDHC_FLAG_HS400 - | ESDHC_FLAG_STATE_LOST_IN_LPMODE, + | ESDHC_FLAG_STATE_LOST_IN_LPMODE + | ESDHC_FLAG_BROKEN_AUTO_CMD23, }; static struct esdhc_soc_data usdhc_imx7ulp_data = { @@ -276,6 +298,7 @@ static const struct of_device_id imx_esdhc_dt_ids[] = { { .compatible = "fsl,imx53-esdhc", .data = &esdhc_imx53_data, }, { .compatible = "fsl,imx6sx-usdhc", .data = &usdhc_imx6sx_data, }, { .compatible = "fsl,imx6sl-usdhc", .data = &usdhc_imx6sl_data, }, + { .compatible = "fsl,imx6sll-usdhc", .data = &usdhc_imx6sll_data, }, { .compatible = "fsl,imx6q-usdhc", .data = &usdhc_imx6q_data, }, { .compatible = "fsl,imx6ull-usdhc", .data = &usdhc_imx6ull_data, }, { .compatible = "fsl,imx7d-usdhc", .data = &usdhc_imx7d_data, }, @@ -1560,6 +1583,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) if (imx_data->socdata->flags & ESDHC_FLAG_HS400) host->quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400; + if (imx_data->socdata->flags & ESDHC_FLAG_BROKEN_AUTO_CMD23) + host->quirks2 |= SDHCI_QUIRK2_ACMD23_BROKEN; + if (imx_data->socdata->flags & ESDHC_FLAG_HS400_ES) { host->mmc->caps2 |= MMC_CAP2_HS400_ES; host->mmc_host_ops.hs400_enhanced_strobe = From patchwork Wed Feb 19 08:25:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86696C3404D for ; Wed, 19 Feb 2020 08:32:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5AEE724656 for ; Wed, 19 Feb 2020 08:32:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726495AbgBSIb7 (ORCPT ); Wed, 19 Feb 2020 03:31:59 -0500 Received: from inva021.nxp.com ([92.121.34.21]:38518 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726683AbgBSIbw (ORCPT ); Wed, 19 Feb 2020 03:31:52 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id C9BF920054C; Wed, 19 Feb 2020 09:31:50 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5E2522031A5; Wed, 19 Feb 2020 09:31:47 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 97EBA402ED; Wed, 19 Feb 2020 16:31:41 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 10/14] mmc: sdhci-esdhc-imx: Add an new esdhc_soc_data for i.MX8MM Date: Wed, 19 Feb 2020 16:25:53 +0800 Message-Id: <1582100757-20683-5-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> References: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen Add new esdhc_soc_data, with compatible string "fsl,imx8mm-usdhc". Signed-off-by: Haibo Chen Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-esdhc-imx.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 98b91b6ff2a9..100c081cfcae 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -255,6 +255,14 @@ static struct esdhc_soc_data usdhc_imx8qxp_data = { | ESDHC_FLAG_CLK_RATE_LOST_IN_PM_RUNTIME, }; +static struct esdhc_soc_data usdhc_imx8mm_data = { + .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING + | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 + | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES + | ESDHC_FLAG_CQHCI + | ESDHC_FLAG_STATE_LOST_IN_LPMODE, +}; + struct pltfm_imx_data { u32 scratchpad; struct pinctrl *pinctrl; @@ -304,6 +312,7 @@ static const struct of_device_id imx_esdhc_dt_ids[] = { { .compatible = "fsl,imx7d-usdhc", .data = &usdhc_imx7d_data, }, { .compatible = "fsl,imx7ulp-usdhc", .data = &usdhc_imx7ulp_data, }, { .compatible = "fsl,imx8qxp-usdhc", .data = &usdhc_imx8qxp_data, }, + { .compatible = "fsl,imx8mm-usdhc", .data = &usdhc_imx8mm_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, imx_esdhc_dt_ids); From patchwork Wed Feb 19 08:25:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bough Chen X-Patchwork-Id: 211172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31107C34052 for ; Wed, 19 Feb 2020 08:31:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1400624670 for ; Wed, 19 Feb 2020 08:31:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726354AbgBSIb4 (ORCPT ); Wed, 19 Feb 2020 03:31:56 -0500 Received: from inva020.nxp.com ([92.121.34.13]:50190 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726691AbgBSIbz (ORCPT ); Wed, 19 Feb 2020 03:31:55 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 458F81A00C9; Wed, 19 Feb 2020 09:31:54 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CDA4B1A0578; Wed, 19 Feb 2020 09:31:50 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 312C64030D; Wed, 19 Feb 2020 16:31:44 +0800 (SGT) From: haibo.chen@nxp.com To: adrian.hunter@intel.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org Cc: linux-imx@nxp.com, haibo.chen@nxp.com, linus.walleij@linaro.org Subject: [PATCH v4 14/14] mmc: queue: create dev->dma_parms before call dma_set_max_seg_size() Date: Wed, 19 Feb 2020 16:25:57 +0800 Message-Id: <1582100757-20683-9-git-send-email-haibo.chen@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> References: <1582100757-20683-1-git-send-email-haibo.chen@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Haibo Chen To make dma_set_max_seg_size() work, need to create dev->dma_parms. Find this issue on i.MX8QM mek board, this platform config the max_segment_size to 65535, but this dma_set_max_seg_size do not actuall work, find sometimes the segment size is 65536, exceed the hardware max segment limitation, trigger ADMA error. Signed-off-by: Haibo Chen --- drivers/mmc/core/queue.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/queue.c b/drivers/mmc/core/queue.c index 9edc08685e86..91094e56f7c9 100644 --- a/drivers/mmc/core/queue.c +++ b/drivers/mmc/core/queue.c @@ -359,6 +359,7 @@ static const struct blk_mq_ops mmc_mq_ops = { static void mmc_setup_queue(struct mmc_queue *mq, struct mmc_card *card) { struct mmc_host *host = card->host; + struct device *dev = mmc_dev(host); unsigned block_size = 512; blk_queue_flag_set(QUEUE_FLAG_NONROT, mq->queue); @@ -366,13 +367,12 @@ static void mmc_setup_queue(struct mmc_queue *mq, struct mmc_card *card) if (mmc_can_erase(card)) mmc_queue_setup_discard(mq->queue, card); - if (!mmc_dev(host)->dma_mask || !*mmc_dev(host)->dma_mask) + if (!dev->dma_mask || !*dev->dma_mask) blk_queue_bounce_limit(mq->queue, BLK_BOUNCE_HIGH); blk_queue_max_hw_sectors(mq->queue, min(host->max_blk_count, host->max_req_size / 512)); if (host->can_dma_map_merge) - WARN(!blk_queue_can_use_dma_map_merging(mq->queue, - mmc_dev(host)), + WARN(!blk_queue_can_use_dma_map_merging(mq->queue, dev), "merging was advertised but not possible"); blk_queue_max_segments(mq->queue, mmc_get_max_segments(host)); @@ -389,7 +389,10 @@ static void mmc_setup_queue(struct mmc_queue *mq, struct mmc_card *card) blk_queue_max_segment_size(mq->queue, round_down(host->max_seg_size, block_size)); - dma_set_max_seg_size(mmc_dev(host), queue_max_segment_size(mq->queue)); + if (!dev->dma_parms) + dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms), + GFP_KERNEL); + dma_set_max_seg_size(dev, queue_max_segment_size(mq->queue)); INIT_WORK(&mq->recovery_work, mmc_mq_recovery_handler); INIT_WORK(&mq->complete_work, mmc_blk_mq_complete_work);