From patchwork Mon Sep 4 01:16:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 111530 Delivered-To: patch@linaro.org Received: by 10.140.94.166 with SMTP id g35csp915045qge; Sun, 3 Sep 2017 18:17:03 -0700 (PDT) X-Google-Smtp-Source: ADKCNb44uiTsdx17vVHiZ1KfOtEyaIFR9ie2X0U8RYHlBo9RUY8e7HdFLWu0T33xZ7lm+C1xhBZ/ X-Received: by 10.99.54.12 with SMTP id d12mr10141383pga.370.1504487823342; Sun, 03 Sep 2017 18:17:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504487823; cv=none; d=google.com; s=arc-20160816; b=IpCmE+n7oQclCJMtz3/e6hpPyg5uM2K3qzPU6xop8xQKoQjUN8RF6wgO1E8I/wuTYe FTtscnlV52vGJ6dXc1OU0iB02xcXuk7RNUX/2q/8caVQ4Y+Gi/APsbTh0hcO2/G0piM7 hf82qXKnPPDtVT3s6oDhdP7zr9DiuhZbUh8iWR5leNb2W/Z4EDwD1iRbvVdpfFXJzuMP lrE/lb8X9dCoFigXV+1lEor9DhppdmyH4lOeymYAcpxT77XZZIVxhJNtYpnLdLXIfofF XQ8TCZ3dL3dXJDD9oTOUHBK6xsXzE6vyz2fOauknwJLZzcYblz+QL8rAc53QaV1FSxys Drdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=rq35Hqr4J+UEkggrS3WeyTLO9nbcMgQ/PK3J6B/tqAY=; b=hux7L4a9hcMVOEMxxDl907ZGphG/lbmifsQF61iWQ+82/gYgDxOPddXYAgJrtvsDOe 6RuhU4r6cvpudW2jDQXqpxpDcQEe6vSpswj5fw78J1Mxum9lB1i/HWRjH1zCTINRgRpC hpdXue6PqMgvgEwOW2UfHheaO33u5sYiZ8wv8myBRfXuhkL6W/VqAragRfNZsU8mRefH b2Yc4+JcaPZ1tWQjdPe800aa75jPH+9GpONtE7oEnFW3SCf6IB3HQgI2IGCP8LTcPOrT MB6m+0BMdpF/QEdl5N/4br7asyX0EfIyENyvhm+xZYXSrL1YUmh/EKejT+WczBKdOBVc YVvg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o25si3788409pli.162.2017.09.03.18.17.03; Sun, 03 Sep 2017 18:17:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753193AbdIDBQq (ORCPT + 6 others); Sun, 3 Sep 2017 21:16:46 -0400 Received: from mx.socionext.com ([202.248.49.38]:11094 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753098AbdIDBQo (ORCPT ); Sun, 3 Sep 2017 21:16:44 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 04 Sep 2017 10:16:43 +0900 Received: from mail.mfilter.local (unknown [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 67F24180223; Mon, 4 Sep 2017 10:16:43 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Mon, 4 Sep 2017 10:16:43 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id B6CA31A121E; Mon, 4 Sep 2017 10:16:42 +0900 (JST) From: Kunihiko Hayashi To: robh+dt@kernel.org, mark.rutland@arm.com, yamada.masahiro@socionext.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, masami.hiramatsu@linaro.org, jaswinder.singh@linaro.org, Kunihiko Hayashi Subject: [PATCH v4 1/2] ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2 Date: Mon, 4 Sep 2017 10:16:30 +0900 Message-Id: <1504487791-20582-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504487791-20582-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1504487791-20582-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC. The thermal monitor is included in sysctrl. Furthermore, add cpuN labels for reference in cooling-device property. Signed-off-by: Kunihiko Hayashi --- arch/arm/boot/dts/uniphier-pxs2.dtsi | 43 ++++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 4 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi index 90b020c..c89e0d5 100644 --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi @@ -16,7 +16,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; @@ -24,9 +24,10 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; @@ -36,7 +37,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@2 { + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; @@ -46,7 +47,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@3 { + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; @@ -114,6 +115,34 @@ }; }; + thermal-zones { + cpu_thermal { + polling-delay-passive = <250>; /* 250ms */ + polling-delay = <1000>; /* 1000ms */ + thermal-sensors = <&pvtctl>; + + trips { + cpu_crit: cpu_crit { + temperature = <95000>; /* 95C */ + hysteresis = <2000>; + type = "critical"; + }; + cpu_alert: cpu_alert { + temperature = <85000>; /* 85C */ + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_alert>; + cooling-device = <&cpu0 (-1) (-1)>; + }; + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -358,6 +387,12 @@ compatible = "socionext,uniphier-pxs2-reset"; #reset-cells = <1>; }; + + pvtctl: pvtctl { + compatible = "socionext,uniphier-pxs2-thermal"; + interrupts = <0 3 4>; + #thermal-sensor-cells = <0>; + }; }; nand: nand@68000000 {