From patchwork Mon Feb 6 09:36:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93385 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1629903qgi; Mon, 6 Feb 2017 01:36:40 -0800 (PST) X-Received: by 10.223.170.3 with SMTP id p3mr9978609wrd.100.1486373799835; Mon, 06 Feb 2017 01:36:39 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id i132si7368526wmg.30.2017.02.06.01.36.39; Mon, 06 Feb 2017 01:36:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CC81A4B15F; Mon, 6 Feb 2017 10:36:38 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qA0mfZcFq3jt; Mon, 6 Feb 2017 10:36:38 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DE8D34B1D0; Mon, 6 Feb 2017 10:36:37 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C9EB44B1D0 for ; Mon, 6 Feb 2017 10:36:29 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1sv-6I-2yDZP for ; Mon, 6 Feb 2017 10:36:29 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by theia.denx.de (Postfix) with ESMTPS id 3549C4B0A7 for ; Mon, 6 Feb 2017 10:36:25 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aMpS030045; Mon, 6 Feb 2017 03:36:22 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aM6v023083; Mon, 6 Feb 2017 03:36:22 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:21 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH10000892; Mon, 6 Feb 2017 03:36:20 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:08 +0200 Message-ID: <1486373775-29580-2-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 1/8] ARM: OMAP5+: GPIO: Add GPIO_TO_PIN() macro X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" GPIO_TO_PIN(bank, bank_gpio) returns the GPIO index from the GPIO bank number and bank's GPIO offset number. Signed-off-by: Roger Quadros Reviewed-by: Tom Rini Reviewed-by: Lokesh Vutla --- arch/arm/include/asm/arch-omap5/gpio.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/include/asm/arch-omap5/gpio.h b/arch/arm/include/asm/arch-omap5/gpio.h index 9dd03c9..48e8ca5 100644 --- a/arch/arm/include/asm/arch-omap5/gpio.h +++ b/arch/arm/include/asm/arch-omap5/gpio.h @@ -34,4 +34,8 @@ #define OMAP54XX_GPIO7_BASE 0x48051000 #define OMAP54XX_GPIO8_BASE 0x48053000 + +/* Get the GPIO index from the given bank number and bank gpio */ +#define GPIO_TO_PIN(bank, bank_gpio) (32 * (bank - 1) + (bank_gpio)) + #endif /* _GPIO_OMAP5_H */ From patchwork Mon Feb 6 09:36:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93386 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1629962qgi; Mon, 6 Feb 2017 01:36:54 -0800 (PST) X-Received: by 10.28.74.221 with SMTP id n90mr7196068wmi.114.1486373814687; Mon, 06 Feb 2017 01:36:54 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id b66si7342390wmc.145.2017.02.06.01.36.54; Mon, 06 Feb 2017 01:36:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EAEDA4B64F; Mon, 6 Feb 2017 10:36:51 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cy4rObSY4fCT; Mon, 6 Feb 2017 10:36:51 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 55DF14B58A; Mon, 6 Feb 2017 10:36:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F18154B0A7 for ; Mon, 6 Feb 2017 10:36:30 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QHIQDTP4kPjY for ; Mon, 6 Feb 2017 10:36:30 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by theia.denx.de (Postfix) with ESMTPS id 295224B1FE for ; Mon, 6 Feb 2017 10:36:26 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aOXQ017345; Mon, 6 Feb 2017 03:36:24 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aNom023129; Mon, 6 Feb 2017 03:36:23 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:23 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH11000892; Mon, 6 Feb 2017 03:36:22 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:09 +0200 Message-ID: <1486373775-29580-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 2/8] ti: common: board_detect: commodify ethaddr environment setting code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Keystone and OMAP platforms will need this to set ethernet MAC addresses from board EEPROM. Signed-off-by: Roger Quadros Reviewed-by: Lokesh Vutla Reviewed-by: Tom Rini --- board/ti/common/board_detect.c | 57 ++++++++++++++++++++++++++++++++++++++++++ board/ti/common/board_detect.h | 12 +++++++++ 2 files changed, 69 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index a5dba94..23388d0 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -314,3 +314,60 @@ void __maybe_unused set_board_info_env(char *name) else setenv("board_serial", unknown); } + +static u64 mac_to_u64(u8 mac[6]) +{ + int i; + u64 addr = 0; + + for (i = 0; i < 6; i++) { + addr <<= 8; + addr |= mac[i]; + } + + return addr; +} + +static void u64_to_mac(u64 addr, u8 mac[6]) +{ + mac[5] = addr; + mac[4] = addr >> 8; + mac[3] = addr >> 16; + mac[2] = addr >> 24; + mac[1] = addr >> 32; + mac[0] = addr >> 40; +} + +void board_ti_set_ethaddr(int index) +{ + uint8_t mac_addr[6]; + int i; + u64 mac1, mac2; + u8 mac_addr1[6], mac_addr2[6]; + int num_macs; + /* + * Export any Ethernet MAC addresses from EEPROM. + * The 2 MAC addresses in EEPROM define the address range. + */ + board_ti_get_eth_mac_addr(0, mac_addr1); + board_ti_get_eth_mac_addr(1, mac_addr2); + + if (is_valid_ethaddr(mac_addr1) && is_valid_ethaddr(mac_addr2)) { + mac1 = mac_to_u64(mac_addr1); + mac2 = mac_to_u64(mac_addr2); + + /* must contain an address range */ + num_macs = mac2 - mac1 + 1; + /* <= 50 to protect against user programming error */ + if (num_macs > 0 && num_macs <= 50) { + for (i = 0; i < num_macs; i++) { + u64_to_mac(mac1 + i, mac_addr); + if (is_valid_ethaddr(mac_addr)) { + eth_setenv_enetaddr_by_index("eth", + i + index, + mac_addr); + } + } + } + } +} diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 343fcb4..4bcb64f 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -193,4 +193,16 @@ u64 board_ti_get_emif2_size(void); */ void set_board_info_env(char *name); +/** + * board_ti_set_ethaddr- Sets the ethaddr environment from EEPROM + * @index: The first ethaddr environment variable to set + * + * EEPROM should be already read before calling this function. + * The EEPROM contains 2 MAC addresses which define the MAC address + * range (i.e. first and last MAC address). + * This function sets the ethaddr environment variable for all + * the available MAC addresses starting from ethaddr. + */ +void board_ti_set_ethaddr(int index); + #endif /* __BOARD_DETECT_H */ From patchwork Mon Feb 6 09:36:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93392 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630265qgi; Mon, 6 Feb 2017 01:38:06 -0800 (PST) X-Received: by 10.223.161.130 with SMTP id u2mr10431498wru.127.1486373886423; Mon, 06 Feb 2017 01:38:06 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 2si242565wrg.54.2017.02.06.01.38.06; Mon, 06 Feb 2017 01:38:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4A0294B0A7; Mon, 6 Feb 2017 10:37:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qMCdz88CGQGC; Mon, 6 Feb 2017 10:37:58 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1BDC54B65C; Mon, 6 Feb 2017 10:37:38 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 20FDD4B6B3 for ; Mon, 6 Feb 2017 10:37:32 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6zOCyuH1uYCv for ; Mon, 6 Feb 2017 10:37:31 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 2BC7A4B6AC for ; Mon, 6 Feb 2017 10:36:57 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aVf8002346; Mon, 6 Feb 2017 03:36:31 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aPhi014535; Mon, 6 Feb 2017 03:36:25 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:25 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH12000892; Mon, 6 Feb 2017 03:36:24 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:10 +0200 Message-ID: <1486373775-29580-4-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 3/8] board: ti: am571x-idk: Support 6 port Ethernet or 4 port Ethernet with LCD X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The board can support either ICSS1 Ethernet ports or LCD based on J51 jumper. Factory default is ICSS1 Ethernet ports (i.e. Jumper not populated). Use the GPIO to detect the jumper setting and configure the pinmux accordingly. Also select the right DT blob based on the chosen configuration. J51 absent -> ICSS1 Ethernet, no LCD on VOUT -> am571x-idk.dtb J51 present -> LCD on VOUT, no ICSS1 Ethernet -> am571x-idk-lcd-osd.dtb At present we only support the assume it is the Legacy LCD. LCD detection mechanism needs to be added later to differentiate between legacy vs new LCD. For ICSS1 Ethernet pins use the following convention to set the pinmux as PMT data is not yet finalized. - If pin is output, set as PIN_OUTPUT - If pin is input and external pull resistor present set as PIN_INPUT - If pin is input and external pull resistor absent, set pull to same as that of the external PHY's internall pull. - Do not use SLEW_CONTROLon any pin. Cc: Nishanth Menon Signed-off-by: Roger Quadros Reviewed-by: Tom Rini Reviewed-by: Lokesh Vutla --- board/ti/am57xx/board.c | 40 +++++++++++++++++ board/ti/am57xx/mux_data.h | 104 ++++++++++++++++++++++++++++++--------------- 2 files changed, 109 insertions(+), 35 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 5f2d4df..81ad86c 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; +#define GPIO_ETH_LCD GPIO_TO_PIN(2, 22) /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 @@ -449,6 +450,21 @@ void hw_data_init(void) *ctrl = &dra7xx_ctrl; } +bool am571x_idk_needs_lcd(void) +{ + bool needs_lcd; + + gpio_request(GPIO_ETH_LCD, "nLCD_Detect"); + if (gpio_get_value(GPIO_ETH_LCD)) + needs_lcd = false; + else + needs_lcd = true; + + gpio_free(GPIO_ETH_LCD); + + return needs_lcd; +} + int board_init(void) { gpmc_init(); @@ -459,6 +475,8 @@ int board_init(void) int board_late_init(void) { + char *idk_lcd; + setup_board_eeprom_env(); u8 val; @@ -487,6 +505,17 @@ int board_late_init(void) palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, val); + /* TBD: Add LCD panel detection once information is available */ + if (am571x_idk_needs_lcd()) + idk_lcd = "osd101t2045"; /* Default to legacy LCD */ + else + idk_lcd = "no"; + setenv("idk_lcd", idk_lcd); + +#if !defined(CONFIG_SPL_BUILD) + board_ti_set_ethaddr(2); +#endif + return 0; } @@ -549,6 +578,17 @@ void recalibrate_iodelay(void) do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); } + if (board_is_am571x_idk()) { + if (am571x_idk_needs_lcd()) { + pconf = core_padconf_array_vout_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_vout_am571x_idk); + } else { + pconf = core_padconf_array_icss1eth_am571x_idk; + pconf_sz = ARRAY_SIZE(core_padconf_array_icss1eth_am571x_idk); + } + do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz); + } + /* Setup IOdelay configuration */ ret = do_set_iodelay((*ctrl)->iodelay_config_base, iod, iod_sz); err: diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 2f5243e..ff0e517 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -549,13 +549,6 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */ {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */ {VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.eCAP1_in_PWM1_out */ - {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_mi1_col */ - {VIN2A_D4, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.pr1_mii1_txd1 */ - {VIN2A_D5, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.pr1_mii1_txd0 */ - {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ - {VIN2A_D7, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.pr1_mii1_txen */ - {VIN2A_D8, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.pr1_mii1_txd3 */ - {VIN2A_D9, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.pr1_mii1_txd2 */ {VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ {VIN2A_D11, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d11.pr1_mdio_data */ {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ @@ -570,35 +563,7 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ - {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ - {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ {VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)}, /* vout1_fld.gpio4_21 */ - {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ - {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ - {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ - {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ - {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ - {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ - {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ - {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ - {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ - {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ - {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ - {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ - {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ - {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ - {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ - {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ - {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ - {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ - {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ - {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ - {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ - {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ - {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ - {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ - {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ - {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ {MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mdio_d.mdio_d */ {RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)}, /* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */ @@ -727,6 +692,75 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rstoutn.rstoutn */ }; +const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = { + /* PR1 MII0 */ + {VOUT1_D8, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.pr1_mii_mt0_clk */ + {VOUT1_D9, (M13 | PIN_OUTPUT)}, /* vout1_d9.pr1_mii0_txd3 */ + {VOUT1_D10, (M13 | PIN_OUTPUT)}, /* vout1_d10.pr1_mii0_txd2 */ + {VOUT1_D11, (M13 | PIN_OUTPUT)}, /* vout1_d11.pr1_mii0_txen */ + {VOUT1_D12, (M13 | PIN_OUTPUT)}, /* vout1_d12.pr1_mii0_txd1 */ + {VOUT1_D13, (M13 | PIN_OUTPUT)}, /* vout1_d13.pr1_mii0_txd0 */ + {VOUT1_D14, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.pr1_mii_mr0_clk */ + {VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.pr1_mii0_rxdv */ + {VOUT1_D16, (M12 | PIN_INPUT)}, /* vout1_d16.pr1_mii0_rxd3 */ + {VOUT1_D17, (M12 | PIN_INPUT)}, /* vout1_d17.pr1_mii0_rxd2 */ + {VOUT1_D18, (M12 | PIN_INPUT)}, /* vout1_d18.pr1_mii0_rxd1 */ + {VOUT1_D19, (M12 | PIN_INPUT)}, /* vout1_d19.pr1_mii0_rxd0 */ + {VOUT1_D20, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d20.pr1_mii0_rxer */ + {VOUT1_D21, (M12 | PIN_INPUT)}, /* vout1_d21.pr1_mii0_rxlink */ + {VOUT1_D22, (M12 | PIN_INPUT)}, /* vout1_d22.pr1_mii0_col */ + {VOUT1_D23, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d23.pr1_mii0_crs */ + + /* PR1 MII1 */ + {VIN2A_D3, (M12 | PIN_INPUT)}, /* vin2a_d3.pr1_mi1_col */ + {VIN2A_D4, (M13 | PIN_OUTPUT)}, /* vin2a_d4.pr1_mii1_txd1 */ + {VIN2A_D5, (M13 | PIN_OUTPUT)}, /* vin2a_d5.pr1_mii1_txd0 */ + {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */ + {VIN2A_D7, (M11 | PIN_OUTPUT)}, /* vin2a_d7.pr1_mii1_txen */ + {VIN2A_D8, (M11 | PIN_OUTPUT)}, /* vin2a_d8.pr1_mii1_txd3 */ + {VIN2A_D9, (M11 | PIN_OUTPUT)}, /* vin2a_d9.pr1_mii1_txd2 */ + {VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)}, /* vout1_vsync.pr1_mii1_rxer */ + {VOUT1_D0, (M12 | PIN_INPUT)}, /* vout1_d0.pr1_mii1_rxlink */ + {VOUT1_D1, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d1.pr1_mii1_crs */ + {VOUT1_D2, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.pr1_mii_mr1_clk */ + {VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.pr1_mii1_rxdv */ + {VOUT1_D4, (M12 | PIN_INPUT)}, /* vout1_d4.pr1_mii1_rxd3 */ + {VOUT1_D5, (M12 | PIN_INPUT)}, /* vout1_d5.pr1_mii1_rxd2 */ + {VOUT1_D6, (M12 | PIN_INPUT)}, /* vout1_d6.pr1_mii1_rxd1 */ + {VOUT1_D7, (M12 | PIN_INPUT)}, /* vout1_d7.pr1_mii1_rxd0 */ +}; + +const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = { + {VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_clk.vout1_clk */ + {VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_de.vout1_de */ + {VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_hsync.vout1_hsync */ + {VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_vsync.vout1_vsync */ + {VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d0.vout1_d0 */ + {VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.vout1_d1 */ + {VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d2.vout1_d2 */ + {VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.vout1_d3 */ + {VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.vout1_d4 */ + {VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.vout1_d5 */ + {VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.vout1_d6 */ + {VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.vout1_d7 */ + {VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d8.vout1_d8 */ + {VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d9.vout1_d9 */ + {VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d10.vout1_d10 */ + {VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d11.vout1_d11 */ + {VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d12.vout1_d12 */ + {VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d13.vout1_d13 */ + {VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d14.vout1_d14 */ + {VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.vout1_d15 */ + {VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.vout1_d16 */ + {VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.vout1_d17 */ + {VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.vout1_d18 */ + {VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.vout1_d19 */ + {VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d20.vout1_d20 */ + {VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.vout1_d21 */ + {VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.vout1_d22 */ + {VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.vout1_d23 */ +}; + const struct pad_conf_entry early_padconf[] = { {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ From patchwork Mon Feb 6 09:36:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93387 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630008qgi; Mon, 6 Feb 2017 01:37:06 -0800 (PST) X-Received: by 10.28.234.193 with SMTP id g62mr7389277wmi.36.1486373826221; Mon, 06 Feb 2017 01:37:06 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id h61si217227wrh.186.2017.02.06.01.37.05; Mon, 06 Feb 2017 01:37:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9E13B4B864; Mon, 6 Feb 2017 10:37:04 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dSKZ-6W-isD7; Mon, 6 Feb 2017 10:37:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 942434B5E3; Mon, 6 Feb 2017 10:36:49 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A8C804B0A7 for ; Mon, 6 Feb 2017 10:36:32 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id B2VlX0A7CtEK for ; Mon, 6 Feb 2017 10:36:32 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by theia.denx.de (Postfix) with ESMTPS id 0859F4B1FE for ; Mon, 6 Feb 2017 10:36:30 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aStC029201; Mon, 6 Feb 2017 03:36:28 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aS78023178; Mon, 6 Feb 2017 03:36:28 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:27 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH13000892; Mon, 6 Feb 2017 03:36:26 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:11 +0200 Message-ID: <1486373775-29580-5-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 4/8] board: ti: am571x-idk: Update pinmux for ICSS2 Ethernet X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use the same convention that was used for ICSS1 Ethernet - If pin is output, set as PIN_OUTPUT - If pin is input and external pull resistor present set as PIN_INPUT - If pin is input and external pull resistor absent, set pull to same as that of the external PHY's internall pull. Signed-off-by: Roger Quadros Reviewed-by: Tom Rini Reviewed-by: Lokesh Vutla --- board/ti/am57xx/mux_data.h | 62 +++++++++++++++++++++++----------------------- 1 file changed, 31 insertions(+), 31 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index ff0e517..5485212 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -586,46 +586,46 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {GPIO6_14, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_14.gpio6_14 */ {GPIO6_15, (M14 | PIN_INPUT_PULLUP)}, /* gpio6_15.gpio6_15 */ {GPIO6_16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpio6_16.gpio6_16 */ - {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ - {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ + {XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */ + {XREF_CLK1, (M11 | PIN_INPUT_PULLUP)}, /* xref_clk1.pr2_mii1_crs */ {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ {XREF_CLK3, (M15 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.Driveroff */ {MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ {MCASP1_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.pr2_mdio_data */ {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */ {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */ - {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ - {MCASP1_AXR1, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ + {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp1_axr0.pr2_mii0_rxer */ + {MCASP1_AXR1, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ {MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */ {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ {MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */ {MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */ - {MCASP1_AXR8, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.pr2_mii0_txen */ - {MCASP1_AXR9, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.pr2_mii0_txd3 */ - {MCASP1_AXR10, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.pr2_mii0_txd2 */ - {MCASP1_AXR11, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.pr2_mii0_txd1 */ - {MCASP1_AXR12, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.pr2_mii0_txd0 */ - {MCASP1_AXR13, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ - {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */ - {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ - {MCASP2_ACLKX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ - {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ + {MCASP1_AXR8, (M11 | PIN_OUTPUT)}, /* mcasp1_axr8.pr2_mii0_txen */ + {MCASP1_AXR9, (M11 | PIN_OUTPUT)}, /* mcasp1_axr9.pr2_mii0_txd3 */ + {MCASP1_AXR10, (M11 | PIN_OUTPUT)}, /* mcasp1_axr10.pr2_mii0_txd2 */ + {MCASP1_AXR11, (M11 | PIN_OUTPUT)}, /* mcasp1_axr11.pr2_mii0_txd1 */ + {MCASP1_AXR12, (M11 | PIN_OUTPUT)}, /* mcasp1_axr12.pr2_mii0_txd0 */ + {MCASP1_AXR13, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ + {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr14.pr2_mii0_rxdv */ + {MCASP1_AXR15, (M11 | PIN_INPUT)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ + {MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ + {MCASP2_FSX, (M11 | PIN_INPUT)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ {MCASP2_ACLKR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkr.Driveroff */ {MCASP2_FSR, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_fsr.Driveroff */ {MCASP2_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr0.Driveroff */ {MCASP2_AXR1, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr1.Driveroff */ - {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ - {MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp2_axr3.pr2_mii0_rxlink */ + {MCASP2_AXR2, (M11 | PIN_INPUT)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ + {MCASP2_AXR3, (M11 | PIN_INPUT)}, /* mcasp2_axr3.pr2_mii0_rxlink */ {MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.gpio1_4 */ {MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.gpio6_7 */ {MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.gpio2_29 */ {MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.gpio1_5 */ - {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ - {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ - {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ - {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ + {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_aclkx.pr2_mii0_crs */ + {MCASP3_FSX, (M11 | PIN_INPUT)}, /* mcasp3_fsx.pr2_mii0_col */ + {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP)}, /* mcasp3_axr0.pr2_mii1_rxer */ + {MCASP3_AXR1, (M11 | PIN_INPUT)}, /* mcasp3_axr1.pr2_mii1_rxlink */ {MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.spi3_sclk */ {MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.spi3_d1 */ {MCASP4_AXR0, (M15 | PIN_INPUT_PULLDOWN)}, /* mcasp4_axr0.Driveroff */ @@ -642,18 +642,18 @@ const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {MMC1_SDWP, (M0 | PIN_OUTPUT)}, /* mmc1_sdwp.mmc1_sdwp */ - {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ - {GPIO6_11, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ - {MMC3_CLK, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ - {MMC3_CMD, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ - {MMC3_DAT0, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ - {MMC3_DAT1, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ - {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ + {GPIO6_10, (M11 | PIN_INPUT_PULLDOWN)}, /* gpio6_10.pr2_mii_mt1_clk */ + {GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */ + {MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */ + {MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */ + {MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */ + {MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */ + {MMC3_DAT2, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat2.pr2_mii_mr1_clk */ {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ - {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ - {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ - {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ - {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ + {MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */ + {MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */ + {MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */ + {MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */ {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ From patchwork Mon Feb 6 09:36:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93393 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630326qgi; Mon, 6 Feb 2017 01:38:19 -0800 (PST) X-Received: by 10.28.230.91 with SMTP id d88mr7339295wmh.129.1486373899428; Mon, 06 Feb 2017 01:38:19 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id r17si238919wrr.68.2017.02.06.01.38.18; Mon, 06 Feb 2017 01:38:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F35BF4BA35; Mon, 6 Feb 2017 10:38:07 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id urNm6LRTuuuF; Mon, 6 Feb 2017 10:38:07 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 22BD4B3873; Mon, 6 Feb 2017 10:37:49 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 82CB6B387A for ; Mon, 6 Feb 2017 10:37:44 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jn81UUs_UGH4 for ; Mon, 6 Feb 2017 10:37:44 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx209.ext.ti.com (fllnx209.ext.ti.com [198.47.19.16]) by theia.denx.de (Postfix) with ESMTPS id 719C04B63E for ; Mon, 6 Feb 2017 10:37:01 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aZ1I002353; Mon, 6 Feb 2017 03:36:35 -0600 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aUYQ023206; Mon, 6 Feb 2017 03:36:30 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:29 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH14000892; Mon, 6 Feb 2017 03:36:28 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:12 +0200 Message-ID: <1486373775-29580-6-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 5/8] board: ti: am57xx-idk: Auto detect LCD Panel X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Nishanth Menon AM571x IDK and AM572x IDK have optional LCD Kits that can be purchased. These can be one of OSD101T2045 or the newer OSD101T2587. The LCD panel itself has no registers that can be used to identify the panel, however, the touchscreen controllers on the panels are different. Hence to ease user experience, we can use the touch screen controller's ID information to detect what kind of panel we use and select the appropriate kernel dtb for the platform configuration. NOTE: AM572x IDK default configuration is for LCD Connectivity, however the AM571x IDK has a jumper (J51) that needs to be mounted for the IDK to operate with LCD (Vs two PRUSS ethernet port option). Touchscreen ID information is documented in: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf Acked-by: Lokesh Vutla Signed-off-by: Nishanth Menon Signed-off-by: Lokesh Vutla Signed-off-by: Roger Quadros Reviewed-by: Tom Rini --- board/ti/am57xx/board.c | 78 ++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 70 insertions(+), 8 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index 81ad86c..9ec0448 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -54,6 +54,19 @@ DECLARE_GLOBAL_DATA_PTR; /* GPIO 7_11 */ #define GPIO_DDR_VTT_EN 203 +/* Touch screen controller to identify the LCD */ +#define OSD_TS_FT_BUS_ADDRESS 0 +#define OSD_TS_FT_CHIP_ADDRESS 0x38 +#define OSD_TS_FT_REG_ID 0xA3 +/* + * Touchscreen IDs for various OSD panels + * Ref: http://www.osddisplays.com/TI/OSD101T2587-53TS_A.1.pdf + */ +/* Used on newer osd101t2587 Panels */ +#define OSD_TS_FT_ID_5x46 0x54 +/* Used on older osd101t2045 Panels */ +#define OSD_TS_FT_ID_5606 0x08 + #define SYSINFO_BOARD_NAME_MAX_LEN 45 #define TPS65903X_PRIMARY_SECONDARY_PAD2 0xFB @@ -473,10 +486,64 @@ int board_init(void) return 0; } -int board_late_init(void) +void am57x_idk_lcd_detect(void) { - char *idk_lcd; + int r = -ENODEV; + char *idk_lcd = "no"; + uint8_t buf = 0; + + /* Only valid for IDKs */ + if (board_is_x15() || board_is_am572x_evm()) + return; + + /* Only AM571x IDK has gpio control detect.. so check that */ + if (board_is_am571x_idk() && !am571x_idk_needs_lcd()) + goto out; + + r = i2c_set_bus_num(OSD_TS_FT_BUS_ADDRESS); + if (r) { + printf("%s: Failed to set bus address to %d: %d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, r); + goto out; + } + r = i2c_probe(OSD_TS_FT_CHIP_ADDRESS); + if (r) { + /* AM572x IDK has no explicit settings for optional LCD kit */ + if (board_is_am571x_idk()) { + printf("%s: Touch screen detect failed: %d!\n", + __func__, r); + } + goto out; + } + + /* Read FT ID */ + r = i2c_read(OSD_TS_FT_CHIP_ADDRESS, OSD_TS_FT_REG_ID, 1, &buf, 1); + if (r) { + printf("%s: Touch screen ID read %d:0x%02x[0x%02x] failed:%d\n", + __func__, OSD_TS_FT_BUS_ADDRESS, OSD_TS_FT_CHIP_ADDRESS, + OSD_TS_FT_REG_ID, r); + goto out; + } + + switch (buf) { + case OSD_TS_FT_ID_5606: + idk_lcd = "osd101t2045"; + break; + case OSD_TS_FT_ID_5x46: + idk_lcd = "osd101t2587"; + break; + default: + printf("%s: Unidentifed Touch screen ID 0x%02x\n", + __func__, buf); + /* we will let default be "no lcd" */ + } +out: + setenv("idk_lcd", idk_lcd); + return; +} +int board_late_init(void) +{ setup_board_eeprom_env(); u8 val; @@ -505,12 +572,7 @@ int board_late_init(void) palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, val); - /* TBD: Add LCD panel detection once information is available */ - if (am571x_idk_needs_lcd()) - idk_lcd = "osd101t2045"; /* Default to legacy LCD */ - else - idk_lcd = "no"; - setenv("idk_lcd", idk_lcd); + am57x_idk_lcd_detect(); #if !defined(CONFIG_SPL_BUILD) board_ti_set_ethaddr(2); From patchwork Mon Feb 6 09:36:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93389 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630134qgi; Mon, 6 Feb 2017 01:37:31 -0800 (PST) X-Received: by 10.28.92.83 with SMTP id q80mr8599532wmb.108.1486373851651; Mon, 06 Feb 2017 01:37:31 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id 76si7360666wmn.97.2017.02.06.01.37.31; Mon, 06 Feb 2017 01:37:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4A63D4B731; Mon, 6 Feb 2017 10:37:25 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id R44rvkCQVYe6; Mon, 6 Feb 2017 10:37:25 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7DB744B76E; Mon, 6 Feb 2017 10:36:57 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4B5634B15F for ; Mon, 6 Feb 2017 10:36:35 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kzDK1S_iDctB for ; Mon, 6 Feb 2017 10:36:35 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by theia.denx.de (Postfix) with ESMTPS id 729124B1D0 for ; Mon, 6 Feb 2017 10:36:34 +0100 (CET) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aW2x030064; Mon, 6 Feb 2017 03:36:32 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aVfd023241; Mon, 6 Feb 2017 03:36:31 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:31 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH15000892; Mon, 6 Feb 2017 03:36:30 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:13 +0200 Message-ID: <1486373775-29580-7-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 6/8] ARM: Use Kconfig for board EEPROM's I2C bus and chip address X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" In stead of defining the board EEPROM address in the board headers let's define them in the board config files and make them configurable by Kconfig. Signed-off-by: Roger Quadros --- board/ti/common/Kconfig | 14 ++++++++++++++ board/ti/ks2_evm/Kconfig | 2 ++ include/configs/am57xx_evm.h | 4 ---- include/configs/dra7xx_evm.h | 4 ---- 4 files changed, 16 insertions(+), 8 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 4980a04..5003484 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -1,3 +1,5 @@ +if ARCH_OMAP2 + config SPL_ENV_SUPPORT default y @@ -39,3 +41,15 @@ config SPL_POWER_SUPPORT config SPL_SERIAL_SUPPORT default y + +endif + +config EEPROM_BUS_ADDRESS + int "Board EEPROM's I2C bus address" + range 0 8 + default 0 + +config EEPROM_CHIP_ADDRESS + hex "Board EEPROM's I2C chip address" + range 0 0xff + default 0x50 diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig index c0568ec..9477f53 100644 --- a/board/ti/ks2_evm/Kconfig +++ b/board/ti/ks2_evm/Kconfig @@ -49,3 +49,5 @@ config SYS_CONFIG_NAME default "k2g_evm" endif + +source "board/ti/common/Kconfig" diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 840502c..d9e1119 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -105,10 +105,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -/* EEPROM */ -#define CONFIG_EEPROM_CHIP_ADDRESS 0x50 -#define CONFIG_EEPROM_BUS_ADDRESS 0 - /* * Default to using SPI for environment, etc. * 0x000000 - 0x040000 : QSPI.SPL (256KiB) diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index da458a4..46beb8b 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -264,8 +264,4 @@ #endif #endif /* NOR support */ -/* EEPROM */ -#define CONFIG_EEPROM_CHIP_ADDRESS 0x50 -#define CONFIG_EEPROM_BUS_ADDRESS 0 - #endif /* __CONFIG_DRA7XX_EVM_H */ From patchwork Mon Feb 6 09:36:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93390 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630186qgi; Mon, 6 Feb 2017 01:37:44 -0800 (PST) X-Received: by 10.223.153.98 with SMTP id x89mr8238228wrb.181.1486373864719; Mon, 06 Feb 2017 01:37:44 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. 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Parse it and setup eth?addr environment variables. Signed-off-by: Roger Quadros Reviewed-by: Lokesh Vutla --- board/ti/ks2_evm/board_k2g.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot Reviewed-by: Tom Rini diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 40edbaa..a738dd2 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -12,6 +12,7 @@ #include #include #include "mux-k2g.h" +#include "../common/board_detect.h" #define SYS_CLK 24000000 @@ -149,6 +150,24 @@ int board_early_init_f(void) } #endif +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_TI_I2C_BOARD_DETECT) + int rc; + + rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS); + if (rc) + printf("ti_i2c_eeprom_init failed %d\n", rc); + + board_ti_set_ethaddr(1); +#endif + + return 0; +} +#endif + #ifdef CONFIG_SPL_BUILD void spl_init_keystone_plls(void) { From patchwork Mon Feb 6 09:36:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 93391 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1630223qgi; Mon, 6 Feb 2017 01:37:55 -0800 (PST) X-Received: by 10.223.136.85 with SMTP id e21mr8342586wre.28.1486373875746; Mon, 06 Feb 2017 01:37:55 -0800 (PST) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id l8si222638wrb.169.2017.02.06.01.37.55; Mon, 06 Feb 2017 01:37:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7CD9D4B63D; Mon, 6 Feb 2017 10:37:46 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DeSEzXmPtBW3; Mon, 6 Feb 2017 10:37:46 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 347EE4B9A2; Mon, 6 Feb 2017 10:37:06 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2ED1A4B5BF for ; Mon, 6 Feb 2017 10:36:41 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SZAY6RC40HDC for ; Mon, 6 Feb 2017 10:36:41 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by theia.denx.de (Postfix) with ESMTPS id 4C60C4B55F for ; Mon, 6 Feb 2017 10:36:38 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v169aZQh029216; Mon, 6 Feb 2017 03:36:35 -0600 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aZY6014691; Mon, 6 Feb 2017 03:36:35 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Mon, 6 Feb 2017 03:36:35 -0600 Received: from lta0400828d.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v169aH17000892; Mon, 6 Feb 2017 03:36:34 -0600 From: Roger Quadros To: , Date: Mon, 6 Feb 2017 11:36:15 +0200 Message-ID: <1486373775-29580-9-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486373775-29580-1-git-send-email-rogerq@ti.com> References: <1486373775-29580-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [u-boot PATCH v3 8/8] ti: common: board_detect: Rename EEPROM scratch start macro X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Lokesh Vutla Non OMAP platforms i.e. Keystone will also need to use the board EEPROM helpers so let's make the macro platform independent. Signed-off-by: Roger Quadros Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini --- arch/arm/include/asm/omap_common.h | 8 +++++--- board/ti/common/board_detect.h | 2 +- 2 files changed, 6 insertions(+), 4 deletions(-) -- 2.7.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 2034a5e..c1a70b1 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -767,9 +767,11 @@ static inline u8 is_dra72x(void) #define OMAP_SRAM_SCRATCH_VCORES_PTR (SRAM_SCRATCH_SPACE_ADDR + 0x1C) #define OMAP_SRAM_SCRATCH_SYS_CTRL (SRAM_SCRATCH_SPACE_ADDR + 0x20) #define OMAP_SRAM_SCRATCH_BOOT_PARAMS (SRAM_SCRATCH_SPACE_ADDR + 0x24) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) -#define OMAP_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) -#define OMAP_SRAM_SCRATCH_SPACE_END (OMAP_SRAM_SCRATCH_BOARD_EEPROM_END) +#ifndef TI_SRAM_SCRATCH_BOARD_EEPROM_START +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR + 0x28) +#define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200) +#endif +#define OMAP_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END) /* Boot parameters */ #define DEVICE_DATA_OFFSET 0x18 diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h index 4bcb64f..88b0a59 100644 --- a/board/ti/common/board_detect.h +++ b/board/ti/common/board_detect.h @@ -98,7 +98,7 @@ struct ti_common_eeprom { }; #define TI_EEPROM_DATA ((struct ti_common_eeprom *)\ - OMAP_SRAM_SCRATCH_BOARD_EEPROM_START) + TI_SRAM_SCRATCH_BOARD_EEPROM_START) /** * ti_i2c_eeprom_am_get() - Consolidated eeprom data collection for AM* TI EVMs