From patchwork Mon Aug 28 16:06:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 111174 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp5048470qge; Mon, 28 Aug 2017 09:07:13 -0700 (PDT) X-Received: by 10.80.213.155 with SMTP id v27mr893253edi.37.1503936432995; Mon, 28 Aug 2017 09:07:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503936432; cv=none; d=google.com; s=arc-20160816; b=V5fewrjNaVkiJiKdsAYhMGXU45JiiBKOMcuygUypF+ee13cguaxNUCH4P/yjCibdXY MqdfeePyy3l1hLnjABJrZ/yebH4KQkmAVsOE1daWHpVYsO2Pu7fioy6/U0AAnCZv5TTr OfdafyiyPYTgzcnN5M9aaZWIgxMbAJLaJ1p9ZTOzUKPPzAfZrNqprY8f2uFc2AnDjSeT hGXDyOuBj3XFIEFiAsTo7RwcJjEJdKDMvpq0pyQLIcAE2ljh7sazUuWKf2gIxdSORrkd qGga989zp0SDnSBDqYk4NdDc+V/+9qjWdxtTYP67ZlLCfRyVp/Am0cMBCHGcrj9GnIpa cEVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :dkim-filter:arc-authentication-results; bh=PVSm8xB+Q+pXvc0xTcpJXdyBRZ0zUEt4CUoWWyQ8daY=; b=VAO4QWIkrzZ+oTZIDEvXjkApd8FK/y8oLOd9e3TNOYA/E62KopELIsHVwLpZf+xLlY hDHZX+0cTosIVMLshIZvD1+Q1K8IXpFfOaV2HFRiphVPWpAq6IxrE7T9HhZp5ZLzIG7g PGdBc8aXzUKiiMnVxVVx2LCIR5oWLIDitiJrU3ekG3hifrMn5W5wMfCHxIYgE5weCGdx d2SAa+HOr2/wVanAjoFeY8SmO9KlKAdFHs4vQjzVQLa7VxdU7UKZ2V0RdKz+ahr9W7yB 5PU8G9KW73BibJ+pWOKKLtfUqNTTPx554JWoLPdyjg1P1mg5DpL+T8p4B/wPrE3PdtHI Giqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=khmBlTAH; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id o30si834901edc.154.2017.08.28.09.07.12; Mon, 28 Aug 2017 09:07:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=khmBlTAH; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 94FA7C2252E; Mon, 28 Aug 2017 16:06:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6623DC22545; Mon, 28 Aug 2017 16:06:42 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 34AA1C22531; Mon, 28 Aug 2017 16:06:25 +0000 (UTC) Received: from conuserg-12.nifty.com (conuserg-12.nifty.com [210.131.2.79]) by lists.denx.de (Postfix) with ESMTPS id E5FF0C22528 for ; Mon, 28 Aug 2017 16:06:21 +0000 (UTC) Received: from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp [122.131.185.176]) (authenticated) by conuserg-12.nifty.com with ESMTP id v7SG6HFi006141; Tue, 29 Aug 2017 01:06:17 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v7SG6HFi006141 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1503936377; bh=jD55MSHkiixkbN/q3njPy/8kJofvABW1+V1A6HW4K/8=; h=From:To:Cc:Subject:Date:From; b=khmBlTAH2NEKZr7264jaBTFXkbV7r2jgQi5fcED4/jNBAKJkR1rfnTjH2OYzXiEdW 2H1+DbrEciDZaiZYk/XW77vMtVRD7OxiUAwfuINgLUB5jVzbnFYt06LPIn89HHbl6Y tZS8PizI1D3/euS1r8Ued3tpFNVmhu7c55pd7a7JBZjMWMkUTUJH6L+dnzSfw2KjSs NhOfZmdlMYhvkijZgWITXC9A84yWhXIB8WDHHxHtcQASOP/ikIl0NeIs9fRwkrPbTS dH6d/4cpMjBOS6iIv/csd+eqwwRjwkfaxbS29KArRPQ5ed66QakkO7TRw73N1d+bFY 7Ca8dKEIx9hkA== X-Nifty-SrcIP: [122.131.185.176] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Tue, 29 Aug 2017 01:06:15 +0900 Message-Id: <1503936375-26498-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Subject: [U-Boot] [PATCH] clk: uniphier: add System clock support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Support system clocks for LD4, Pro4, sLD8, Pro5, PXs2/LD6b, LD11, LD20. Signed-off-by: Masahiro Yamada --- drivers/clk/uniphier/Makefile | 1 + drivers/clk/uniphier/clk-uniphier-core.c | 30 ++++++++++++++++++++++++++++ drivers/clk/uniphier/clk-uniphier-sys.c | 34 ++++++++++++++++++++++++++++++++ drivers/clk/uniphier/clk-uniphier.h | 2 ++ 4 files changed, 67 insertions(+) create mode 100644 drivers/clk/uniphier/clk-uniphier-sys.c diff --git a/drivers/clk/uniphier/Makefile b/drivers/clk/uniphier/Makefile index ed623aa56f75..54c7e09bd606 100644 --- a/drivers/clk/uniphier/Makefile +++ b/drivers/clk/uniphier/Makefile @@ -1,2 +1,3 @@ obj-y += clk-uniphier-core.o +obj-y += clk-uniphier-sys.o obj-y += clk-uniphier-mio.o diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c index eed21b9a6871..722cd6b060c8 100644 --- a/drivers/clk/uniphier/clk-uniphier-core.c +++ b/drivers/clk/uniphier/clk-uniphier-core.c @@ -146,6 +146,36 @@ static int uniphier_clk_probe(struct udevice *dev) } static const struct udevice_id uniphier_clk_match[] = { + /* System clock */ + { + .compatible = "socionext,uniphier-ld4-clock", + .data = (ulong)&uniphier_pxs2_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-pro4-clock", + .data = (ulong)&uniphier_pxs2_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-sld8-clock", + .data = (ulong)&uniphier_pxs2_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-pro5-clock", + .data = (ulong)&uniphier_pxs2_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-pxs2-clock", + .data = (ulong)&uniphier_pxs2_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-ld11-clock", + .data = (ulong)&uniphier_ld20_sys_clk_data, + }, + { + .compatible = "socionext,uniphier-ld20-clock", + .data = (ulong)&uniphier_ld20_sys_clk_data, + }, + /* Media I/O clock */ { .compatible = "socionext,uniphier-ld4-mio-clock", .data = (ulong)&uniphier_mio_clk_data, diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c new file mode 100644 index 000000000000..709fa5081a42 --- /dev/null +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "clk-uniphier.h" + +const struct uniphier_clk_gate_data uniphier_pxs2_sys_clk_gate[] = { + UNIPHIER_CLK_GATE(8, 0x2104, 10), /* stdmac */ + UNIPHIER_CLK_GATE(12, 0x2104, 6), /* gio (Pro4, Pro5) */ + UNIPHIER_CLK_GATE(14, 0x2104, 16), /* usb30 (Pro4, Pro5, PXs2) */ + UNIPHIER_CLK_GATE(15, 0x2104, 17), /* usb31 (Pro4, Pro5, PXs2) */ + UNIPHIER_CLK_GATE(16, 0x2104, 19), /* usb30-phy (PXs2) */ + UNIPHIER_CLK_GATE(20, 0x2104, 20), /* usb31-phy (PXs2) */ + UNIPHIER_CLK_END +}; + +const struct uniphier_clk_data uniphier_pxs2_sys_clk_data = { + .gate = uniphier_pxs2_sys_clk_gate, +}; + +const struct uniphier_clk_gate_data uniphier_ld20_sys_clk_gate[] = { + UNIPHIER_CLK_GATE(8, 0x210c, 8), /* stdmac */ + UNIPHIER_CLK_GATE(14, 0x210c, 14), /* usb30 (LD20) */ + UNIPHIER_CLK_GATE(16, 0x210c, 12), /* usb30-phy0 (LD20) */ + UNIPHIER_CLK_GATE(17, 0x210c, 13), /* usb30-phy1 (LD20) */ + UNIPHIER_CLK_END +}; + +const struct uniphier_clk_data uniphier_ld20_sys_clk_data = { + .gate = uniphier_ld20_sys_clk_gate, +}; diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h index f9a560ee73d3..770a3225e1a3 100644 --- a/drivers/clk/uniphier/clk-uniphier.h +++ b/drivers/clk/uniphier/clk-uniphier.h @@ -50,6 +50,8 @@ struct uniphier_clk_data { .rates = {(_reg),}, \ } +extern const struct uniphier_clk_data uniphier_pxs2_sys_clk_data; +extern const struct uniphier_clk_data uniphier_ld20_sys_clk_data; extern const struct uniphier_clk_data uniphier_mio_clk_data; #endif /* __CLK_UNIPHIER_H__ */