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Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR02MB2418 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation to describe Xilinx ZynqMP AES-GCM driver bindings. Signed-off-by: Kalyani Akula --- V5 Changes: - Moved dt-bindings patch from 1/4 to 2/4 - Converted dt-bindings from .txt to .yaml format. .../bindings/crypto/xlnx,zynqmp-aes.yaml | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml new file mode 100644 index 0000000..b2bca4b --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings + +maintainers: + - Kalyani Akula + - Michal Simek + +description: | + The ZynqMP AES-GCM hardened cryptographic accelerator is used to + encrypt or decrypt the data with provided key and initialization vector. + +properties: + compatible: + const: xlnx,zynqmp-aes + +required: + - compatible + +additionalProperties: false + +examples: + - | + firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + xlnx_aes: zynqmp-aes { + compatible = "xlnx,zynqmp-aes"; + }; + }; + }; +... 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Thu, 23 Jan 2020 03:12:28 -0800 Received: from [172.23.155.80] (helo=xhdengvm155080.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1iuaPL-0007fL-Ih; Thu, 23 Jan 2020 03:12:19 -0800 Received: by xhdengvm155080.xilinx.com (Postfix, from userid 23151) id 1E47C800C7; Thu, 23 Jan 2020 16:41:26 +0530 (IST) From: Kalyani Akula To: herbert@gondor.apana.org.au, davem@davemloft.net, monstr@seznam.cz, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , devicetree@vger.kernel.org, git-dev , Mohan Marutirao Dhanawade , Sarat Chand Savitala , Harsh Jain , Michal Simek , Kalyani Akula , Kalyani Akula Subject: [PATCH V5 4/4] arm64: zynqmp: Add Xilinx AES node. Date: Thu, 23 Jan 2020 16:41:17 +0530 Message-Id: <1579777877-10553-5-git-send-email-kalyani.akula@xilinx.com> X-Mailer: git-send-email 1.9.5 In-Reply-To: <1579777877-10553-1-git-send-email-kalyani.akula@xilinx.com> References: <1579777877-10553-1-git-send-email-kalyani.akula@xilinx.com> X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83; IPV:; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(39860400002)(396003)(376002)(346002)(199004)(189003)(81156014)(26005)(81166006)(36756003)(8676002)(4744005)(107886003)(2906002)(316002)(5660300002)(336012)(70586007)(70206006)(356004)(6266002)(6666004)(54906003)(2616005)(478600001)(44832011)(426003)(186003)(4326008)(42186006)(8936002); DIR:OUT; SFP:1101; SCL:1; SRVR:BN7PR02MB5348; H:xsj-pvapsmtpgw01; FPR:; SPF:Pass; LANG:en; PTR:unknown-60-83.xilinx.com; A:1; MX:1; MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0dbda26b-bcfc-4a39-0d32-08d79ff52564 X-MS-TrafficTypeDiagnostic: BN7PR02MB5348: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-Forefront-PRVS: 029174C036 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: DioHXt3j88T2TcrzNCoSZ220A6hNcQdnio/Do8GIPrB0Qh1DTNxJJQeAp5c0g8Li7QSKY0aNVAR7BON6P0Syv0LCL73wKsKtSk727j0rbwJQ6sgGV2MN/Ph0D2WBoIlCTkU/LFjJr4SjRsbBJlCoIHv91mIVZt0LG5ZKb3NJpcIlhY40A3v0Y8xya4VEWD7YNsRhAqvstEPVLcEYhqVsJomLxQTiu+J9qfPloFpcmLFSwm2jQyJgWPi1Ns3GtBb6tbgEcW5HHyyWT38QT6VgnXu6RReKKoAwNuK3TZ9wMEPomWTIa4/Q29N2jkH+3IqJ+Juz+RJxF+ypxeV/DfgWyGUVXUYl7SVaStvNSk0B7ccrkiuR/4jIKWiv3L5F9yh5sh+uPVhVa7MVF/wTUBlBqeYn5UaD12yS1JlzoWljdSkoSrY8DEMF7OXU27g6GitK X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2020 11:12:33.7552 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0dbda26b-bcfc-4a39-0d32-08d79ff52564 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PR02MB5348 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds a AES DT node for Xilinx ZynqMP SoC. Signed-off-by: Kalyani Akula --- V5 Changes: - Moved arm64: zynqmp: Add Xilinx AES node patch from 2/4 to 4/4 - Corrected typo in the subject. - Updated zynqmp-aes node to correct location. arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 3c731e7..e9fbbe1 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -133,6 +133,10 @@ zynqmp_pcap: pcap { compatible = "xlnx,zynqmp-pcap-fpga"; }; + + xlnx_aes: zynqmp-aes { + compatible = "xlnx,zynqmp-aes"; + }; }; };