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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id q10si3573797plk.767.2017.08.24.13.21.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Aug 2017 13:21:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OEoRKmuV; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C7BD42095B9D9; Thu, 24 Aug 2017 13:19:09 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received: from mail-wm0-x236.google.com (mail-wm0-x236.google.com [IPv6:2a00:1450:400c:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 73F202095B9D1 for ; Thu, 24 Aug 2017 13:19:07 -0700 (PDT) Received: by mail-wm0-x236.google.com with SMTP id z132so3706645wmg.1 for ; Thu, 24 Aug 2017 13:21:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=IGrkM7pHSIKkqouksdHb4D/zTcDPP9UGDXK8+AbJ4GY=; b=OEoRKmuVxEHFbotdtSzlUVyD31uLA7mr0tgJNQmnXehXCxSbZJfk5N8qVqCwCqn3qU MCLbXd37QKSL14Bzr3NDiM/3u8GGhMHmzrcYq/JliX2hvdu51t1r/XjRtTYj6iYwFsjZ I1gk4rppIqhhGHu8FxVhHB+A7/cXc1XGb5SqA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=IGrkM7pHSIKkqouksdHb4D/zTcDPP9UGDXK8+AbJ4GY=; b=AMaWShC9eRH/BXQqt7x7haUKodP9C3tfZdHtjzMuZmL0ufMlXs/ZIN5ubCEiWlE16d 2csQKCI0uDoi2OnHvCxHdtSDzEF7cdbhX3U3DaYpfPykjfaRHrQJfCKjtLfkA/t4HFo8 xf70gKULDiBmtpp3LEKN0Mw47QEJE5FKcRTI+gi6ujANLTeK+ZOn4EI2h52E3c53PKtl eiTnHw2zGKgUAaxAsWwaLaJobM5ZwzRNx47LZ9QxdZsKiCjbAoCUyzbUrdkBf9hy0Ue0 +5/jGHBZUUQv776LG0Rq4/ilLDZHDlBfbl29Lip5LfD4CD0jBALtMYa/gm4T/zfUlqkq sgBw== X-Gm-Message-State: AHYfb5g8jFifKqMa1PmNPCWENoGz5BIX1wKb7oM0r/BlbF5Y0SdA0qsu vr/5GuqqigZE6RzmuAKyoQ== X-Received: by 10.28.238.135 with SMTP id j7mr10959wmi.12.1503606099968; Thu, 24 Aug 2017 13:21:39 -0700 (PDT) Received: from localhost.localdomain ([105.137.125.182]) by smtp.gmail.com with ESMTPSA id q16sm7780576wmg.30.2017.08.24.13.21.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Aug 2017 13:21:38 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Thu, 24 Aug 2017 21:21:32 +0100 Message-Id: <20170824202132.24624-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [edk2] [PATCH] Silicon/Hisilicon: switch to NonDiscoverable driver for EHCI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: heyi.guo@linaro.org, chenhui.sun@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Replace the open coded PCI 'emulation' with a simple call into the NonDiscoverable device registration library, and fix up all platform .DSCs/FDFs accordingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- I can't test this myself, unfortunately. Platform/Hisilicon/D02/Pv660D02.dsc | 1 + Platform/Hisilicon/D02/Pv660D02.fdf | 1 + Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D03/D03.fdf | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D05/D05.fdf | 1 + Platform/Hisilicon/HiKey/HiKey.dsc | 2 - Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c | 669 +------------------- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.h | 82 --- Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf | 26 +- 10 files changed, 19 insertions(+), 766 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D02/Pv660D02.dsc b/Platform/Hisilicon/D02/Pv660D02.dsc index 99d6972c7542..423f7d77ff8d 100644 --- a/Platform/Hisilicon/D02/Pv660D02.dsc +++ b/Platform/Hisilicon/D02/Pv660D02.dsc @@ -397,6 +397,7 @@ # USB Support # Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf diff --git a/Platform/Hisilicon/D02/Pv660D02.fdf b/Platform/Hisilicon/D02/Pv660D02.fdf index 2d6cdcd9f649..e0bb0ab2733c 100644 --- a/Platform/Hisilicon/D02/Pv660D02.fdf +++ b/Platform/Hisilicon/D02/Pv660D02.fdf @@ -257,6 +257,7 @@ READ_LOCK_STATUS = TRUE # USB Support # INF Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index fc675c17ecae..6363b7eeec50 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -408,6 +408,7 @@ # Usb Support # Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf Platform/Hisilicon/D03/Drivers/OhciDxe/OhciDxe.inf MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index d831b42a1a52..b62b90816a6b 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -205,6 +205,7 @@ READ_LOCK_STATUS = TRUE # INF Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf INF Platform/Hisilicon/D03/Drivers/OhciDxe/OhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 603cf34b8408..35c319757ef8 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -528,6 +528,7 @@ # Usb Support # Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 6cd7239d9442..b6d0e4252375 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -209,6 +209,7 @@ READ_LOCK_STATUS = TRUE # INF Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf + INF MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf INF Platform/Hisilicon/D05/Drivers/OhciDxe/OhciDxe.inf INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf diff --git a/Platform/Hisilicon/HiKey/HiKey.dsc b/Platform/Hisilicon/HiKey/HiKey.dsc index 1bc8ae4ce8f7..9accf781c25f 100644 --- a/Platform/Hisilicon/HiKey/HiKey.dsc +++ b/Platform/Hisilicon/HiKey/HiKey.dsc @@ -110,8 +110,6 @@ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf - # Network Libraries UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c index 0cb1e8049a26..706eb123f2e6 100644 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c +++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.c @@ -13,611 +13,9 @@ * **/ -#include "VirtualEhciPciIo.h" -#include - -UINT32 mUsbMemBase; -UINTN mSegmentNumber = 0; -// Use 0xFF for the virtual PCI devices -UINTN mBusNumber = 0xFF; -UINTN mDeviceNumber = 0; -UINTN mFunctionNumber = 0; - -typedef struct { - EFI_PHYSICAL_ADDRESS HostAddress; - EFI_PHYSICAL_ADDRESS DeviceAddress; - UINTN NumberOfBytes; - EFI_PCI_IO_PROTOCOL_OPERATION Operation; - BOOLEAN DoubleBuffer; -} MEM_MAP_INFO_INSTANCE; - - -EFI_CPU_ARCH_PROTOCOL *gCpu; - - -EHCI_PCI_CONFIG mEhciPciConfig = { - { - 0x00,//UINT16 VendorId; - 0x00,//UINT16 DeviceId; - 0x00,//UINT16 Command; - 0x0010,//UINT16 Status; - 0x00,//UINT8 RevisionID; - { - PCI_IF_EHCI,//UINT8 ClassCode[3]; - PCI_CLASS_SERIAL_USB, - PCI_CLASS_SERIAL - }, - 0x00,//UINT8 CacheLineSize; - 0x00,//UINT8 LatencyTimer; - 0x00,//UINT8 HeaderType; - 0x00//UINT8 BIST; - }, - { - { - 0x00,//UINT32 Bar[6]; - 0x00, - 0x00, - 0x00, - 0x00, - 0x00 - }, - 0x00,//UINT32 CISPtr; - 0x00,//UINT16 SubsystemVendorID; - 0x00,//UINT16 SubsystemID; - 0x00,//UINT32 ExpansionRomBar; - 0x40,//UINT8 CapabilityPtr; - { - 0x00,//UINT8 Reserved1[3]; - 0x00, - 0x00 - }, - 0x00,//UINT32 Reserved2; - 0x00,//UINT8 InterruptLine; - 0x00,//UINT8 InterruptPin; - 0x00,//UINT8 MinGnt; - 0x00//UINT8 MaxLat; - }, - 0x0A,// UINT8 CapabilityID offset 0x40 - 0x00,// UINT8 NextItemPtr - 0x2000 //UINT16 DebugPort -}; - - - -EFI_STATUS -EhciPciIoPollMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoPollIo ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINT64 Mask, - IN UINT64 Value, - IN UINT64 Delay, - OUT UINT64 *Result - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoMemRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - UINT32 i; - - if ((UINT32)Width >= EfiPciIoWidthMaximum) { - return EFI_INVALID_PARAMETER; - } - - if (Buffer == NULL) { - return EFI_INVALID_PARAMETER; - } - - if (BarIndex != 0) { - return EFI_INVALID_PARAMETER; - } - - Width = Width & 0x03; - - // - // Loop for each iteration and move the data - // - switch (Width) { - case EfiPciWidthUint8: - for (i = 0; i < Count; i++){ - *((UINT8 *)Buffer + i)= MmioRead8(mUsbMemBase + Offset + i); - } - break; - case EfiPciWidthUint16: - for (i = 0; i < Count; i++){ - *((UINT16 *)Buffer + i)= MmioRead16(mUsbMemBase + Offset + i * 2); - } - break; - case EfiPciWidthUint32: - for (i = 0; i < Count; i++){ - *((UINT32 *)Buffer + i)= MmioRead32(mUsbMemBase + Offset + i * 4); - } - break; - case EfiPciWidthUint64: - for (i = 0; i < Count; i++){ - *((UINT64 *)Buffer + i)= MmioRead64(mUsbMemBase + Offset + i * 8); - } - break; - default: - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoMemWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - UINT32 i; - - if ((UINT32)Width >= EfiPciIoWidthMaximum) { - return EFI_INVALID_PARAMETER; - } - - if (Buffer == NULL) { - return EFI_INVALID_PARAMETER; - } - - Width = Width & 0x03; - - // - // Loop for each iteration and move the data - // - switch (Width) { - case EfiPciWidthUint8: - for (i = 0; i < Count; i++){ - MmioWrite8(mUsbMemBase + Offset + i, *((UINT8 *)Buffer + i)); - } - break; - case EfiPciWidthUint16: - for (i = 0; i < Count; i++){ - MmioWrite16(mUsbMemBase + Offset + i * 2, *((UINT16 *)Buffer + i)); - } - break; - case EfiPciWidthUint32: - for (i = 0; i < Count; i++){ - MmioWrite32(mUsbMemBase + Offset + i * 4, *((UINT32 *)Buffer + i)); - } - break; - case EfiPciWidthUint64: - for (i = 0; i < Count; i++){ - MmioWrite64(mUsbMemBase + Offset + i * 8, *((UINT64 *)Buffer + i)); - } - break; - default: - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; - -} - -EFI_STATUS -EhciPciIoIoRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoIoWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 BarIndex, - IN UINT64 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoPciRead ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - UINT32 i; - UINT8 *DataPtr; - - Width = Width & 0x03; - - if (Offset < sizeof (EHCI_PCI_CONFIG) / sizeof (UINT8)){ - - DataPtr = (UINT8 *)(&mEhciPciConfig) + Offset; - - switch (Width) { - case EfiPciWidthUint8: - for (i = 0; i < Count; i++){ - *((UINT8 *)Buffer + i)= *(DataPtr + i); - } - break; - case EfiPciWidthUint16: - for (i = 0; i < Count; i++){ - *((UINT16 *)Buffer + i)= *((UINT16 *)DataPtr + i); - } - break; - case EfiPciWidthUint32: - for (i = 0; i < Count; i++){ - *(UINT32 *)(Buffer + i)= *((UINT32 *)DataPtr + i); - } - break; - case EfiPciWidthUint64: - for (i = 0; i < Count; i++){ - *(UINT64 *)(Buffer + i)= *((UINT64 *)DataPtr + i); - } - break; - default: - return EFI_INVALID_PARAMETER; - } - - } else { - switch (Width) { - case EfiPciWidthUint8: - *(UINT8 *)Buffer = 0xFF; - break; - case EfiPciWidthUint16: - *(UINT16 *)Buffer = 0xFFFF; - break; - case EfiPciWidthUint32: - *(UINT32 *)Buffer = 0xFFFFFFFF; - break; - case EfiPciWidthUint64: - *(UINT64 *)Buffer = 0xFFFFFFFFFFFFFFFF; - break; - default: - return EFI_INVALID_PARAMETER; - } - } - - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoPciWrite ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT32 Offset, - IN UINTN Count, - IN OUT VOID *Buffer - ) -{ - - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoCopyMem ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_WIDTH Width, - IN UINT8 DestBarIndex, - IN UINT64 DestOffset, - IN UINT8 SrcBarIndex, - IN UINT64 SrcOffset, - IN UINTN Count - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoMap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, - IN VOID *HostAddress, - IN OUT UINTN *NumberOfBytes, - OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, - OUT VOID **Mapping - ) -{ - EFI_STATUS Status; - MEM_MAP_INFO_INSTANCE *Map; - VOID *Buffer; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor; - - if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) { - return EFI_INVALID_PARAMETER; - } - - if ((UINT32)Operation >= EfiPciIoOperationMaximum) { - return EFI_INVALID_PARAMETER; - } - - *DeviceAddress = ConvertToPhysicalAddress (HostAddress); - - // Remember range so we can flush on the other side - Map = AllocatePool (sizeof (MEM_MAP_INFO_INSTANCE)); - if (Map == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - *Mapping = Map; - - if ((((UINTN)HostAddress & (EFI_PAGE_SIZE - 1)) != 0) || - ((*NumberOfBytes % EFI_PAGE_SIZE) != 0)) { - - // Get the cacheability of the region - Status = gDS->GetMemorySpaceDescriptor (*DeviceAddress, &GcdDescriptor); - if (EFI_ERROR(Status)) { - return Status; - } - - // If the mapped buffer is not an uncached buffer - if ( (GcdDescriptor.Attributes != EFI_MEMORY_WC) && - (GcdDescriptor.Attributes != EFI_MEMORY_UC) ) - { - // - // If the buffer does not fill entire cache lines we must double buffer into - // uncached memory. Device (PCI) address becomes uncached page. - // - Map->DoubleBuffer = TRUE; - Buffer = UncachedAllocatePages(EFI_SIZE_TO_PAGES (*NumberOfBytes)); - - if (Buffer == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - CopyMem (Buffer, HostAddress, *NumberOfBytes); - *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)Buffer; - } else { - Map->DoubleBuffer = FALSE; - } - } else { - Map->DoubleBuffer = FALSE; - - // Flush the Data Cache (should not have any effect if the memory region is uncached) - gCpu->FlushDataCache (gCpu, *DeviceAddress, *NumberOfBytes, EfiCpuFlushTypeWriteBackInvalidate); - - Status = gDS->SetMemorySpaceAttributes (*DeviceAddress & ~(BASE_4KB - 1), ALIGN_VALUE (*NumberOfBytes, BASE_4KB), EFI_MEMORY_WC); - if (EFI_ERROR (Status)) { - DEBUG((EFI_D_ERROR, "[%a]:[%dL] SetMemorySpaceAttributes Fail. %r\n", __FUNCTION__, __LINE__, Status)); - } - } - - Map->HostAddress = (UINTN)HostAddress; - Map->DeviceAddress = *DeviceAddress; - Map->NumberOfBytes = *NumberOfBytes; - Map->Operation = Operation; - - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoUnmap ( - IN EFI_PCI_IO_PROTOCOL *This, - IN VOID *Mapping - ) -{ - MEM_MAP_INFO_INSTANCE *Map; - - if (Mapping == NULL) { - return EFI_INVALID_PARAMETER; - } - - Map = (MEM_MAP_INFO_INSTANCE *)Mapping; - - if (Map->DoubleBuffer) { - if ((Map->Operation == EfiPciIoOperationBusMasterWrite) || (Map->Operation == EfiPciIoOperationBusMasterCommonBuffer)) { - CopyMem ((VOID *)(UINTN)Map->HostAddress, (VOID *)(UINTN)Map->DeviceAddress, Map->NumberOfBytes); - } - - if((VOID *)(UINTN)Map->DeviceAddress != NULL) { - UncachedFreePages ((VOID *)(UINTN)Map->DeviceAddress, EFI_SIZE_TO_PAGES (Map->NumberOfBytes)); - } - - - } else { - if (Map->Operation == EfiPciIoOperationBusMasterWrite) { - // - // Make sure we read buffer from uncached memory and not the cache - // - gCpu->FlushDataCache (gCpu, Map->HostAddress, Map->NumberOfBytes, EfiCpuFlushTypeInvalidate); - } - } - - FreePool (Map); - - return EFI_SUCCESS; -} - - - -EFI_STATUS -EhciPciIoAllocateBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_ALLOCATE_TYPE Type, - IN EFI_MEMORY_TYPE MemoryType, - IN UINTN Pages, - OUT VOID **HostAddress, - IN UINT64 Attributes - ) -{ - UINT32 HcCapParams; - - if (Attributes & - (~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | - EFI_PCI_ATTRIBUTE_MEMORY_CACHED ))) { - return EFI_UNSUPPORTED; - } - - if (HostAddress == NULL) { - return EFI_INVALID_PARAMETER; - } - - if (MemoryType == EfiBootServicesData) { - HcCapParams = MmioRead32(mUsbMemBase + EHC_HCCPARAMS_OFFSET); - if ((BOOLEAN)(((HcCapParams) & (HCCP_64BIT)) == (HCCP_64BIT))){ - *HostAddress = UncachedAllocatePages(Pages); - } else { - // TODO: We need support allocating UC memory below 4GB strictly - *HostAddress = UncachedAllocatePages(Pages); - } - - }else{ - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; -} - - -EFI_STATUS -EhciPciIoFreeBuffer ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINTN Pages, - IN VOID *HostAddress - ) -{ - UncachedFreePages (HostAddress, Pages); - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoFlush ( - IN EFI_PCI_IO_PROTOCOL *This - ) -{ - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoGetLocation ( - IN EFI_PCI_IO_PROTOCOL *This, - OUT UINTN *SegmentNumber, - OUT UINTN *BusNumber, - OUT UINTN *DeviceNumber, - OUT UINTN *FunctionNumber - ) -{ - - *SegmentNumber = mSegmentNumber; - *BusNumber = mBusNumber; - *DeviceNumber = mDeviceNumber; - *FunctionNumber = mFunctionNumber; - - return EFI_SUCCESS; -} - - -EFI_STATUS -EhciPciIoAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, - IN UINT64 Attributes, - OUT UINT64 *Result OPTIONAL - ) -{ - if (Result != NULL) { - *Result = 0; - } - return EFI_SUCCESS; -} - -EFI_STATUS -EhciPciIoGetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT8 BarIndex, - OUT UINT64 *Supports, OPTIONAL - OUT VOID **Resources OPTIONAL - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EhciPciIoSetBarAttributes ( - IN EFI_PCI_IO_PROTOCOL *This, - IN UINT64 Attributes, - IN UINT8 BarIndex, - IN OUT UINT64 *Offset, - IN OUT UINT64 *Length - ) -{ - ASSERT (FALSE); - return EFI_UNSUPPORTED; -} - -// -// Pci Io Protocol Interface -// -EFI_PCI_IO_PROTOCOL mEhciPciIoInterface = { - EhciPciIoPollMem, - EhciPciIoPollIo, - { - EhciPciIoMemRead, - EhciPciIoMemWrite - }, - { - EhciPciIoIoRead, - EhciPciIoIoWrite - }, - { - EhciPciIoPciRead, - EhciPciIoPciWrite - }, - EhciPciIoCopyMem, - EhciPciIoMap, - EhciPciIoUnmap, - EhciPciIoAllocateBuffer, - EhciPciIoFreeBuffer, - EhciPciIoFlush, - EhciPciIoGetLocation, - EhciPciIoAttributes, - EhciPciIoGetBarAttributes, - EhciPciIoSetBarAttributes, - 0, - NULL -}; - +#include +#include +#include EFI_STATUS EFIAPI @@ -626,57 +24,12 @@ EhciVirtualPciIoInitialize ( IN EFI_SYSTEM_TABLE *SystemTable ) { - EFI_STATUS Status; - EFI_HANDLE Handle; - EFI_DEV_PATH EndNode; - EFI_DEV_PATH Node; - EFI_DEVICE_PATH_PROTOCOL *DevicePath = NULL; - - mUsbMemBase = PlatformGetEhciBase (); - - DEBUG ((EFI_D_ERROR, "mUsbMemBase: 0x%x\n", mUsbMemBase)); - - // Get the Cpu protocol for later use - Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu); - - // - // Install the pciio protocol, device path protocol - // - Handle = NULL; - - Status = gBS->InstallMultipleProtocolInterfaces ( - &Handle, - &gEfiPciIoProtocolGuid, - &mEhciPciIoInterface, - NULL - ); - if (EFI_ERROR (Status)) { - return Status; - } - - (void)ZeroMem (&Node, sizeof (Node)); - Node.DevPath.Type = HARDWARE_DEVICE_PATH; - Node.DevPath.SubType = HW_PCI_DP; - (void)SetDevicePathNodeLength (&Node.DevPath, sizeof (PCI_DEVICE_PATH)); - // Make USB controller device path different from built-in SATA controller - Node.Pci.Function = 1; - Node.Pci.Device = 0; - - SetDevicePathEndNode (&EndNode.DevPath); - - DevicePath = AppendDevicePathNode (&EndNode.DevPath, &Node.DevPath); - - Status = gBS->InstallProtocolInterface ( - &Handle, - &gEfiDevicePathProtocolGuid, - EFI_NATIVE_INTERFACE, - DevicePath - ); - if(EFI_ERROR(Status)) - { - DEBUG((EFI_D_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status)); - } - - - return EFI_SUCCESS; + return RegisterNonDiscoverableMmioDevice ( + NonDiscoverableDeviceTypeEhci, + NonDiscoverableDeviceDmaTypeNonCoherent, + NULL, + NULL, + 1, + PlatformGetEhciBase (), + SIZE_4KB); } diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.h b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.h deleted file mode 100644 index ae7a934a11e3..000000000000 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.h +++ /dev/null @@ -1,82 +0,0 @@ -/** @file -* -* Copyright (c) 2016, Hisilicon Limited. All rights reserved. -* Copyright (c) 2016, Linaro Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef _EHCI_PCIIO_H_ -#define _EHCI_PCIIO_H_ - -#include -#include - -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#define PCI_CLASS_SERIAL 0x0C -#define PCI_CLASS_SERIAL_FIREWIRE 0x00 -#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01 -#define PCI_CLASS_SERIAL_SSA 0x02 -#define PCI_CLASS_SERIAL_USB 0x03 -#define PCI_IF_EHCI 0x20 -#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04 -#define PCI_CLASS_SERIAL_SMB 0x05 - -// -// Capability register offset -// -#define EHC_CAPLENGTH_OFFSET 0 // Capability register length offset -#define EHC_HCSPARAMS_OFFSET 0x04 // Structural Parameters 04-07h -#define EHC_HCCPARAMS_OFFSET 0x08 // Capability parameters offset - -// -// Capability register bit definition -// -#define HCSP_NPORTS 0x0F // Number of root hub port -#define HCSP_PPC 0x10 // Port Power Control -#define HCCP_64BIT 0x01 // 64-bit addressing capability - - -typedef struct { - PCI_DEVICE_INDEPENDENT_REGION Hdr; - PCI_DEVICE_HEADER_TYPE_REGION Device; - UINT8 CapabilityID; - UINT8 NextItemPtr; - UINT16 DebugPort; -} EHCI_PCI_CONFIG; - - -#endif // _EHCI_PCIIO_H_ diff --git a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf index 4a5f5c30bcfa..c07a5b8aa250 100644 --- a/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf +++ b/Silicon/Hisilicon/Drivers/VirtualEhciPciIo/VirtualEhciPciIo.inf @@ -25,36 +25,14 @@ [Sources] - VirtualEhciPciIo.h VirtualEhciPciIo.c [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec - ArmPkg/ArmPkg.dec Silicon/Hisilicon/HisiPkg.dec -[FeaturePcd] - - [LibraryClasses] - MemoryAllocationLib - BaseLib - UefiLib - UefiBootServicesTableLib - UefiDriverEntryPoint - BaseMemoryLib - DebugLib - PcdLib - IoLib - ReportStatusCodeLib - UncachedMemoryAllocationLib - ArmLib - DxeServicesTableLib - CacheMaintenanceLib + NonDiscoverableDeviceRegistrationLib PlatformSysCtrlLib - -[Guids] - -[Protocols] - gEfiPciIoProtocolGuid ## TO_START + UefiDriverEntryPoint