From patchwork Thu Feb 20 17:43:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 204529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A108C11D0C for ; Thu, 20 Feb 2020 17:43:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 149BE2467E for ; Thu, 20 Feb 2020 17:43:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="k0JCfTYy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728629AbgBTRnx (ORCPT ); Thu, 20 Feb 2020 12:43:53 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:36745 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727233AbgBTRnx (ORCPT ); Thu, 20 Feb 2020 12:43:53 -0500 Received: from mwalle01.sab.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2916C23D22; Thu, 20 Feb 2020 18:43:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1582220631; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=s6EOAobt5saGFt58QDGrFmkjtzz3qIh/p10CWvZHnSU=; b=k0JCfTYyL8MAXZKhXwW/bGvI7bFU2v2Yfg5AX71LWPyopv+J3LmwTNRyCD99nmdoHOqUm4 abzjqYU8LWZGQXXpb0Q5ooeFI/+03n/CusbWc75NaW2EHmOCB1biYlox4+6puh6L6vKNj3 a78z0p3Lhigjxfjx3+AaRBtBRyVGdpY= From: Michael Walle To: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Jiri Slaby , Peng Fan , Yuan Yao , Vabhav Sharma , Michael Walle Subject: [PATCH 1/7] Revert "tty: serial: fsl_lpuart: drop EARLYCON_DECLARE" Date: Thu, 20 Feb 2020 18:43:28 +0100 Message-Id: <20200220174334.23322-1-michael@walle.cc> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Rspamd-Server: web X-Rspamd-Queue-Id: 2916C23D22 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; NEURAL_SPAM(0.00)[0.503]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:12941, ipnet:213.135.0.0/19, country:DE]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This reverts commit a659652f6169240a5818cb244b280c5a362ef5a4. This broke the earlycon on LS1021A processors because the order of the earlycon_setup() functions were changed. Before the commit the normal lpuart32_early_console_setup() was called. After the commit the lpuart32_imx_early_console_setup() is called instead. Fixes: a659652f6169 ("tty: serial: fsl_lpuart: drop EARLYCON_DECLARE") Signed-off-by: Michael Walle --- drivers/tty/serial/fsl_lpuart.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 91e2805e6441..27fdc131c352 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -2390,6 +2390,8 @@ static int __init lpuart32_imx_early_console_setup(struct earlycon_device *devic OF_EARLYCON_DECLARE(lpuart, "fsl,vf610-lpuart", lpuart_early_console_setup); OF_EARLYCON_DECLARE(lpuart32, "fsl,ls1021a-lpuart", lpuart32_early_console_setup); OF_EARLYCON_DECLARE(lpuart32, "fsl,imx7ulp-lpuart", lpuart32_imx_early_console_setup); +EARLYCON_DECLARE(lpuart, lpuart_early_console_setup); +EARLYCON_DECLARE(lpuart32, lpuart32_early_console_setup); #define LPUART_CONSOLE (&lpuart_console) #define LPUART32_CONSOLE (&lpuart32_console) From patchwork Thu Feb 20 17:43:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 204526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5EF06C11D16 for ; Thu, 20 Feb 2020 17:44:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CE2A24680 for ; Thu, 20 Feb 2020 17:44:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="ptgCAtca" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727233AbgBTRny (ORCPT ); Thu, 20 Feb 2020 12:43:54 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:54653 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728354AbgBTRny (ORCPT ); Thu, 20 Feb 2020 12:43:54 -0500 Received: from mwalle01.sab.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id DB1F523E25; Thu, 20 Feb 2020 18:43:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1582220632; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UaO+mat3+Uxwq9DbMCw/0coohVq5jCugVuQMQ8FIwrs=; b=ptgCAtcaxin2iQ8e/0hoxy/iy26QoyhSYD9ltPddw/z8KWYj71x/YYse9HLOPCEFGGkCYl xo/UQ76FQV8gx+vHdgsaRp5NrzqMc1Yt4he3/H81VfBuDj6q5Ku9xzaRaezcSQpu/6+cai QcM+2Be45WZedWXMy2HYtvm4jQgWfrg= From: Michael Walle To: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Jiri Slaby , Peng Fan , Yuan Yao , Vabhav Sharma , Michael Walle Subject: [PATCH 3/7] tty: serial: fsl_lpuart: handle EPROBE_DEFER for DMA Date: Thu, 20 Feb 2020 18:43:30 +0100 Message-Id: <20200220174334.23322-3-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200220174334.23322-1-michael@walle.cc> References: <20200220174334.23322-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Rspamd-Server: web X-Rspamd-Queue-Id: DB1F523E25 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; NEURAL_SPAM(0.00)[0.482]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:12941, ipnet:213.135.0.0/19, country:DE]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DMA channel might not be available at the first probe time. This is esp. the case if the DMA controller has an IOMMU mapping. Use the new dma_request_chan() API and handle EPROBE_DEFER errors. Also reorder the code a bit, so that we don't prepare the whole UART just to determine that the DMA channel is not ready yet and we have to undo all the stuff. Try to map the DMA channels earlier. Signed-off-by: Michael Walle --- drivers/tty/serial/fsl_lpuart.c | 35 +++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index c31b8f3db6bf..fd9f60d0817a 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -2416,6 +2416,7 @@ static int lpuart_probe(struct platform_device *pdev) const struct lpuart_soc_data *sdata = of_id->data; struct device_node *np = pdev->dev.of_node; struct lpuart_port *sport; + struct dma_chan *dma_chan; struct resource *res; int ret; @@ -2483,6 +2484,26 @@ static int lpuart_probe(struct platform_device *pdev) } sport->port.line = ret; + dma_chan = dma_request_chan(sport->port.dev, "tx"); + if (PTR_ERR(dma_chan) == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto failed_request_tx_dma; + } else if (IS_ERR(dma_chan)) + dev_info(sport->port.dev, "DMA tx channel request failed, " + "operating without tx DMA\n"); + else + sport->dma_tx_chan = dma_chan; + + dma_chan = dma_request_chan(sport->port.dev, "rx"); + if (PTR_ERR(dma_chan) == -EPROBE_DEFER) { + ret = -EPROBE_DEFER; + goto failed_request_rx_dma; + } else if (IS_ERR(dma_chan)) + dev_info(sport->port.dev, "DMA rx channel request failed, " + "operating without rx DMA\n"); + else + sport->dma_rx_chan = dma_chan; + ret = lpuart_enable_clks(sport); if (ret) goto failed_clock_enable; @@ -2520,22 +2541,16 @@ static int lpuart_probe(struct platform_device *pdev) sport->port.rs485_config(&sport->port, &sport->port.rs485); - sport->dma_tx_chan = dma_request_slave_channel(sport->port.dev, "tx"); - if (!sport->dma_tx_chan) - dev_info(sport->port.dev, "DMA tx channel request failed, " - "operating without tx DMA\n"); - - sport->dma_rx_chan = dma_request_slave_channel(sport->port.dev, "rx"); - if (!sport->dma_rx_chan) - dev_info(sport->port.dev, "DMA rx channel request failed, " - "operating without rx DMA\n"); - return 0; failed_attach_port: failed_irq_request: lpuart_disable_clks(sport); failed_clock_enable: + dma_release_channel(sport->dma_rx_chan); +failed_request_rx_dma: + dma_release_channel(sport->dma_tx_chan); +failed_request_tx_dma: failed_out_of_range: if (sport->id_allocated) ida_simple_remove(&fsl_lpuart_ida, sport->port.line); From patchwork Thu Feb 20 17:43:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 204527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E446FC11D0C for ; Thu, 20 Feb 2020 17:44:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C126C24672 for ; Thu, 20 Feb 2020 17:44:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="T+MV55xi" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728845AbgBTRoM (ORCPT ); Thu, 20 Feb 2020 12:44:12 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:37403 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728480AbgBTRny (ORCPT ); Thu, 20 Feb 2020 12:43:54 -0500 Received: from mwalle01.sab.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2C12C23E26; Thu, 20 Feb 2020 18:43:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1582220632; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7epvypZ2s71nMBOYV3M0piGfVsKm24bt5XMXPEjLATY=; b=T+MV55xiIVtgkb5Zp4p6ytqZjIdTmvRshMCCt5uEjlJU13eIdvTf4s1010/blXmGevtPwK GcluCELILtU+ZUrHOGkMaYygFby5KsEXRN4rufgFIdYdhVmj7nlBW63Tgr42QLEpemja5e Nob3ovTufF9pLtg3iIsZ9LyciUy5cvQ= From: Michael Walle To: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Jiri Slaby , Peng Fan , Yuan Yao , Vabhav Sharma , Michael Walle Subject: [PATCH 4/7] dt-bindings: serial: lpuart: add ls1028a compatibility Date: Thu, 20 Feb 2020 18:43:31 +0100 Message-Id: <20200220174334.23322-4-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200220174334.23322-1-michael@walle.cc> References: <20200220174334.23322-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Rspamd-Server: web X-Rspamd-Queue-Id: 2C12C23E26 X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; NEURAL_SPAM(0.00)[0.468]; DKIM_SIGNED(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:12941, ipnet:213.135.0.0/19, country:DE]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Signed-off-by: Michael Walle --- .../devicetree/bindings/serial/fsl-lpuart.txt | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt index c904e2e68332..e7448b92dd9d 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt @@ -6,6 +6,8 @@ Required properties: on Vybrid vf610 SoC with 8-bit register organization - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated on LS1021A SoC with 32-bit big-endian register organization + - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated + on LS1028A SoC with 32-bit little-endian register organization - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated on i.MX7ULP SoC with 32-bit little-endian register organization - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated @@ -15,10 +17,10 @@ Required properties: - reg : Address and length of the register set for the device - interrupts : Should contain uart interrupt - clocks : phandle + clock specifier pairs, one for each entry in clock-names -- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud - clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access - lpuart controller registers, it also requires "baud" clock for module to - receive/transmit data. +- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart + bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used + to access lpuart controller registers, it also requires "baud" clock for + module to receive/transmit data. Optional properties: - dmas: A list of two dma specifiers, one for each entry in dma-names. From patchwork Thu Feb 20 17:43:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 204528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BCDFC11D15 for ; Thu, 20 Feb 2020 17:44:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 39396208E4 for ; Thu, 20 Feb 2020 17:44:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=walle.cc header.i=@walle.cc header.b="Acfzjqav" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728856AbgBTRoC (ORCPT ); Thu, 20 Feb 2020 12:44:02 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:50901 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728354AbgBTRn6 (ORCPT ); Thu, 20 Feb 2020 12:43:58 -0500 Received: from mwalle01.sab.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 9890223E5E; Thu, 20 Feb 2020 18:43:54 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1582220634; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Vo4eabfDiU5MAlK7m5sK1wPAUvsnHzowKf/DJBK9M+Q=; b=AcfzjqavTlY6+PDzgIl2PH9++YzTtNvI3obaIk7y6bg/0SCZpTTI0yJfIqplpKvAqSBqr9 lDAoNusvzqMO12HEisI3ByCqYQbi9dmBaFr6U5QKBZfxS26+/eSF/HjoVpPADVYtk2jdlk os2A33Bej4vBjTfCEchEqqnCAWZwVaI= From: Michael Walle To: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Jiri Slaby , Peng Fan , Yuan Yao , Vabhav Sharma , Michael Walle Subject: [PATCH 7/7] arm64: dts: ls1028a: add missing LPUART nodes Date: Thu, 20 Feb 2020 18:43:34 +0100 Message-Id: <20200220174334.23322-7-michael@walle.cc> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200220174334.23322-1-michael@walle.cc> References: <20200220174334.23322-1-michael@walle.cc> MIME-Version: 1.0 X-Spamd-Bar: ++++++ X-Rspamd-Server: web X-Rspamd-Queue-Id: 9890223E5E X-Spamd-Result: default: False [6.40 / 15.00]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_MISSING_CHARSET(2.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; TAGGED_RCPT(0.00)[dt]; MIME_GOOD(-0.10)[text/plain]; BROKEN_CONTENT_TYPE(1.50)[]; NEURAL_SPAM(0.00)[0.487]; DKIM_SIGNED(0.00)[]; DBL_PROHIBIT(0.00)[0.34.241.80:email,0.34.124.32:email,0.34.202.64:email,0.34.163.48:email]; RCPT_COUNT_TWELVE(0.00)[14]; MID_CONTAINS_FROM(1.00)[]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; ASN(0.00)[asn:12941, ipnet:213.135.0.0/19, country:DE]; SUSPICIOUS_RECIPS(1.50)[] X-Spam: Yes Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The LS1028A has six LPUART controllers. Add the nodes. This was tested on a custom board. Signed-off-by: Michael Walle --- .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 40d82c49b174..f30ffc46063d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -390,6 +390,61 @@ status = "disabled"; }; + + lpuart0: serial@2260000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x2260000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart1: serial@2270000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x2270000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart2: serial@2280000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x2280000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart3: serial@2290000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x2290000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart4: serial@22a0000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x22a0000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + + lpuart5: serial@22b0000 { + compatible = "fsl,ls1028a-lpuart"; + reg = <0x0 0x22b0000 0x0 0x1000>; + interrupts = ; + clocks = <&clockgen 4 1>; + clock-names = "ipg"; + status = "disabled"; + }; + edma0: dma-controller@22c0000 { #dma-cells = <2>; compatible = "fsl,ls1028a-edma";