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[209.132.180.67]) by mx.google.com with ESMTP id d12si2392623pgn.181.2017.08.24.00.22.10; Thu, 24 Aug 2017 00:22:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=ERb/R3cm; dkim=pass header.i=@codeaurora.org header.s=default header.b=kvA4EMDU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751390AbdHXHWI (ORCPT + 26 others); Thu, 24 Aug 2017 03:22:08 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59046 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751135AbdHXHWC (ORCPT ); Thu, 24 Aug 2017 03:22:02 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id B6946606B7; Thu, 24 Aug 2017 07:22:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559321; bh=HhK2TVn1f7DytJ21Te0V8wQY3DJn6kppo1mI50bDlOM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ERb/R3cmIugajniWNbEZBfpmllnIBvYO9uClELiFMxlHDJIWIQEBcNAt5zVeUNjnS GL+JVkotyoPnyQpIkpGVR+OhNd6Uh3+XbQcHExBDtk1AzyLoWUi4BAyB9M86xJrsAl OUussRCTszPmQx/NONmO0o22jdkKjE8dTbgwocGM= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from srichara-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 09734606B7; Thu, 24 Aug 2017 07:21:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559319; bh=HhK2TVn1f7DytJ21Te0V8wQY3DJn6kppo1mI50bDlOM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kvA4EMDUNIFMp9pE8/d+z59iW4oV+ymulzp0vEl3Pyv8B+veoYXuFVfW2R6G6n7fd CKtoN1mNfDdmsur4mpaz4V9TmEMEicnmlvS+U4ANhwWhgOlZlfJ4rNCPhEeujkWYqL dkfbsdaF1mWbvScpUjk2eAQAEYRdJo3cVtidJy/M= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 09734606B7 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: ohad@wizery.com, bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sricharan@codeaurora.org Subject: [PATCH v2 01/20] rpmsg: glink: Rename glink_rpm_xx functions to qcom_glink_xx Date: Thu, 24 Aug 2017 12:51:23 +0530 Message-Id: <1503559302-3744-2-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> References: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bjorn Andersson Renaming the glink_rpm_xx functions and structs to qcom_glink_xx equivalents helps to reuse the core glink protocol while adding support for smem based glink transport in the later patches. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/qcom_glink_rpm.c | 248 +++++++++++++++++++++-------------------- 1 file changed, 128 insertions(+), 120 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation diff --git a/drivers/rpmsg/qcom_glink_rpm.c b/drivers/rpmsg/qcom_glink_rpm.c index 3559a3e..56a0a66 100644 --- a/drivers/rpmsg/qcom_glink_rpm.c +++ b/drivers/rpmsg/qcom_glink_rpm.c @@ -101,7 +101,7 @@ struct glink_defer_cmd { * @lcids: idr of all channels with a known local channel id * @rcids: idr of all channels with a known remote channel id */ -struct glink_rpm { +struct qcom_glink { struct device *dev; struct mbox_client mbox_client; @@ -134,7 +134,7 @@ enum { * struct glink_channel - internal representation of a channel * @rpdev: rpdev reference, only used for primary endpoints * @ept: rpmsg endpoint this channel is associated with - * @glink: glink_rpm context handle + * @glink: qcom_glink context handle * @refcount: refcount for the channel object * @recv_lock: guard for @ept.cb * @name: unique channel name/identifier @@ -150,7 +150,7 @@ struct glink_channel { struct rpmsg_endpoint ept; struct rpmsg_device *rpdev; - struct glink_rpm *glink; + struct qcom_glink *glink; struct kref refcount; @@ -184,8 +184,8 @@ struct glink_channel { #define GLINK_FEATURE_INTENTLESS BIT(1) -static struct glink_channel *glink_rpm_alloc_channel(struct glink_rpm *glink, - const char *name) +static struct glink_channel *qcom_glink_alloc_channel(struct qcom_glink *glink, + const char *name) { struct glink_channel *channel; @@ -206,7 +206,7 @@ static struct glink_channel *glink_rpm_alloc_channel(struct glink_rpm *glink, return channel; } -static void glink_rpm_channel_release(struct kref *ref) +static void qcom_glink_channel_release(struct kref *ref) { struct glink_channel *channel = container_of(ref, struct glink_channel, refcount); @@ -215,7 +215,7 @@ static void glink_rpm_channel_release(struct kref *ref) kfree(channel); } -static size_t glink_rpm_rx_avail(struct glink_rpm *glink) +static size_t qcom_glink_rx_avail(struct qcom_glink *glink) { struct glink_rpm_pipe *pipe = &glink->rx_pipe; unsigned int head; @@ -230,8 +230,8 @@ static size_t glink_rpm_rx_avail(struct glink_rpm *glink) return head - tail; } -static void glink_rpm_rx_peak(struct glink_rpm *glink, - void *data, size_t count) +static void qcom_glink_rx_peak(struct qcom_glink *glink, + void *data, size_t count) { struct glink_rpm_pipe *pipe = &glink->rx_pipe; unsigned int tail; @@ -251,8 +251,8 @@ static void glink_rpm_rx_peak(struct glink_rpm *glink, } } -static void glink_rpm_rx_advance(struct glink_rpm *glink, - size_t count) +static void qcom_glink_rx_advance(struct qcom_glink *glink, + size_t count) { struct glink_rpm_pipe *pipe = &glink->rx_pipe; unsigned int tail; @@ -266,7 +266,7 @@ static void glink_rpm_rx_advance(struct glink_rpm *glink, writel(tail, pipe->tail); } -static size_t glink_rpm_tx_avail(struct glink_rpm *glink) +static size_t qcom_glink_tx_avail(struct qcom_glink *glink) { struct glink_rpm_pipe *pipe = &glink->tx_pipe; unsigned int head; @@ -281,9 +281,9 @@ static size_t glink_rpm_tx_avail(struct glink_rpm *glink) return tail - head; } -static unsigned int glink_rpm_tx_write(struct glink_rpm *glink, - unsigned int head, - const void *data, size_t count) +static unsigned int qcom_glink_tx_write(struct qcom_glink *glink, + unsigned int head, + const void *data, size_t count) { struct glink_rpm_pipe *pipe = &glink->tx_pipe; size_t len; @@ -306,8 +306,8 @@ static unsigned int glink_rpm_tx_write(struct glink_rpm *glink, return head; } -static int glink_rpm_tx(struct glink_rpm *glink, - const void *hdr, size_t hlen, +static int qcom_glink_tx(struct qcom_glink *glink, + const void *hdr, size_t hlen, const void *data, size_t dlen, bool wait) { struct glink_rpm_pipe *pipe = &glink->tx_pipe; @@ -326,7 +326,7 @@ static int glink_rpm_tx(struct glink_rpm *glink, if (ret) return ret; - while (glink_rpm_tx_avail(glink) < tlen) { + while (qcom_glink_tx_avail(glink) < tlen) { if (!wait) { ret = -ENOMEM; goto out; @@ -336,8 +336,8 @@ static int glink_rpm_tx(struct glink_rpm *glink, } head = readl(pipe->head); - head = glink_rpm_tx_write(glink, head, hdr, hlen); - head = glink_rpm_tx_write(glink, head, data, dlen); + head = qcom_glink_tx_write(glink, head, hdr, hlen); + head = qcom_glink_tx_write(glink, head, data, dlen); writel(head, pipe->head); mbox_send_message(glink->mbox_chan, NULL); @@ -349,7 +349,7 @@ static int glink_rpm_tx(struct glink_rpm *glink, return ret; } -static int glink_rpm_send_version(struct glink_rpm *glink) +static int qcom_glink_send_version(struct qcom_glink *glink) { struct glink_msg msg; @@ -357,10 +357,10 @@ static int glink_rpm_send_version(struct glink_rpm *glink) msg.param1 = cpu_to_le16(1); msg.param2 = cpu_to_le32(GLINK_FEATURE_INTENTLESS); - return glink_rpm_tx(glink, &msg, sizeof(msg), NULL, 0, true); + return qcom_glink_tx(glink, &msg, sizeof(msg), NULL, 0, true); } -static void glink_rpm_send_version_ack(struct glink_rpm *glink) +static void qcom_glink_send_version_ack(struct qcom_glink *glink) { struct glink_msg msg; @@ -368,11 +368,11 @@ static void glink_rpm_send_version_ack(struct glink_rpm *glink) msg.param1 = cpu_to_le16(1); msg.param2 = cpu_to_le32(0); - glink_rpm_tx(glink, &msg, sizeof(msg), NULL, 0, true); + qcom_glink_tx(glink, &msg, sizeof(msg), NULL, 0, true); } -static void glink_rpm_send_open_ack(struct glink_rpm *glink, - struct glink_channel *channel) +static void qcom_glink_send_open_ack(struct qcom_glink *glink, + struct glink_channel *channel) { struct glink_msg msg; @@ -380,11 +380,11 @@ static void glink_rpm_send_open_ack(struct glink_rpm *glink, msg.param1 = cpu_to_le16(channel->rcid); msg.param2 = cpu_to_le32(0); - glink_rpm_tx(glink, &msg, sizeof(msg), NULL, 0, true); + qcom_glink_tx(glink, &msg, sizeof(msg), NULL, 0, true); } /** - * glink_rpm_send_open_req() - send a RPM_CMD_OPEN request to the remote + * qcom_glink_send_open_req() - send a RPM_CMD_OPEN request to the remote * @glink: * @channel: * @@ -393,8 +393,8 @@ static void glink_rpm_send_open_ack(struct glink_rpm *glink, * * Returns 0 on success, negative errno otherwise. */ -static int glink_rpm_send_open_req(struct glink_rpm *glink, - struct glink_channel *channel) +static int qcom_glink_send_open_req(struct qcom_glink *glink, + struct glink_channel *channel) { struct { struct glink_msg msg; @@ -420,7 +420,7 @@ static int glink_rpm_send_open_req(struct glink_rpm *glink, req.msg.param2 = cpu_to_le32(name_len); strcpy(req.name, channel->name); - ret = glink_rpm_tx(glink, &req, req_len, NULL, 0, true); + ret = qcom_glink_tx(glink, &req, req_len, NULL, 0, true); if (ret) goto remove_idr; @@ -435,8 +435,8 @@ static int glink_rpm_send_open_req(struct glink_rpm *glink, return ret; } -static void glink_rpm_send_close_req(struct glink_rpm *glink, - struct glink_channel *channel) +static void qcom_glink_send_close_req(struct qcom_glink *glink, + struct glink_channel *channel) { struct glink_msg req; @@ -444,10 +444,11 @@ static void glink_rpm_send_close_req(struct glink_rpm *glink, req.param1 = cpu_to_le16(channel->lcid); req.param2 = 0; - glink_rpm_tx(glink, &req, sizeof(req), NULL, 0, true); + qcom_glink_tx(glink, &req, sizeof(req), NULL, 0, true); } -static void glink_rpm_send_close_ack(struct glink_rpm *glink, unsigned int rcid) +static void qcom_glink_send_close_ack(struct qcom_glink *glink, + unsigned int rcid) { struct glink_msg req; @@ -455,16 +456,16 @@ static void glink_rpm_send_close_ack(struct glink_rpm *glink, unsigned int rcid) req.param1 = cpu_to_le16(rcid); req.param2 = 0; - glink_rpm_tx(glink, &req, sizeof(req), NULL, 0, true); + qcom_glink_tx(glink, &req, sizeof(req), NULL, 0, true); } -static int glink_rpm_rx_defer(struct glink_rpm *glink, size_t extra) +static int qcom_glink_rx_defer(struct qcom_glink *glink, size_t extra) { struct glink_defer_cmd *dcmd; extra = ALIGN(extra, 8); - if (glink_rpm_rx_avail(glink) < sizeof(struct glink_msg) + extra) { + if (qcom_glink_rx_avail(glink) < sizeof(struct glink_msg) + extra) { dev_dbg(glink->dev, "Insufficient data in rx fifo"); return -ENXIO; } @@ -475,19 +476,19 @@ static int glink_rpm_rx_defer(struct glink_rpm *glink, size_t extra) INIT_LIST_HEAD(&dcmd->node); - glink_rpm_rx_peak(glink, &dcmd->msg, sizeof(dcmd->msg) + extra); + qcom_glink_rx_peak(glink, &dcmd->msg, sizeof(dcmd->msg) + extra); spin_lock(&glink->rx_lock); list_add_tail(&dcmd->node, &glink->rx_queue); spin_unlock(&glink->rx_lock); schedule_work(&glink->rx_work); - glink_rpm_rx_advance(glink, sizeof(dcmd->msg) + extra); + qcom_glink_rx_advance(glink, sizeof(dcmd->msg) + extra); return 0; } -static int glink_rpm_rx_data(struct glink_rpm *glink, size_t avail) +static int qcom_glink_rx_data(struct qcom_glink *glink, size_t avail) { struct glink_channel *channel; struct { @@ -504,7 +505,7 @@ static int glink_rpm_rx_data(struct glink_rpm *glink, size_t avail) return -EAGAIN; } - glink_rpm_rx_peak(glink, &hdr, sizeof(hdr)); + qcom_glink_rx_peak(glink, &hdr, sizeof(hdr)); chunk_size = le32_to_cpu(hdr.chunk_size); left_size = le32_to_cpu(hdr.left_size); @@ -522,7 +523,8 @@ static int glink_rpm_rx_data(struct glink_rpm *glink, size_t avail) dev_dbg(glink->dev, "Data on non-existing channel\n"); /* Drop the message */ - glink_rpm_rx_advance(glink, ALIGN(sizeof(hdr) + chunk_size, 8)); + qcom_glink_rx_advance(glink, + ALIGN(sizeof(hdr) + chunk_size, 8)); return 0; } @@ -536,17 +538,18 @@ static int glink_rpm_rx_data(struct glink_rpm *glink, size_t avail) channel->buf_offset = 0; } - glink_rpm_rx_advance(glink, sizeof(hdr)); + qcom_glink_rx_advance(glink, sizeof(hdr)); if (channel->buf_size - channel->buf_offset < chunk_size) { dev_err(glink->dev, "Insufficient space in input buffer\n"); /* The packet header lied, drop payload */ - glink_rpm_rx_advance(glink, chunk_size); + qcom_glink_rx_advance(glink, chunk_size); return -ENOMEM; } - glink_rpm_rx_peak(glink, channel->buf + channel->buf_offset, chunk_size); + qcom_glink_rx_peak(glink, channel->buf + channel->buf_offset, + chunk_size); channel->buf_offset += chunk_size; /* Handle message when no fragments remain to be received */ @@ -567,12 +570,12 @@ static int glink_rpm_rx_data(struct glink_rpm *glink, size_t avail) } /* Each message starts at 8 byte aligned address */ - glink_rpm_rx_advance(glink, ALIGN(chunk_size, 8)); + qcom_glink_rx_advance(glink, ALIGN(chunk_size, 8)); return 0; } -static int glink_rpm_rx_open_ack(struct glink_rpm *glink, unsigned int lcid) +static int qcom_glink_rx_open_ack(struct qcom_glink *glink, unsigned int lcid) { struct glink_channel *channel; @@ -587,9 +590,9 @@ static int glink_rpm_rx_open_ack(struct glink_rpm *glink, unsigned int lcid) return 0; } -static irqreturn_t glink_rpm_intr(int irq, void *data) +static irqreturn_t qcom_glink_intr(int irq, void *data) { - struct glink_rpm *glink = data; + struct qcom_glink *glink = data; struct glink_msg msg; unsigned int param1; unsigned int param2; @@ -598,11 +601,11 @@ static irqreturn_t glink_rpm_intr(int irq, void *data) int ret; for (;;) { - avail = glink_rpm_rx_avail(glink); + avail = qcom_glink_rx_avail(glink); if (avail < sizeof(msg)) break; - glink_rpm_rx_peak(glink, &msg, sizeof(msg)); + qcom_glink_rx_peak(glink, &msg, sizeof(msg)); cmd = le16_to_cpu(msg.cmd); param1 = le16_to_cpu(msg.param1); @@ -613,21 +616,21 @@ static irqreturn_t glink_rpm_intr(int irq, void *data) case RPM_CMD_VERSION_ACK: case RPM_CMD_CLOSE: case RPM_CMD_CLOSE_ACK: - ret = glink_rpm_rx_defer(glink, 0); + ret = qcom_glink_rx_defer(glink, 0); break; case RPM_CMD_OPEN_ACK: - ret = glink_rpm_rx_open_ack(glink, param1); - glink_rpm_rx_advance(glink, ALIGN(sizeof(msg), 8)); + ret = qcom_glink_rx_open_ack(glink, param1); + qcom_glink_rx_advance(glink, ALIGN(sizeof(msg), 8)); break; case RPM_CMD_OPEN: - ret = glink_rpm_rx_defer(glink, param2); + ret = qcom_glink_rx_defer(glink, param2); break; case RPM_CMD_TX_DATA: case RPM_CMD_TX_DATA_CONT: - ret = glink_rpm_rx_data(glink, avail); + ret = qcom_glink_rx_data(glink, avail); break; case RPM_CMD_READ_NOTIF: - glink_rpm_rx_advance(glink, ALIGN(sizeof(msg), 8)); + qcom_glink_rx_advance(glink, ALIGN(sizeof(msg), 8)); mbox_send_message(glink->mbox_chan, NULL); mbox_client_txdone(glink->mbox_chan, 0); @@ -648,17 +651,17 @@ static irqreturn_t glink_rpm_intr(int irq, void *data) } /* Locally initiated rpmsg_create_ept */ -static struct glink_channel *glink_rpm_create_local(struct glink_rpm *glink, - const char *name) +static struct glink_channel *qcom_glink_create_local(struct qcom_glink *glink, + const char *name) { struct glink_channel *channel; int ret; - channel = glink_rpm_alloc_channel(glink, name); + channel = qcom_glink_alloc_channel(glink, name); if (IS_ERR(channel)) return ERR_CAST(channel); - ret = glink_rpm_send_open_req(glink, channel); + ret = qcom_glink_send_open_req(glink, channel); if (ret) goto release_channel; @@ -670,34 +673,34 @@ static struct glink_channel *glink_rpm_create_local(struct glink_rpm *glink, if (!ret) goto err_timeout; - glink_rpm_send_open_ack(glink, channel); + qcom_glink_send_open_ack(glink, channel); return channel; err_timeout: - /* glink_rpm_send_open_req() did register the channel in lcids*/ + /* qcom_glink_send_open_req() did register the channel in lcids*/ mutex_lock(&glink->idr_lock); idr_remove(&glink->lcids, channel->lcid); mutex_unlock(&glink->idr_lock); release_channel: - /* Release glink_rpm_send_open_req() reference */ - kref_put(&channel->refcount, glink_rpm_channel_release); - /* Release glink_rpm_alloc_channel() reference */ - kref_put(&channel->refcount, glink_rpm_channel_release); + /* Release qcom_glink_send_open_req() reference */ + kref_put(&channel->refcount, qcom_glink_channel_release); + /* Release qcom_glink_alloc_channel() reference */ + kref_put(&channel->refcount, qcom_glink_channel_release); return ERR_PTR(-ETIMEDOUT); } /* Remote initiated rpmsg_create_ept */ -static int glink_rpm_create_remote(struct glink_rpm *glink, - struct glink_channel *channel) +static int qcom_glink_create_remote(struct qcom_glink *glink, + struct glink_channel *channel) { int ret; - glink_rpm_send_open_ack(glink, channel); + qcom_glink_send_open_ack(glink, channel); - ret = glink_rpm_send_open_req(glink, channel); + ret = qcom_glink_send_open_req(glink, channel); if (ret) goto close_link; @@ -714,21 +717,23 @@ static int glink_rpm_create_remote(struct glink_rpm *glink, * Send a close request to "undo" our open-ack. The close-ack will * release the last reference. */ - glink_rpm_send_close_req(glink, channel); + qcom_glink_send_close_req(glink, channel); - /* Release glink_rpm_send_open_req() reference */ - kref_put(&channel->refcount, glink_rpm_channel_release); + /* Release qcom_glink_send_open_req() reference */ + kref_put(&channel->refcount, qcom_glink_channel_release); return ret; } -static struct rpmsg_endpoint *glink_rpm_create_ept(struct rpmsg_device *rpdev, - rpmsg_rx_cb_t cb, void *priv, - struct rpmsg_channel_info chinfo) +static struct rpmsg_endpoint *qcom_glink_create_ept(struct rpmsg_device *rpdev, + rpmsg_rx_cb_t cb, + void *priv, + struct rpmsg_channel_info + chinfo) { struct glink_channel *parent = to_glink_channel(rpdev->ept); struct glink_channel *channel; - struct glink_rpm *glink = parent->glink; + struct qcom_glink *glink = parent->glink; struct rpmsg_endpoint *ept; const char *name = chinfo.name; int cid; @@ -740,11 +745,11 @@ static struct rpmsg_endpoint *glink_rpm_create_ept(struct rpmsg_device *rpdev, } if (!channel) { - channel = glink_rpm_create_local(glink, name); + channel = qcom_glink_create_local(glink, name); if (IS_ERR(channel)) return NULL; } else { - ret = glink_rpm_create_remote(glink, channel); + ret = qcom_glink_create_remote(glink, channel); if (ret) return NULL; } @@ -758,10 +763,10 @@ static struct rpmsg_endpoint *glink_rpm_create_ept(struct rpmsg_device *rpdev, return ept; } -static void glink_rpm_destroy_ept(struct rpmsg_endpoint *ept) +static void qcom_glink_destroy_ept(struct rpmsg_endpoint *ept) { struct glink_channel *channel = to_glink_channel(ept); - struct glink_rpm *glink = channel->glink; + struct qcom_glink *glink = channel->glink; unsigned long flags; spin_lock_irqsave(&channel->recv_lock, flags); @@ -771,13 +776,13 @@ static void glink_rpm_destroy_ept(struct rpmsg_endpoint *ept) /* Decouple the potential rpdev from the channel */ channel->rpdev = NULL; - glink_rpm_send_close_req(glink, channel); + qcom_glink_send_close_req(glink, channel); } -static int __glink_rpm_send(struct glink_channel *channel, +static int __qcom_glink_send(struct glink_channel *channel, void *data, int len, bool wait) { - struct glink_rpm *glink = channel->glink; + struct qcom_glink *glink = channel->glink; struct { struct glink_msg msg; __le32 chunk_size; @@ -793,27 +798,27 @@ static int __glink_rpm_send(struct glink_channel *channel, req.chunk_size = cpu_to_le32(len); req.left_size = cpu_to_le32(0); - return glink_rpm_tx(glink, &req, sizeof(req), data, len, wait); + return qcom_glink_tx(glink, &req, sizeof(req), data, len, wait); } -static int glink_rpm_send(struct rpmsg_endpoint *ept, void *data, int len) +static int qcom_glink_send(struct rpmsg_endpoint *ept, void *data, int len) { struct glink_channel *channel = to_glink_channel(ept); - return __glink_rpm_send(channel, data, len, true); + return __qcom_glink_send(channel, data, len, true); } -static int glink_rpm_trysend(struct rpmsg_endpoint *ept, void *data, int len) +static int qcom_glink_trysend(struct rpmsg_endpoint *ept, void *data, int len) { struct glink_channel *channel = to_glink_channel(ept); - return __glink_rpm_send(channel, data, len, false); + return __qcom_glink_send(channel, data, len, false); } /* * Finds the device_node for the glink child interested in this channel. */ -static struct device_node *glink_rpm_match_channel(struct device_node *node, +static struct device_node *qcom_glink_match_channel(struct device_node *node, const char *channel) { struct device_node *child; @@ -835,16 +840,16 @@ static struct device_node *glink_rpm_match_channel(struct device_node *node, } static const struct rpmsg_device_ops glink_device_ops = { - .create_ept = glink_rpm_create_ept, + .create_ept = qcom_glink_create_ept, }; static const struct rpmsg_endpoint_ops glink_endpoint_ops = { - .destroy_ept = glink_rpm_destroy_ept, - .send = glink_rpm_send, - .trysend = glink_rpm_trysend, + .destroy_ept = qcom_glink_destroy_ept, + .send = qcom_glink_send, + .trysend = qcom_glink_trysend, }; -static void glink_rpm_rpdev_release(struct device *dev) +static void qcom_glink_rpdev_release(struct device *dev) { struct rpmsg_device *rpdev = to_rpmsg_device(dev); struct glink_channel *channel = to_glink_channel(rpdev->ept); @@ -853,14 +858,15 @@ static void glink_rpm_rpdev_release(struct device *dev) kfree(rpdev); } -static int glink_rpm_rx_open(struct glink_rpm *glink, unsigned int rcid, - char *name) +static int qcom_glink_rx_open(struct qcom_glink *glink, unsigned int rcid, + char *name) { struct glink_channel *channel; struct rpmsg_device *rpdev; bool create_device = false; int lcid; int ret; + struct device_node *node; idr_for_each_entry(&glink->lcids, channel, lcid) { if (!strcmp(channel->name, name)) @@ -868,7 +874,7 @@ static int glink_rpm_rx_open(struct glink_rpm *glink, unsigned int rcid, } if (!channel) { - channel = glink_rpm_alloc_channel(glink, name); + channel = qcom_glink_alloc_channel(glink, name); if (IS_ERR(channel)) return PTR_ERR(channel); @@ -901,9 +907,10 @@ static int glink_rpm_rx_open(struct glink_rpm *glink, unsigned int rcid, rpdev->dst = RPMSG_ADDR_ANY; rpdev->ops = &glink_device_ops; - rpdev->dev.of_node = glink_rpm_match_channel(glink->dev->of_node, name); + node = qcom_glink_match_channel(glink->dev->of_node, name); + rpdev->dev.of_node = node; rpdev->dev.parent = glink->dev; - rpdev->dev.release = glink_rpm_rpdev_release; + rpdev->dev.release = qcom_glink_rpdev_release; ret = rpmsg_register_device(rpdev); if (ret) @@ -924,12 +931,12 @@ static int glink_rpm_rx_open(struct glink_rpm *glink, unsigned int rcid, free_channel: /* Release the reference, iff we took it */ if (create_device) - kref_put(&channel->refcount, glink_rpm_channel_release); + kref_put(&channel->refcount, qcom_glink_channel_release); return ret; } -static void glink_rpm_rx_close(struct glink_rpm *glink, unsigned int rcid) +static void qcom_glink_rx_close(struct qcom_glink *glink, unsigned int rcid) { struct rpmsg_channel_info chinfo; struct glink_channel *channel; @@ -946,17 +953,17 @@ static void glink_rpm_rx_close(struct glink_rpm *glink, unsigned int rcid) rpmsg_unregister_device(glink->dev, &chinfo); } - glink_rpm_send_close_ack(glink, channel->rcid); + qcom_glink_send_close_ack(glink, channel->rcid); mutex_lock(&glink->idr_lock); idr_remove(&glink->rcids, channel->rcid); channel->rcid = 0; mutex_unlock(&glink->idr_lock); - kref_put(&channel->refcount, glink_rpm_channel_release); + kref_put(&channel->refcount, qcom_glink_channel_release); } -static void glink_rpm_rx_close_ack(struct glink_rpm *glink, unsigned int lcid) +static void qcom_glink_rx_close_ack(struct qcom_glink *glink, unsigned int lcid) { struct glink_channel *channel; @@ -969,12 +976,13 @@ static void glink_rpm_rx_close_ack(struct glink_rpm *glink, unsigned int lcid) channel->lcid = 0; mutex_unlock(&glink->idr_lock); - kref_put(&channel->refcount, glink_rpm_channel_release); + kref_put(&channel->refcount, qcom_glink_channel_release); } -static void glink_rpm_work(struct work_struct *work) +static void qcom_glink_work(struct work_struct *work) { - struct glink_rpm *glink = container_of(work, struct glink_rpm, rx_work); + struct qcom_glink *glink = container_of(work, struct qcom_glink, + rx_work); struct glink_defer_cmd *dcmd; struct glink_msg *msg; unsigned long flags; @@ -999,18 +1007,18 @@ static void glink_rpm_work(struct work_struct *work) switch (cmd) { case RPM_CMD_VERSION: - glink_rpm_send_version_ack(glink); + qcom_glink_send_version_ack(glink); break; case RPM_CMD_VERSION_ACK: break; case RPM_CMD_OPEN: - glink_rpm_rx_open(glink, param1, msg->data); + qcom_glink_rx_open(glink, param1, msg->data); break; case RPM_CMD_CLOSE: - glink_rpm_rx_close(glink, param1); + qcom_glink_rx_close(glink, param1); break; case RPM_CMD_CLOSE_ACK: - glink_rpm_rx_close_ack(glink, param1); + qcom_glink_rx_close_ack(glink, param1); break; default: WARN(1, "Unknown defer object %d\n", cmd); @@ -1098,7 +1106,7 @@ static int glink_rpm_parse_toc(struct device *dev, static int glink_rpm_probe(struct platform_device *pdev) { - struct glink_rpm *glink; + struct qcom_glink *glink; struct device_node *np; void __iomem *msg_ram; size_t msg_ram_size; @@ -1116,7 +1124,7 @@ static int glink_rpm_probe(struct platform_device *pdev) mutex_init(&glink->tx_lock); spin_lock_init(&glink->rx_lock); INIT_LIST_HEAD(&glink->rx_queue); - INIT_WORK(&glink->rx_work, glink_rpm_work); + INIT_WORK(&glink->rx_work, qcom_glink_work); mutex_init(&glink->idr_lock); idr_init(&glink->lcids); @@ -1151,7 +1159,7 @@ static int glink_rpm_probe(struct platform_device *pdev) irq = platform_get_irq(pdev, 0); ret = devm_request_irq(dev, irq, - glink_rpm_intr, + qcom_glink_intr, IRQF_NO_SUSPEND | IRQF_SHARED, "glink-rpm", glink); if (ret) { @@ -1161,7 +1169,7 @@ static int glink_rpm_probe(struct platform_device *pdev) glink->irq = irq; - ret = glink_rpm_send_version(glink); + ret = qcom_glink_send_version(glink); if (ret) return ret; @@ -1179,7 +1187,7 @@ static int glink_rpm_remove_device(struct device *dev, void *data) static int glink_rpm_remove(struct platform_device *pdev) { - struct glink_rpm *glink = platform_get_drvdata(pdev); + struct qcom_glink *glink = platform_get_drvdata(pdev); struct glink_channel *channel; int cid; int ret; @@ -1193,7 +1201,7 @@ static int glink_rpm_remove(struct platform_device *pdev) /* Release any defunct local channels, waiting for close-ack */ idr_for_each_entry(&glink->lcids, channel, cid) - kref_put(&channel->refcount, glink_rpm_channel_release); + kref_put(&channel->refcount, qcom_glink_channel_release); idr_destroy(&glink->lcids); idr_destroy(&glink->rcids); From patchwork Thu Aug 24 07:21:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 110872 Delivered-To: patch@linaro.org Received: by 10.37.128.210 with SMTP id c18csp8069722ybm; Thu, 24 Aug 2017 00:26:49 -0700 (PDT) X-Received: by 10.99.110.67 with SMTP id j64mr5453379pgc.341.1503559609848; Thu, 24 Aug 2017 00:26:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503559609; cv=none; d=google.com; s=arc-20160816; b=0bt00sOoJ8z8mQQWbGz9A3leLCIpFYc7ABIsN1/FJwuVu6ArHjDrbK58mshHkuEj72 YCNW0afvSLWyVuzfuzP7NI3OOibocTMhvtkRGN7wZMamGjGrSsykuXaUkhByPjNDC6Gb p9e7t2/tZRhmyGYHS8jNegU0p1KbygCqFxxqERzv5/v+j94GtoWG8mHeixE98krjGtci GkWFBc3njKqnf4N4bnZaebGzBDDsY2eLIPIcE1o0uyf3iIXA3Fslfj1AqCW8iijEdoU7 Xwp8nUz6nlFV5xiDLjmbDfRN2T2VJcSL6lejr8lZCyCvU9XZ011Saqn1hj0f1fMOI3eT cmuQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id y9si2373968pgq.143.2017.08.24.00.26.49; Thu, 24 Aug 2017 00:26:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=be3O5BjL; dkim=pass header.i=@codeaurora.org header.s=default header.b=be3O5BjL; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751345AbdHXHWG (ORCPT + 26 others); Thu, 24 Aug 2017 03:22:06 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59196 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751312AbdHXHWD (ORCPT ); Thu, 24 Aug 2017 03:22:03 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id ADA7260719; Thu, 24 Aug 2017 07:22:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559322; bh=ionvs1+4UUKEVHDrXanCqYHb6+PVFdIraupuSNs6lGo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=be3O5BjLrrKeSOV62Uya94XzwbvzQ4wO4hsQ2f/JC3geFlUhazSLVWz+rA49kOv8r 1XoLk1nb1Migu4HK2a79o1oWEjlWsY+QH5eM/RLpHoKoE3Iva0ppw3nIDdrcbBe5XL VEeu/mR80ILd13uRD1RD54k/IBDQmOi11KNiSWcU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from srichara-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CC1396070A; Thu, 24 Aug 2017 07:21:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559322; bh=ionvs1+4UUKEVHDrXanCqYHb6+PVFdIraupuSNs6lGo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=be3O5BjLrrKeSOV62Uya94XzwbvzQ4wO4hsQ2f/JC3geFlUhazSLVWz+rA49kOv8r 1XoLk1nb1Migu4HK2a79o1oWEjlWsY+QH5eM/RLpHoKoE3Iva0ppw3nIDdrcbBe5XL VEeu/mR80ILd13uRD1RD54k/IBDQmOi11KNiSWcU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org CC1396070A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: ohad@wizery.com, bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sricharan@codeaurora.org Subject: [PATCH v2 02/20] rpmsg: glink: Associate indirections for pipe fifo accessor's Date: Thu, 24 Aug 2017 12:51:24 +0530 Message-Id: <1503559302-3744-3-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> References: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bjorn Andersson With the intention of reusing the glink core protocol commands and code across both rpm and smem based transports, the only thing different is way of accessing the shared-memory of the transport (FIFO). So put the fifo accessor's of the transport's pipe (rx/tx) behind indirections, so that the rest of the code can be shared. For this, have a qcom_glink_pipe that can be used in the common code containing the indirections and wrap it with glink_rpm_pipe that contains the transport specific members. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/qcom_glink_rpm.c | 144 ++++++++++++++++++++++++++++++----------- 1 file changed, 106 insertions(+), 38 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation Acked-by: Arun Kumar Neelakantam diff --git a/drivers/rpmsg/qcom_glink_rpm.c b/drivers/rpmsg/qcom_glink_rpm.c index 56a0a66..870ce32 100644 --- a/drivers/rpmsg/qcom_glink_rpm.c +++ b/drivers/rpmsg/qcom_glink_rpm.c @@ -41,12 +41,28 @@ #define RPM_GLINK_CID_MIN 1 #define RPM_GLINK_CID_MAX 65536 +#define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native) + struct rpm_toc_entry { __le32 id; __le32 offset; __le32 size; } __packed; +struct qcom_glink; + +struct qcom_glink_pipe { + size_t length; + + size_t (*avail)(struct qcom_glink_pipe *glink_pipe); + void (*peak)(struct qcom_glink_pipe *glink_pipe, void *data, + size_t count); + void (*advance)(struct qcom_glink_pipe *glink_pipe, size_t count); + void (*write)(struct qcom_glink_pipe *glink_pipe, + const void *hdr, size_t hlen, + const void *data, size_t dlen); +}; + struct rpm_toc { __le32 magic; __le32 count; @@ -62,12 +78,12 @@ struct glink_msg { } __packed; struct glink_rpm_pipe { + struct qcom_glink_pipe native; + void __iomem *tail; void __iomem *head; void __iomem *fifo; - - size_t length; }; /** @@ -107,8 +123,8 @@ struct qcom_glink { struct mbox_client mbox_client; struct mbox_chan *mbox_chan; - struct glink_rpm_pipe rx_pipe; - struct glink_rpm_pipe tx_pipe; + struct qcom_glink_pipe *rx_pipe; + struct qcom_glink_pipe *tx_pipe; int irq; @@ -215,9 +231,9 @@ static void qcom_glink_channel_release(struct kref *ref) kfree(channel); } -static size_t qcom_glink_rx_avail(struct qcom_glink *glink) +static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe) { - struct glink_rpm_pipe *pipe = &glink->rx_pipe; + struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); unsigned int head; unsigned int tail; @@ -225,21 +241,26 @@ static size_t qcom_glink_rx_avail(struct qcom_glink *glink) tail = readl(pipe->tail); if (head < tail) - return pipe->length - tail + head; + return pipe->native.length - tail + head; else return head - tail; } -static void qcom_glink_rx_peak(struct qcom_glink *glink, - void *data, size_t count) +static size_t qcom_glink_rx_avail(struct qcom_glink *glink) +{ + return glink->rx_pipe->avail(glink->rx_pipe); +} + +static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe, + void *data, size_t count) { - struct glink_rpm_pipe *pipe = &glink->rx_pipe; + struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); unsigned int tail; size_t len; tail = readl(pipe->tail); - len = min_t(size_t, count, pipe->length - tail); + len = min_t(size_t, count, pipe->native.length - tail); if (len) { __ioread32_copy(data, pipe->fifo + tail, len / sizeof(u32)); @@ -251,24 +272,35 @@ static void qcom_glink_rx_peak(struct qcom_glink *glink, } } -static void qcom_glink_rx_advance(struct qcom_glink *glink, - size_t count) +static void qcom_glink_rx_peak(struct qcom_glink *glink, + void *data, size_t count) { - struct glink_rpm_pipe *pipe = &glink->rx_pipe; + glink->rx_pipe->peak(glink->rx_pipe, data, count); +} + +static void glink_rpm_rx_advance(struct qcom_glink_pipe *glink_pipe, + size_t count) +{ + struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); unsigned int tail; tail = readl(pipe->tail); tail += count; - if (tail >= pipe->length) - tail -= pipe->length; + if (tail >= pipe->native.length) + tail -= pipe->native.length; writel(tail, pipe->tail); } -static size_t qcom_glink_tx_avail(struct qcom_glink *glink) +static void qcom_glink_rx_advance(struct qcom_glink *glink, size_t count) +{ + glink->rx_pipe->advance(glink->rx_pipe, count); +} + +static size_t glink_rpm_tx_avail(struct qcom_glink_pipe *glink_pipe) { - struct glink_rpm_pipe *pipe = &glink->tx_pipe; + struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); unsigned int head; unsigned int tail; @@ -276,19 +308,23 @@ static size_t qcom_glink_tx_avail(struct qcom_glink *glink) tail = readl(pipe->tail); if (tail <= head) - return pipe->length - head + tail; + return pipe->native.length - head + tail; else return tail - head; } -static unsigned int qcom_glink_tx_write(struct qcom_glink *glink, - unsigned int head, - const void *data, size_t count) +static size_t qcom_glink_tx_avail(struct qcom_glink *glink) +{ + return glink->tx_pipe->avail(glink->tx_pipe); +} + +static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe, + unsigned int head, + const void *data, size_t count) { - struct glink_rpm_pipe *pipe = &glink->tx_pipe; size_t len; - len = min_t(size_t, count, pipe->length - head); + len = min_t(size_t, count, pipe->native.length - head); if (len) { __iowrite32_copy(pipe->fifo + head, data, len / sizeof(u32)); @@ -300,23 +336,41 @@ static unsigned int qcom_glink_tx_write(struct qcom_glink *glink, } head += count; - if (head >= pipe->length) - head -= pipe->length; + if (head >= pipe->native.length) + head -= pipe->native.length; return head; } +static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe, + const void *hdr, size_t hlen, + const void *data, size_t dlen) +{ + struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); + unsigned int head; + + head = readl(pipe->head); + head = glink_rpm_tx_write_one(pipe, head, hdr, hlen); + head = glink_rpm_tx_write_one(pipe, head, data, dlen); + writel(head, pipe->head); +} + +static void qcom_glink_tx_write(struct qcom_glink *glink, + const void *hdr, size_t hlen, + const void *data, size_t dlen) +{ + glink->tx_pipe->write(glink->tx_pipe, hdr, hlen, data, dlen); +} + static int qcom_glink_tx(struct qcom_glink *glink, const void *hdr, size_t hlen, const void *data, size_t dlen, bool wait) { - struct glink_rpm_pipe *pipe = &glink->tx_pipe; - unsigned int head; unsigned int tlen = hlen + dlen; int ret; /* Reject packets that are too big */ - if (tlen >= glink->tx_pipe.length) + if (tlen >= glink->tx_pipe->length) return -EINVAL; if (WARN(tlen % 8, "Unaligned TX request")) @@ -335,10 +389,7 @@ static int qcom_glink_tx(struct qcom_glink *glink, msleep(10); } - head = readl(pipe->head); - head = qcom_glink_tx_write(glink, head, hdr, hlen); - head = qcom_glink_tx_write(glink, head, data, dlen); - writel(head, pipe->head); + qcom_glink_tx_write(glink, hdr, hlen, data, dlen); mbox_send_message(glink->mbox_chan, NULL); mbox_client_txdone(glink->mbox_chan, 0); @@ -1075,14 +1126,14 @@ static int glink_rpm_parse_toc(struct device *dev, switch (id) { case RPM_RX_FIFO_ID: - rx->length = size; + rx->native.length = size; rx->tail = msg_ram + offset; rx->head = msg_ram + offset + sizeof(u32); rx->fifo = msg_ram + offset + 2 * sizeof(u32); break; case RPM_TX_FIFO_ID: - tx->length = size; + tx->native.length = size; tx->tail = msg_ram + offset; tx->head = msg_ram + offset + sizeof(u32); @@ -1107,6 +1158,8 @@ static int glink_rpm_parse_toc(struct device *dev, static int glink_rpm_probe(struct platform_device *pdev) { struct qcom_glink *glink; + struct glink_rpm_pipe *rx_pipe; + struct glink_rpm_pipe *tx_pipe; struct device_node *np; void __iomem *msg_ram; size_t msg_ram_size; @@ -1121,6 +1174,11 @@ static int glink_rpm_probe(struct platform_device *pdev) glink->dev = dev; + rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL); + tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL); + if (!rx_pipe || !tx_pipe) + return -ENOMEM; + mutex_init(&glink->tx_lock); spin_lock_init(&glink->rx_lock); INIT_LIST_HEAD(&glink->rx_queue); @@ -1150,12 +1208,22 @@ static int glink_rpm_probe(struct platform_device *pdev) return -ENOMEM; ret = glink_rpm_parse_toc(dev, msg_ram, msg_ram_size, - &glink->rx_pipe, &glink->tx_pipe); + rx_pipe, tx_pipe); if (ret) return ret; - writel(0, glink->tx_pipe.head); - writel(0, glink->rx_pipe.tail); + /* Pipe specific accessors */ + rx_pipe->native.avail = glink_rpm_rx_avail; + rx_pipe->native.peak = glink_rpm_rx_peak; + rx_pipe->native.advance = glink_rpm_rx_advance; + tx_pipe->native.avail = glink_rpm_tx_avail; + tx_pipe->native.write = glink_rpm_tx_write; + + glink->tx_pipe = &tx_pipe->native; + glink->rx_pipe = &rx_pipe->native; + + writel(0, tx_pipe->head); + writel(0, rx_pipe->tail); irq = platform_get_irq(pdev, 0); ret = devm_request_irq(dev, irq, From patchwork Thu Aug 24 07:21:25 2017 Content-Type: text/plain; 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So split the function and move the code to glink_native_probe that can be used later when we add the support for glink-smem based transport. Also reuse driver's remove as well. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/qcom_glink_rpm.c | 85 ++++++++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 36 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation diff --git a/drivers/rpmsg/qcom_glink_rpm.c b/drivers/rpmsg/qcom_glink_rpm.c index 870ce32..5f0fa0d 100644 --- a/drivers/rpmsg/qcom_glink_rpm.c +++ b/drivers/rpmsg/qcom_glink_rpm.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -1155,29 +1156,21 @@ static int glink_rpm_parse_toc(struct device *dev, return -EINVAL; } -static int glink_rpm_probe(struct platform_device *pdev) +struct qcom_glink *qcom_glink_native_probe(struct device *dev, + struct qcom_glink_pipe *rx, + struct qcom_glink_pipe *tx) { - struct qcom_glink *glink; - struct glink_rpm_pipe *rx_pipe; - struct glink_rpm_pipe *tx_pipe; - struct device_node *np; - void __iomem *msg_ram; - size_t msg_ram_size; - struct device *dev = &pdev->dev; - struct resource r; int irq; int ret; + struct qcom_glink *glink; glink = devm_kzalloc(dev, sizeof(*glink), GFP_KERNEL); if (!glink) - return -ENOMEM; + return ERR_PTR(-ENOMEM); glink->dev = dev; - - rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL); - tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL); - if (!rx_pipe || !tx_pipe) - return -ENOMEM; + glink->tx_pipe = tx; + glink->rx_pipe = rx; mutex_init(&glink->tx_lock); spin_lock_init(&glink->rx_lock); @@ -1188,14 +1181,48 @@ static int glink_rpm_probe(struct platform_device *pdev) idr_init(&glink->lcids); idr_init(&glink->rcids); - glink->mbox_client.dev = &pdev->dev; + glink->mbox_client.dev = dev; glink->mbox_chan = mbox_request_channel(&glink->mbox_client, 0); if (IS_ERR(glink->mbox_chan)) { if (PTR_ERR(glink->mbox_chan) != -EPROBE_DEFER) - dev_err(&pdev->dev, "failed to acquire IPC channel\n"); - return PTR_ERR(glink->mbox_chan); + dev_err(dev, "failed to acquire IPC channel\n"); + return ERR_CAST(glink->mbox_chan); + } + + irq = of_irq_get(dev->of_node, 0); + ret = devm_request_irq(dev, irq, + qcom_glink_intr, + IRQF_NO_SUSPEND | IRQF_SHARED, + "glink-native", glink); + if (ret) { + dev_err(dev, "failed to request IRQ\n"); + return ERR_PTR(ret); } + ret = qcom_glink_send_version(glink); + if (ret) + return ERR_PTR(ret); + + return glink; +} + +static int glink_rpm_probe(struct platform_device *pdev) +{ + struct qcom_glink *glink; + struct glink_rpm_pipe *rx_pipe; + struct glink_rpm_pipe *tx_pipe; + struct device_node *np; + void __iomem *msg_ram; + size_t msg_ram_size; + struct device *dev = &pdev->dev; + struct resource r; + int ret; + + rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL); + tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL); + if (!rx_pipe || !tx_pipe) + return -ENOMEM; + np = of_parse_phandle(dev->of_node, "qcom,rpm-msg-ram", 0); ret = of_address_to_resource(np, 0, &r); of_node_put(np); @@ -1219,27 +1246,13 @@ static int glink_rpm_probe(struct platform_device *pdev) tx_pipe->native.avail = glink_rpm_tx_avail; tx_pipe->native.write = glink_rpm_tx_write; - glink->tx_pipe = &tx_pipe->native; - glink->rx_pipe = &rx_pipe->native; - writel(0, tx_pipe->head); writel(0, rx_pipe->tail); - irq = platform_get_irq(pdev, 0); - ret = devm_request_irq(dev, irq, - qcom_glink_intr, - IRQF_NO_SUSPEND | IRQF_SHARED, - "glink-rpm", glink); - if (ret) { - dev_err(dev, "Failed to request IRQ\n"); - return ret; - } - - glink->irq = irq; - - ret = qcom_glink_send_version(glink); - if (ret) - return ret; + glink = qcom_glink_native_probe(&pdev->dev, &rx_pipe->native, + &tx_pipe->native); + if (IS_ERR(glink)) + return PTR_ERR(glink); platform_set_drvdata(pdev, glink); From patchwork Thu Aug 24 07:21:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 110868 Delivered-To: patch@linaro.org Received: by 10.37.128.210 with SMTP id c18csp8065377ybm; Thu, 24 Aug 2017 00:22:23 -0700 (PDT) X-Received: by 10.99.133.65 with SMTP id u62mr5459866pgd.100.1503559343057; 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[209.132.180.67]) by mx.google.com with ESMTP id g5si2305360pgc.533.2017.08.24.00.22.22; Thu, 24 Aug 2017 00:22:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=mKEREwwa; dkim=pass header.i=@codeaurora.org header.s=default header.b=bxPc2jNz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751596AbdHXHWT (ORCPT + 26 others); Thu, 24 Aug 2017 03:22:19 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:60560 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751135AbdHXHWP (ORCPT ); Thu, 24 Aug 2017 03:22:15 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DD7A9606DB; Thu, 24 Aug 2017 07:22:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559334; bh=F5wuKVAc22GDS+S7y7cf4o0UspSuXC6XE0TsBgF+h6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mKEREwwaab2QyLVphjZU5DaMv1a1omyAbnd2tBHtWBD2TZeFJDFO1uaaZlcCu+bXf lgCPr1zuPj+8IT4woRKKJt5emlvhxXd9c87T9SuSn08FrMk6Kuu/W7mdpiSVbD/1Tb H9BaLMZRoJnF5idNsxG39Yl25XjuaMFJmJMfXIFI= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from srichara-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 431996071D; Thu, 24 Aug 2017 07:22:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559330; bh=F5wuKVAc22GDS+S7y7cf4o0UspSuXC6XE0TsBgF+h6Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bxPc2jNzAiklWZbN8vFiScZfxIqFuH+o4izfD9WdDZgAUSaikfApN0q+aGm1D87ZA Y+wZy5g+SjKUhkj7y26lpC+lt+iN4WTkuvOB9cWghVGHYr/ma2onv7kBX9wmaUKsPZ Da9InJMGJsYTLkKiYjr1VV/vgLogwTG0HqUVDq2Q= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 431996071D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: ohad@wizery.com, bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sricharan@codeaurora.org Subject: [PATCH v2 05/20] rpmsg: glink: Allow unaligned data access Date: Thu, 24 Aug 2017 12:51:27 +0530 Message-Id: <1503559302-3744-6-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> References: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bjorn Andersson Glink protocol requires that each message is aligned on a 8 byte offset. This is purely a restriction from glink, so in order to support clients which do not adher to this, allow data packets of any size, but align the head index accordingly, effectively removing the alignment restriction. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/qcom_glink_native.c | 6 ------ drivers/rpmsg/qcom_glink_rpm.c | 22 +++++++++++++++++++++- 2 files changed, 21 insertions(+), 7 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation diff --git a/drivers/rpmsg/qcom_glink_native.c b/drivers/rpmsg/qcom_glink_native.c index ffdf88e..a6394cd 100644 --- a/drivers/rpmsg/qcom_glink_native.c +++ b/drivers/rpmsg/qcom_glink_native.c @@ -227,9 +227,6 @@ static int qcom_glink_tx(struct qcom_glink *glink, if (tlen >= glink->tx_pipe->length) return -EINVAL; - if (WARN(tlen % 8, "Unaligned TX request")) - return -EINVAL; - ret = mutex_lock_interruptible(&glink->tx_lock); if (ret) return ret; @@ -695,9 +692,6 @@ static int __qcom_glink_send(struct glink_channel *channel, __le32 left_size; } __packed req; - if (WARN(len % 8, "RPM GLINK expects 8 byte aligned messages\n")) - return -EINVAL; - req.msg.cmd = cpu_to_le16(RPM_CMD_TX_DATA); req.msg.param1 = cpu_to_le16(channel->lcid); req.msg.param2 = cpu_to_le32(channel->rcid); diff --git a/drivers/rpmsg/qcom_glink_rpm.c b/drivers/rpmsg/qcom_glink_rpm.c index 33daa32..cc73af0 100644 --- a/drivers/rpmsg/qcom_glink_rpm.c +++ b/drivers/rpmsg/qcom_glink_rpm.c @@ -156,11 +156,31 @@ static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe, const void *data, size_t dlen) { struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); + size_t tlen = hlen + dlen; + size_t aligned_dlen; unsigned int head; + char padding[8] = {0}; + size_t pad; + + /* Header length comes from glink native and is always 4 byte aligned */ + if (WARN(hlen % 4, "Glink Header length must be 4 bytes aligned\n")) + return; + + /* + * Move the unaligned tail of the message to the padding chunk, to + * ensure word aligned accesses + */ + aligned_dlen = ALIGN_DOWN(dlen, 4); + if (aligned_dlen != dlen) + memcpy(padding, data + aligned_dlen, dlen - aligned_dlen); head = readl(pipe->head); head = glink_rpm_tx_write_one(pipe, head, hdr, hlen); - head = glink_rpm_tx_write_one(pipe, head, data, dlen); + head = glink_rpm_tx_write_one(pipe, head, data, aligned_dlen); + + pad = ALIGN(tlen, 8) - ALIGN_DOWN(tlen, 4); + if (pad) + head = glink_rpm_tx_write_one(pipe, head, padding, pad); writel(head, pipe->head); } From patchwork Thu Aug 24 07:21:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sricharan Ramabadhran X-Patchwork-Id: 110870 Delivered-To: patch@linaro.org Received: by 10.37.128.210 with SMTP id c18csp8068534ybm; Thu, 24 Aug 2017 00:25:40 -0700 (PDT) X-Received: by 10.84.241.68 with SMTP id u4mr5809709plm.435.1503559540627; Thu, 24 Aug 2017 00:25:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503559540; cv=none; d=google.com; s=arc-20160816; b=yNzGJbwRHZRf/iqo/QPajCRVTuG4B+MH5MKRswfL3Njbei0uVna7s+sejOMzjTlQMP NS6sC3rXL785ZWYcFWpw3KyMkxsNHHGc4noh41A3Nn1PXmitFk9V8l1MMM2zae280zRg uMkJECT4PirJo2LIkZP2WTNBY791UnMQKxAx6JHg4Dj6acEFj+VG2EpvLRF0Je8KhjeZ eQUudDr0HrYBlGl1EvIHFdDuscmyzH2jAWUowvD3CLyVkphHLPJgMpOdNPOJ4DOoPUdY DsnahZdfKaupWkkjvG62q97awICR5zjJPPr3pfV7u/Ge0qv6vgTyaVR6m2SJwyjUbg5O kLTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dmarc-filter:dkim-signature:dkim-signature :arc-authentication-results; bh=5SAtb9ImLiFm1ASf261X0PczoZnpzj+lDM1P0s8zSMk=; b=tXTm1ZRATxSAwLYUIhBwak3273aMI7wPlCdUFRbciQ21gTsamdta+fEzEo5ZaJeanz Muv700DJHPnWw7iY/Lvinb4Vk48L1iuL9ui/lnQLUGNKBvcwL1fSQCvJDOca+MOzGEQT yMK0ySa/6WmOvdpt0ZCiSea5lvJPkLGiGE0LL54fv4TrZd77tR4MQQBO5xsWnwfTQebp QhcT9FkY5D85MAvumBe4uArnjh62iSTGK7C9OZQIr71TDRhH+sZ2eiGU1oGxJagvbW/8 QryJC2f4BoHBT3WiaigOnkTaXe/5WUSzWyVae4NQXCETZ5x225idUb56YF7BZpIcrd0I tGPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=ScOReFTm; dkim=pass header.i=@codeaurora.org header.s=default header.b=LUbNFw/z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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With the core protocol remaining the same, the way the transport's memory is probed and accessed is different. So add support for glink's smem based transports. Adding a new smem transport register function and the fifo accessors for the same. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/Kconfig | 10 ++ drivers/rpmsg/Makefile | 1 + drivers/rpmsg/qcom_glink_native.c | 5 + drivers/rpmsg/qcom_glink_native.h | 1 + drivers/rpmsg/qcom_glink_smem.c | 311 ++++++++++++++++++++++++++++++++++++++ include/linux/rpmsg/qcom_glink.h | 27 ++++ 6 files changed, 355 insertions(+) create mode 100644 drivers/rpmsg/qcom_glink_smem.c create mode 100644 include/linux/rpmsg/qcom_glink.h -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation diff --git a/drivers/rpmsg/Kconfig b/drivers/rpmsg/Kconfig index ac33688..4bd9ba3 100644 --- a/drivers/rpmsg/Kconfig +++ b/drivers/rpmsg/Kconfig @@ -27,6 +27,16 @@ config RPMSG_QCOM_GLINK_RPM which serves as a channel for communication with the RPM in GLINK enabled systems. +config RPMSG_QCOM_GLINK_SMEM + tristate "Qualcomm SMEM Glink driver" + select RPMSG_QCOM_GLINK_NATIVE + depends on HAS_IOMEM + depends on MAILBOX + help + Say y here to enable support for the GLINK SMEM communication driver, + which provides support for using the GLINK communication protocol + over SMEM. + config RPMSG_QCOM_SMD tristate "Qualcomm Shared Memory Driver (SMD)" depends on QCOM_SMEM diff --git a/drivers/rpmsg/Makefile b/drivers/rpmsg/Makefile index 09a756c..c71f4ab 100644 --- a/drivers/rpmsg/Makefile +++ b/drivers/rpmsg/Makefile @@ -2,5 +2,6 @@ obj-$(CONFIG_RPMSG) += rpmsg_core.o obj-$(CONFIG_RPMSG_CHAR) += rpmsg_char.o obj-$(CONFIG_RPMSG_QCOM_GLINK_RPM) += qcom_glink_rpm.o obj-$(CONFIG_RPMSG_QCOM_GLINK_NATIVE) += qcom_glink_native.o +obj-$(CONFIG_RPMSG_QCOM_GLINK_SMEM) += qcom_glink_smem.o obj-$(CONFIG_RPMSG_QCOM_SMD) += qcom_smd.o obj-$(CONFIG_RPMSG_VIRTIO) += virtio_rpmsg_bus.o diff --git a/drivers/rpmsg/qcom_glink_native.c b/drivers/rpmsg/qcom_glink_native.c index 21adde3..50a8008 100644 --- a/drivers/rpmsg/qcom_glink_native.c +++ b/drivers/rpmsg/qcom_glink_native.c @@ -1010,3 +1010,8 @@ void qcom_glink_native_remove(struct qcom_glink *glink) idr_destroy(&glink->rcids); mbox_free_channel(glink->mbox_chan); } + +void qcom_glink_native_unregister(struct qcom_glink *glink) +{ + device_unregister(glink->dev); +} diff --git a/drivers/rpmsg/qcom_glink_native.h b/drivers/rpmsg/qcom_glink_native.h index d5627a4..197bb9d 100644 --- a/drivers/rpmsg/qcom_glink_native.h +++ b/drivers/rpmsg/qcom_glink_native.h @@ -35,4 +35,5 @@ struct qcom_glink *qcom_glink_native_probe(struct device *dev, struct qcom_glink_pipe *tx); void qcom_glink_native_remove(struct qcom_glink *glink); +void qcom_glink_native_unregister(struct qcom_glink *glink); #endif diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c new file mode 100644 index 0000000..19179a1 --- /dev/null +++ b/drivers/rpmsg/qcom_glink_smem.c @@ -0,0 +1,311 @@ +/* + * Copyright (c) 2016, Linaro Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "qcom_glink_native.h" + +#define FIFO_FULL_RESERVE 8 +#define FIFO_ALIGNMENT 8 +#define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */ + +#define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478 +#define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479 +#define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480 + +struct glink_smem_pipe { + struct qcom_glink_pipe native; + + __le32 *tail; + __le32 *head; + + void *fifo; + + int remote_pid; +}; + +#define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native) + +static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np) +{ + struct glink_smem_pipe *pipe = to_smem_pipe(np); + size_t len; + void *fifo; + u32 head; + u32 tail; + + if (!pipe->fifo) { + fifo = qcom_smem_get(pipe->remote_pid, + SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len); + if (IS_ERR(fifo)) { + pr_err("failed to acquire RX fifo handle: %ld\n", + PTR_ERR(fifo)); + return 0; + } + + pipe->fifo = fifo; + pipe->native.length = len; + } + + head = le32_to_cpu(*pipe->head); + tail = le32_to_cpu(*pipe->tail); + + if (head < tail) + return pipe->native.length - tail + head; + else + return head - tail; +} + +static void glink_smem_rx_peak(struct qcom_glink_pipe *np, + void *data, size_t count) +{ + struct glink_smem_pipe *pipe = to_smem_pipe(np); + size_t len; + u32 tail; + + tail = le32_to_cpu(*pipe->tail); + + len = min_t(size_t, count, pipe->native.length - tail); + if (len) { + __ioread32_copy(data, pipe->fifo + tail, + len / sizeof(u32)); + } + + if (len != count) { + __ioread32_copy(data + len, pipe->fifo, + (count - len) / sizeof(u32)); + } +} + +static void glink_smem_rx_advance(struct qcom_glink_pipe *np, + size_t count) +{ + struct glink_smem_pipe *pipe = to_smem_pipe(np); + u32 tail; + + tail = le32_to_cpu(*pipe->tail); + + tail += count; + if (tail > pipe->native.length) + tail -= pipe->native.length; + + *pipe->tail = cpu_to_le32(tail); +} + +static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np) +{ + struct glink_smem_pipe *pipe = to_smem_pipe(np); + u32 head; + u32 tail; + u32 avail; + + head = le32_to_cpu(*pipe->head); + tail = le32_to_cpu(*pipe->tail); + + if (tail <= head) + avail = pipe->native.length - head + tail; + else + avail = tail - head; + + if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE)) + avail = 0; + else + avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE; + + return avail; +} + +static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe, + unsigned int head, + const void *data, size_t count) +{ + size_t len; + + len = min_t(size_t, count, pipe->native.length - head); + if (len) + memcpy(pipe->fifo + head, data, len); + + if (len != count) + memcpy(pipe->fifo, data + len, count - len); + + head += count; + if (head >= pipe->native.length) + head -= pipe->native.length; + + return head; +} + +static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe, + const void *hdr, size_t hlen, + const void *data, size_t dlen) +{ + struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe); + unsigned int head; + + head = le32_to_cpu(*pipe->head); + + head = glink_smem_tx_write_one(pipe, head, hdr, hlen); + head = glink_smem_tx_write_one(pipe, head, data, dlen); + + /* Ensure head is always aligned to 8 bytes */ + head = ALIGN(head, 8); + if (head >= pipe->native.length) + head -= pipe->native.length; + + *pipe->head = cpu_to_le32(head); +} + +static void qcom_glink_smem_release(struct device *dev) +{ + kfree(dev); +} + +struct qcom_glink *qcom_glink_smem_register(struct device *parent, + struct device_node *node) +{ + struct glink_smem_pipe *rx_pipe; + struct glink_smem_pipe *tx_pipe; + struct qcom_glink *glink; + struct device *dev; + u32 remote_pid; + __le32 *descs; + size_t size; + int ret; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return ERR_PTR(-ENOMEM); + + dev->parent = parent; + dev->of_node = node; + dev->release = qcom_glink_smem_release; + dev_set_name(dev, "%s:%s", node->parent->name, node->name); + ret = device_register(dev); + if (ret) { + pr_err("failed to register glink edge\n"); + return ERR_PTR(ret); + } + + ret = of_property_read_u32(dev->of_node, "qcom,remote-pid", + &remote_pid); + if (ret) { + dev_err(dev, "failed to parse qcom,remote-pid\n"); + goto err_put_dev; + } + + rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL); + tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL); + if (!rx_pipe || !tx_pipe) { + ret = -ENOMEM; + goto err_put_dev; + } + + ret = qcom_smem_alloc(remote_pid, + SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32); + if (ret && ret != -EEXIST) { + dev_err(dev, "failed to allocate glink descriptors\n"); + goto err_put_dev; + } + + descs = qcom_smem_get(remote_pid, + SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size); + if (IS_ERR(descs)) { + dev_err(dev, "failed to acquire xprt descriptor\n"); + ret = PTR_ERR(descs); + goto err_put_dev; + } + + if (size != 32) { + dev_err(dev, "glink descriptor of invalid size\n"); + ret = -EINVAL; + goto err_put_dev; + } + + tx_pipe->tail = &descs[0]; + tx_pipe->head = &descs[1]; + rx_pipe->tail = &descs[2]; + rx_pipe->head = &descs[3]; + + ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0, + SZ_16K); + if (ret && ret != -EEXIST) { + dev_err(dev, "failed to allocate TX fifo\n"); + goto err_put_dev; + } + + tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0, + &tx_pipe->native.length); + if (IS_ERR(tx_pipe->fifo)) { + dev_err(dev, "failed to acquire TX fifo\n"); + ret = PTR_ERR(tx_pipe->fifo); + goto err_put_dev; + } + + rx_pipe->native.avail = glink_smem_rx_avail; + rx_pipe->native.peak = glink_smem_rx_peak; + rx_pipe->native.advance = glink_smem_rx_advance; + rx_pipe->remote_pid = remote_pid; + + tx_pipe->native.avail = glink_smem_tx_avail; + tx_pipe->native.write = glink_smem_tx_write; + tx_pipe->remote_pid = remote_pid; + + *rx_pipe->tail = 0; + *tx_pipe->head = 0; + + glink = qcom_glink_native_probe(dev, + &rx_pipe->native, &tx_pipe->native); + if (IS_ERR(glink)) { + ret = PTR_ERR(glink); + goto err_put_dev; + } + + return glink; + +err_put_dev: + put_device(dev); + + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(qcom_glink_smem_register); + +void qcom_glink_smem_unregister(struct qcom_glink *glink) +{ + qcom_glink_native_remove(glink); + qcom_glink_native_unregister(glink); +} +EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister); + +MODULE_AUTHOR("Bjorn Andersson "); +MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver"); +MODULE_LICENSE("GPL v2"); diff --git a/include/linux/rpmsg/qcom_glink.h b/include/linux/rpmsg/qcom_glink.h new file mode 100644 index 0000000..a622f02 --- /dev/null +++ b/include/linux/rpmsg/qcom_glink.h @@ -0,0 +1,27 @@ +#ifndef _LINUX_RPMSG_QCOM_GLINK_H +#define _LINUX_RPMSG_QCOM_GLINK_H + +#include + +struct qcom_glink; + +#if IS_ENABLED(CONFIG_RPMSG_QCOM_GLINK_SMEM) + +struct qcom_glink *qcom_glink_smem_register(struct device *parent, + struct device_node *node); +void qcom_glink_smem_unregister(struct qcom_glink *glink); + +#else + +static inline struct qcom_glink * +qcom_glink_smem_register(struct device *parent, + struct device_node *node) +{ + return NULL; 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[209.132.180.67]) by mx.google.com with ESMTP id d6si2390492pgt.177.2017.08.24.00.22.50; Thu, 24 Aug 2017 00:22:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=CyOTxu06; dkim=pass header.i=@codeaurora.org header.s=default header.b=QTQIm+04; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751831AbdHXHWt (ORCPT + 26 others); Thu, 24 Aug 2017 03:22:49 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:35018 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751708AbdHXHWp (ORCPT ); Thu, 24 Aug 2017 03:22:45 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7F03660723; Thu, 24 Aug 2017 07:22:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559364; bh=XaLAmCVkkzeU/fWT99d85w9Yw/ll/8RkjAFvuODH/sE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CyOTxu06CckhCBxtf7zlgD7n211f6cystjh00cw/I24SQ2hRVQE3SR8m8ttqDZIN7 ECaQuZhK1BkI097AAMIEdjX0JVSUgDpALuomeI6e6YdKbp1QDk/ONQEx5KxrLYc2eo 93C5To3UdR9e/L3P6aivUk5Qxzv+34cRoVJ5WGCQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from srichara-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id ADDE360710; Thu, 24 Aug 2017 07:22:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1503559358; bh=XaLAmCVkkzeU/fWT99d85w9Yw/ll/8RkjAFvuODH/sE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QTQIm+04ixKoOiJ1FY2x2RpNfcCUXangQPzEiHBwY0Mi/G2QUogLy311DqyDLKSth ykIF3kYgkkdJcggo9oUQvAVKrfB7IV0gwh36A8mASPrJkJDmb4fTep6Ztj8PshC5lR /WmQBmkYNPo9f5R9HbGwQVZZl/8i5ixWvZL0nFKU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org ADDE360710 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org From: Sricharan R To: ohad@wizery.com, bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: sricharan@codeaurora.org Subject: [PATCH v2 14/20] rpmsg: glink: Make RX FIFO peak accessor to take an offset Date: Thu, 24 Aug 2017 12:51:36 +0530 Message-Id: <1503559302-3744-15-git-send-email-sricharan@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> References: <1503559302-3744-1-git-send-email-sricharan@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bjorn Andersson To fully read the received rx data from FIFO both the command and data has to be read. Currently we read command, data separately and process them. By adding an offset parameter to RX FIFO peak accessor, command and data can be read together, simplifying things. So introduce this. Signed-off-by: Bjorn Andersson Signed-off-by: Sricharan R --- drivers/rpmsg/qcom_glink_native.c | 15 +++++++-------- drivers/rpmsg/qcom_glink_native.h | 2 +- drivers/rpmsg/qcom_glink_rpm.c | 5 ++++- drivers/rpmsg/qcom_glink_smem.c | 5 ++++- 4 files changed, 16 insertions(+), 11 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation Acked-by: Arun Kumar Neelakantam diff --git a/drivers/rpmsg/qcom_glink_native.c b/drivers/rpmsg/qcom_glink_native.c index 67eeb86..ff83cbb 100644 --- a/drivers/rpmsg/qcom_glink_native.c +++ b/drivers/rpmsg/qcom_glink_native.c @@ -233,9 +233,9 @@ static size_t qcom_glink_rx_avail(struct qcom_glink *glink) } static void qcom_glink_rx_peak(struct qcom_glink *glink, - void *data, size_t count) + void *data, unsigned int offset, size_t count) { - glink->rx_pipe->peak(glink->rx_pipe, data, count); + glink->rx_pipe->peak(glink->rx_pipe, data, offset, count); } static void qcom_glink_rx_advance(struct qcom_glink *glink, size_t count) @@ -600,7 +600,7 @@ static int qcom_glink_rx_defer(struct qcom_glink *glink, size_t extra) INIT_LIST_HEAD(&dcmd->node); - qcom_glink_rx_peak(glink, &dcmd->msg, sizeof(dcmd->msg) + extra); + qcom_glink_rx_peak(glink, &dcmd->msg, 0, sizeof(dcmd->msg) + extra); spin_lock(&glink->rx_lock); list_add_tail(&dcmd->node, &glink->rx_queue); @@ -633,7 +633,7 @@ static int qcom_glink_rx_data(struct qcom_glink *glink, size_t avail) return -EAGAIN; } - qcom_glink_rx_peak(glink, &hdr, sizeof(hdr)); + qcom_glink_rx_peak(glink, &hdr, 0, sizeof(hdr)); chunk_size = le32_to_cpu(hdr.chunk_size); left_size = le32_to_cpu(hdr.left_size); @@ -700,9 +700,8 @@ static int qcom_glink_rx_data(struct qcom_glink *glink, size_t avail) goto advance_rx; } - qcom_glink_rx_advance(glink, ALIGN(sizeof(hdr), 8)); qcom_glink_rx_peak(glink, intent->data + intent->offset, - chunk_size); + sizeof(hdr), chunk_size); intent->offset += chunk_size; /* Handle message when no fragments remain to be received */ @@ -722,7 +721,7 @@ static int qcom_glink_rx_data(struct qcom_glink *glink, size_t avail) } advance_rx: - qcom_glink_rx_advance(glink, ALIGN(chunk_size, 8)); + qcom_glink_rx_advance(glink, ALIGN(sizeof(hdr) + chunk_size, 8)); return ret; } @@ -759,7 +758,7 @@ static irqreturn_t qcom_glink_native_intr(int irq, void *data) if (avail < sizeof(msg)) break; - qcom_glink_rx_peak(glink, &msg, sizeof(msg)); + qcom_glink_rx_peak(glink, &msg, 0, sizeof(msg)); cmd = le16_to_cpu(msg.cmd); param1 = le16_to_cpu(msg.param1); diff --git a/drivers/rpmsg/qcom_glink_native.h b/drivers/rpmsg/qcom_glink_native.h index 92e0881..0cae8a8 100644 --- a/drivers/rpmsg/qcom_glink_native.h +++ b/drivers/rpmsg/qcom_glink_native.h @@ -24,7 +24,7 @@ struct qcom_glink_pipe { size_t (*avail)(struct qcom_glink_pipe *glink_pipe); void (*peak)(struct qcom_glink_pipe *glink_pipe, void *data, - size_t count); + unsigned int offset, size_t count); void (*advance)(struct qcom_glink_pipe *glink_pipe, size_t count); void (*write)(struct qcom_glink_pipe *glink_pipe, diff --git a/drivers/rpmsg/qcom_glink_rpm.c b/drivers/rpmsg/qcom_glink_rpm.c index 5a86e08..69b25d1 100644 --- a/drivers/rpmsg/qcom_glink_rpm.c +++ b/drivers/rpmsg/qcom_glink_rpm.c @@ -77,13 +77,16 @@ static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe) } static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe, - void *data, size_t count) + void *data, unsigned int offset, size_t count) { struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); unsigned int tail; size_t len; tail = readl(pipe->tail); + tail += offset; + if (tail >= pipe->native.length) + tail -= pipe->native.length; len = min_t(size_t, count, pipe->native.length - tail); if (len) { diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c index 9d73ced..5cdaa5f 100644 --- a/drivers/rpmsg/qcom_glink_smem.c +++ b/drivers/rpmsg/qcom_glink_smem.c @@ -87,13 +87,16 @@ static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np) } static void glink_smem_rx_peak(struct qcom_glink_pipe *np, - void *data, size_t count) + void *data, unsigned int offset, size_t count) { struct glink_smem_pipe *pipe = to_smem_pipe(np); size_t len; u32 tail; tail = le32_to_cpu(*pipe->tail); + tail += offset; + if (tail >= pipe->native.length) + tail -= pipe->native.length; len = min_t(size_t, count, pipe->native.length - tail); if (len) {