From patchwork Fri Mar 6 08:50:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhong Guo X-Patchwork-Id: 203756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA380C10F25 for ; Fri, 6 Mar 2020 08:51:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ACF80208C3 for ; Fri, 6 Mar 2020 08:51:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="msCi53q/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726565AbgCFIvu (ORCPT ); Fri, 6 Mar 2020 03:51:50 -0500 Received: from mail-pf1-f194.google.com ([209.85.210.194]:46603 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725941AbgCFIvu (ORCPT ); Fri, 6 Mar 2020 03:51:50 -0500 Received: by mail-pf1-f194.google.com with SMTP id o24so773178pfp.13; Fri, 06 Mar 2020 00:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1MJfeELIuC6LsKgfyfQqa0z3Waht5G7PSNrYy3Wi+08=; b=msCi53q/ygvF5LxsC0mewd4cbGjJiaaBtvneNNCWDGd/w0WAoNfXuxHc6Lk5GHdaFS a1Ns/9mJlE5THiwNGi2R39qyvu2zYxQM7zinWhETTsZT+/7NceUy7RmhQ21ViWyf0yzu Y94sPYIzEdkQxDie5d9dBtaRnQHxmU2QoZmxBfht/O+w1Q0v2Xqneeb768RMigZvKnrG CcBWckHero/W8loNJJDYI/sf1SpsjucE2WeHJiNartnlcrUuoQZ0LPU8Cp1FY73JvXsL xBKGh3fHhtsRchNreq5rPydEcRRojCIuoEkgATinxKkygPaIokRVHb/p99SWM0dTVeux F9DA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1MJfeELIuC6LsKgfyfQqa0z3Waht5G7PSNrYy3Wi+08=; b=onILw0FQMkgPlYaDIfQrEwr40Lt5mH1W2k/YQU+LltKQCuAGlii2K29m1K2GQRMZkA CMrIJl76U8DfZRIT25w8fjXQWlo1IrgOCQJhlEu6CuhTJ7soK+iTL9Yui66qu2MJ14/R msS8H+bVvekqJm+opFxvsTnUKPFyIT8wnH5R33VQRjuxzXWESdmT+bUtILdCQ0rZiws8 viFzPS+pkS2dTsW/LAAPO0YDT4WySBE67lEbfCvz0vzs+zMuowJtLuk9tRl6JVyj7iB7 MWPvE3J9WWNPeboyw9LqEBwtGJKkmcTP/OdUBqUE4qcZeYmJsLTJE3Kclk9ay5Qq7Zuq jHoQ== X-Gm-Message-State: ANhLgQ29aumnMcQZ3nPG8zVzrAg8J/ntfsopkakkUwcrGgfEbNF2eSJF KaWzt3F2ihXrkkB0uj/T4qk= X-Google-Smtp-Source: ADFU+vvZtzx9vJU2zlECVhWq1gy1fL6yFa1ebwPi96Uawcx+c3SfXqdhvrpCHJ8ubSGB0rbU3cqkfg== X-Received: by 2002:a63:1245:: with SMTP id 5mr2267008pgs.55.1583484709301; Fri, 06 Mar 2020 00:51:49 -0800 (PST) Received: from guoguo-omen.lan ([240e:379:94a:b53:8200:7767:6b7e:4da3]) by smtp.gmail.com with ESMTPSA id s23sm8527334pjp.28.2020.03.06.00.51.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2020 00:51:48 -0800 (PST) From: Chuanhong Guo To: linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org Cc: Chuanhong Guo , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Matthias Brugger , Mark Brown , Tudor Ambarus , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 1/4] spi: make spi-max-frequency optional Date: Fri, 6 Mar 2020 16:50:49 +0800 Message-Id: <20200306085052.28258-2-gch981213@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200306085052.28258-1-gch981213@gmail.com> References: <20200306085052.28258-1-gch981213@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org We only need a spi-max-frequency when we specifically request a spi frequency lower than the max speed of spi host. This property is already documented as optional property and current host drivers are implemented to operate at highest speed possible when spi->max_speed_hz is 0. This patch makes spi-max-frequency an optional property so that we could just omit it to use max controller speed. Signed-off-by: Chuanhong Guo --- Change since v2: none Change since v1: new patch drivers/spi/spi.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 22baf204a09d..e317fb30329f 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -1951,13 +1951,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, spi->mode |= SPI_CS_HIGH; /* Device speed */ - rc = of_property_read_u32(nc, "spi-max-frequency", &value); - if (rc) { - dev_err(&ctlr->dev, - "%pOF has no valid 'spi-max-frequency' property (%d)\n", nc, rc); - return rc; - } - spi->max_speed_hz = value; + if (!of_property_read_u32(nc, "spi-max-frequency", &value)) + spi->max_speed_hz = value; return 0; } From patchwork Fri Mar 6 08:50:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chuanhong Guo X-Patchwork-Id: 203755 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B902C10DCE for ; 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Fri, 06 Mar 2020 00:52:08 -0800 (PST) Received: from guoguo-omen.lan ([240e:379:94a:b53:8200:7767:6b7e:4da3]) by smtp.gmail.com with ESMTPSA id s23sm8527334pjp.28.2020.03.06.00.52.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Mar 2020 00:52:07 -0800 (PST) From: Chuanhong Guo To: linux-mediatek@lists.infradead.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org, devicetree@vger.kernel.org Cc: Chuanhong Guo , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Matthias Brugger , Mark Brown , Tudor Ambarus , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 3/4] dt-bindings: convert mtk-quadspi binding doc for spi-mtk-nor Date: Fri, 6 Mar 2020 16:50:51 +0800 Message-Id: <20200306085052.28258-4-gch981213@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200306085052.28258-1-gch981213@gmail.com> References: <20200306085052.28258-1-gch981213@gmail.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org spi-mtk-nor is a driver to replace mtk-quadspi and they have almost the same device-tree bindings. Reuse this binding documentation and convert it for new driver: 1. "Mediatek SoCs" -> "Mediatek ARM SoCs" because MTK MIPS SoCs use different controllers. 2. document "interrupts" as a required property because it's available on all SoCs with this controller and new driver takes advantages of it. It's implemented as optional only to maintain backward compatibility. 3. add a dummy interrupt binding in example. Signed-off-by: Chuanhong Guo --- Change since v2: revert binding example replacement and add a dummy irq binding Change since v1: none .../{mtd/mtk-quadspi.txt => spi/spi-mtk-nor.txt} | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) rename Documentation/devicetree/bindings/{mtd/mtk-quadspi.txt => spi/spi-mtk-nor.txt} (75%) diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/spi/spi-mtk-nor.txt similarity index 75% rename from Documentation/devicetree/bindings/mtd/mtk-quadspi.txt rename to Documentation/devicetree/bindings/spi/spi-mtk-nor.txt index a12e3b5c495d..984ae7fd4f94 100644 --- a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt +++ b/Documentation/devicetree/bindings/spi/spi-mtk-nor.txt @@ -1,4 +1,4 @@ -* Serial NOR flash controller for MediaTek SoCs +* Serial NOR flash controller for MediaTek ARM SoCs Required properties: - compatible: For mt8173, compatible should be "mediatek,mt8173-nor", @@ -13,6 +13,7 @@ Required properties: "mediatek,mt7629-nor", "mediatek,mt8173-nor" "mediatek,mt8173-nor" - reg: physical base address and length of the controller's register +- interrupts: Interrupt number used by the controller. - clocks: the phandle of the clocks needed by the nor controller - clock-names: the names of the clocks the clocks should be named "spi" and "sf". "spi" is used for spi bus, @@ -22,20 +23,16 @@ Required properties: - #address-cells: should be <1> - #size-cells: should be <0> -The SPI flash must be a child of the nor_flash node and must have a -compatible property. Also see jedec,spi-nor.txt. - -Required properties: -- compatible: May include a device-specific string consisting of the manufacturer - and name of the chip. Must also include "jedec,spi-nor" for any - SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F). -- reg : Chip-Select number +There should be only one spi slave device following generic spi bindings. +It's not recommended to use this controller for devices other than SPI NOR +flash due to limited transfer capability of this controller. Example: nor_flash: spi@1100d000 { compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; + interrupts = <&spi_flash_irq>; clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; clock-names = "spi", "sf";