From patchwork Wed Mar 18 11:11:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 203134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B80AC5AD46 for ; Wed, 18 Mar 2020 11:18:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DEF5B2077B for ; Wed, 18 Mar 2020 11:18:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=samsung.com header.i=@samsung.com header.b="jE/y5/rr" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727806AbgCRLSL (ORCPT ); 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Wed, 18 Mar 2020 11:18:03 +0000 (GMT) From: Alim Akhtar To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-scsi@vger.kernel.org Cc: krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v2 1/5] dt-bindings: phy: Document Samsung UFS PHY bindings Date: Wed, 18 Mar 2020 16:41:40 +0530 Message-Id: <20200318111144.39525-2-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200318111144.39525-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIKsWRmVeSWpSXmKPExsWy7bCmlm4uc1GcwZcWU4sH87axWbz8eZXN 4tP6ZawW84+cY7U4f34Du8XNLUdZLDY9vsZqcXnXHDaLGef3MVl0X9/BZrH8+D8mi9a9R9gt lm69yejA63G5r5fJY9OqTjaPzUvqPVpO7mfx+Pj0FotH35ZVjB6fN8l5tB/oZgrgiOKySUnN ySxLLdK3S+DKeLRvC3PBRf6KD6svsTQw/ufuYuTkkBAwkVg54RdzFyMXh5DAbkaJTRuOMUE4 nxglnqycwAJSJSTwjVHi8HVvmI4TN6+zQhTtZZS4cesjO4TTwiTx4O55ZpAqNgFtibvTtzCB 2CICARKX3h9kAyliFpjHJLHoUQ9YQljAW6J962+wFSwCqhJNfRvAmnkFbCQeHbjDArFOXmL1 hgNgcU4BW4m/d1sZQQZJCNxnk1j5bw4bRJGLxO0PR5khbGGJV8e3sEPYUhKf3+0FquEAsrMl enYZQ4RrJJbOOwY1317iwJU5LCAlzAKaEut36YOEmQX4JHp/P2GC6OSV6GgTgqhWlWh+dxWq U1piYnc3K4TtIfHozQFoME5glDi26zT7BEbZWQhTFzAyrmKUTC0ozk1PLTYtMMxLLdcrTswt Ls1L10vOz93ECE4oWp47GGed8znEKMDBqMTDy7GhIE6INbGsuDL3EKMEB7OSCO/iwvw4Id6U xMqq1KL8+KLSnNTiQ4zSHCxK4ryTWK/GCAmkJ5akZqemFqQWwWSZODilGhgXOPjodTp7ZO8N ZeV3k36o1fB9i/6y2m+S/7/dVmPzyXm1g/3xr5cB0e4y5oIWQgpee8462iwzU+5pkJnbsHOu TGX8MRu7bU1Tdsha237KmD+74FDw/c45u9l3rTncMD3D+l3woguvPk570clneOH7JG7BBRmp UwX4/7T85OBWXbLqz4XQlDtKLMUZiYZazEXFiQBKruV5JAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrILMWRmVeSWpSXmKPExsWy7bCSvG4uc1GcwdYZChYP5m1js3j58yqb xaf1y1gt5h85x2px/vwGdoubW46yWGx6fI3V4vKuOWwWM87vY7Lovr6DzWL58X9MFq17j7Bb LN16k9GB1+NyXy+Tx6ZVnWwem5fUe7Sc3M/i8fHpLRaPvi2rGD0+b5LzaD/QzRTAEcVlk5Ka k1mWWqRvl8CV8WjfFuaCi/wVH1ZfYmlg/M/dxcjJISFgInHi5nXWLkYuDiGB3YwSv89cZINI SEtc3ziBHcIWllj57zk7RFETk8TvjmdMIAk2AW2Ju9O3gNkiAkES99asBZvELLCKSaKz9ywj SEJYwFuifetvFhCbRUBVoqlvAzOIzStgI/HowB0WiA3yEqs3HACLcwrYSvy92wrWKwRUc2zy L5YJjHwLGBlWMUqmFhTnpucWGxYY5aWW6xUn5haX5qXrJefnbmIEB7SW1g7GEyfiDzEKcDAq 8fAmbCqIE2JNLCuuzD3EKMHBrCTCu7gwP06INyWxsiq1KD++qDQntfgQozQHi5I4r3z+sUgh gfTEktTs1NSC1CKYLBMHp1QDY5ewtTB/pe3RnTbbTpQcqHz7k6+7qdinNkbkTcRxjv99mREf 01z3Hdt3Trp0+aId3d6Fni8ZxPtYF8xn6WG+nzBDrpw3SebSuha5JoO1Jedf3v6SmK36hTNi sqDB8g6nvtt/0vb/nRW3SL6354+Ne6aUXUlnZcv8hb6HWPpNpwgdKBR2N+xUYinOSDTUYi4q TgQAr9/R/2QCAAA= X-CMS-MailID: 20200318111805epcas5p3e68724d923a07ddd80a45e3316292940 X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200318111805epcas5p3e68724d923a07ddd80a45e3316292940 References: <20200318111144.39525-1-alim.akhtar@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch documents Samsung UFS PHY device tree bindings Signed-off-by: Alim Akhtar --- .../bindings/phy/samsung,ufs-phy.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml new file mode 100644 index 000000000000..df54129004e9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series UFS PHY Device Tree Bindings + +maintainers: + - Alim Akhtar + +properties: + "#phy-cells": + const: 0 + + compatible: + enum: + - samsung,exynos7-ufs-phy + + reg: + maxItems: 1 + description: PHY base register address + + reg-names: + items: + - const: phy-pma + + clocks: + items: + - description: PLL reference clock + - description: Referencec clock parrent + + clock-names: + items: + - const: ref_clk_parent + - const: ref_clk + +required: + - "#phy-cells" + - compatible + - reg + - reg-names + - clocks + - clock-names + +examples: + - | + #include + + ufs_phy: ufs-phy@0x15571800 { + compatible = "samsung,exynos7-ufs-phy"; + reg = <0x15571800 0x240>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys1 MOUT_FSYS1_PHYCLK_SEL1>, + <&clock_top1 CLK_SCLK_PHY_FSYS1_26M>; + clock-names = "ref_clk_parent", + "ref_clk"; + }; + +... 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Wed, 18 Mar 2020 11:18:07 +0000 (GMT) From: Alim Akhtar To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-scsi@vger.kernel.org Cc: krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v2 3/5] Documentation: devicetree: ufs: Add DT bindings for exynos UFS host controller Date: Wed, 18 Mar 2020 16:41:42 +0530 Message-Id: <20200318111144.39525-4-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200318111144.39525-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEKsWRmVeSWpSXmKPExsWy7bCmpm4Rc1GcwccmBYsH87axWbz8eZXN 4tP6ZawW84+cY7U4f34Du8XNLUdZLDY9vsZqcXnXHDaLGef3MVl0X9/BZrH8+D8mi9a9R9gt lm69yejA63G5r5fJY9OqTjaPzUvqPVpO7mfx+Pj0FotH35ZVjB6fN8l5tB/oZgrgiOKySUnN ySxLLdK3S+DK6H24n6Vgi3bF5B+nWRsYpyt1MXJySAiYSHxf8IWxi5GLQ0hgN6PEwZ+foZxP jBInL1xignC+MUqsmzWXDaZl8geYxF5GibZXG6FaWpgkNv9czwxSxSagLXF3+hYmEFtEIEDi 0vuDbCBFzALzmCQWPeoBSwgLZEjc/nYBrIFFQFViwdobLCA2r4CNxPOPl6DWyUus3nAArIZT wFbi791WsG0SAvfZJPZvfwBV5CKx+eMMFghbWOLV8S3sELaUxOd3e4FqOIDsbImeXcYQ4RqJ pfOOQZXbSxy4MocFpIRZQFNi/S59kDCzAJ9E7+8nTBCdvBIdbUIQ1aoSze+uQnVKS0zs7maF sD0kTu18xgIJhwmMEgt/vGKdwCg7C2HqAkbGVYySqQXFuempxaYFxnmp5XrFibnFpXnpesn5 uZsYwSlFy3sH46ZzPocYBTgYlXh4OTYUxAmxJpYVV+YeYpTgYFYS4V1cmB8nxJuSWFmVWpQf X1Sak1p8iFGag0VJnHcS69UYIYH0xJLU7NTUgtQimCwTB6dUA2OCC+fyxwe1NSe9XXnpg5Z+ h3OxuLzI1XanbJ/fmW4zdr4s7BcPq23zUou48i4iPEwp1X+Dyrs+6cIZr7h+f1GVif3YJ2yR 4nBv04ej784+7ZbcntK9UuT03K/6u1calL4zi9Pz/bz04LGT67e5/bD6u7C2JVNFpEqI/82P g+ezHmxkeXNh+xIlluKMREMt5qLiRAC2OfcvJQMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrALMWRmVeSWpSXmKPExsWy7bCSvG4hc1GcwYnpKhYP5m1js3j58yqb xaf1y1gt5h85x2px/vwGdoubW46yWGx6fI3V4vKuOWwWM87vY7Lovr6DzWL58X9MFq17j7Bb LN16k9GB1+NyXy+Tx6ZVnWwem5fUe7Sc3M/i8fHpLRaPvi2rGD0+b5LzaD/QzRTAEcVlk5Ka k1mWWqRvl8CV0ftwP0vBFu2KyT9OszYwTlfqYuTkkBAwkZj84RITiC0ksJtR4tRaT4i4tMT1 jRPYIWxhiZX/ngPZXEA1TUwSS579ZANJsAloS9ydvgWsWUQgSOLemrWsIEXMAquYJDp7zzKC JIQF0iQOfrnIDGKzCKhKLFh7gwXE5hWwkXj+8RIbxAZ5idUbDoDVcArYSvy928oIcZGNxLHJ v1gmMPItYGRYxSiZWlCcm55bbFhgmJdarlecmFtcmpeul5yfu4kRHM5amjsYLy+JP8QowMGo xMObsKkgTog1say4MvcQowQHs5II7+LC/Dgh3pTEyqrUovz4otKc1OJDjNIcLErivE/zjkUK CaQnlqRmp6YWpBbBZJk4OKUaGOeXdtzUNijfXVb5ZdO6I1fcVS43hdrI8a5KmL/Xk32XRWBB 7e3FqluN/rzZ2rFCTO/Wt48tCbK9XyO5V69P1uKvfCCd6jXPabWxykfZ9Ap/x4UyN8WvKH1d uezPRpaMqMscJnvV1+6vP+kceG2zSmqVqcMnHtv/XJppqz+lKmqun+sZzSEXpsRSnJFoqMVc VJwIACwJcshjAgAA X-CMS-MailID: 20200318111809epcas5p37b33e3038ede4797c83682314afc683b X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200318111809epcas5p37b33e3038ede4797c83682314afc683b References: <20200318111144.39525-1-alim.akhtar@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds Exynos Universal Flash Storage (UFS) Host Controller DT bindings. Signed-off-by: Seungwon Jeon Signed-off-by: Alim Akhtar --- .../devicetree/bindings/ufs/ufs-exynos.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/ufs-exynos.txt diff --git a/Documentation/devicetree/bindings/ufs/ufs-exynos.txt b/Documentation/devicetree/bindings/ufs/ufs-exynos.txt new file mode 100644 index 000000000000..08e2d1497b1b --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ufs-exynos.txt @@ -0,0 +1,104 @@ +* Exynos Universal Flash Storage (UFS) Host Controller + +UFSHC nodes are defined to describe on-chip UFS host controllers. +Each UFS controller instance should have its own node. + +Required properties: +- compatible : compatible name, contains "samsung,exynos7-ufs" +- interrupts : +- reg : Should contain HCI, vendor specific, UNIPRO and + UFS protector address space +- reg-names : "hci", "vs_hci", "unipro", "ufsp"; + +Optional properties: +- vdd-hba-supply : phandle to UFS host controller supply regulator node +- vcc-supply : phandle to VCC supply regulator node +- vccq-supply : phandle to VCCQ supply regulator node +- vccq2-supply : phandle to VCCQ2 supply regulator node +- vcc-supply-1p8 : For embedded UFS devices, valid VCC range is 1.7-1.95V + or 2.7-3.6V. This boolean property when set, specifies + to use low voltage range of 1.7-1.95V. Note for external + UFS cards this property is invalid and valid VCC range is + always 2.7-3.6V. +- vcc-max-microamp : specifies max. load that can be drawn from vcc supply +- vccq-max-microamp : specifies max. load that can be drawn from vccq supply +- vccq2-max-microamp : specifies max. load that can be drawn from vccq2 supply +- -fixed-regulator : boolean property specifying that -supply is a fixed regulator + +- clocks : List of phandle and clock specifier pairs +- clock-names : List of clock input name strings sorted in the same + order as the clocks property. + "core", "sclk_unipro_main", "ref" and ref_parent + +- freq-table-hz : Array of operating frequencies stored in the same + order as the clocks property. If this property is not + defined or a value in the array is "0" then it is assumed + that the frequency is set by the parent clock or a + fixed rate clock source. +- pclk-freq-avail-range : specifies available frequency range(min/max) for APB clock +- ufs,pwr-attr-mode : specifies mode value for power mode change, possible values are + "FAST", "SLOW", "FAST_auto" and "SLOW_auto" +- ufs,pwr-attr-lane : specifies lane count value for power mode change + allowed values are 1 or 2 +- ufs,pwr-attr-gear : specifies gear count value for power mode change + allowed values are 1 or 2 +- ufs,pwr-attr-hs-series : specifies HS rate series for power mode change + can be one of "HS_rate_b" or "HS_rate_a" +- ufs,pwr-local-l2-timer : specifies array of local UNIPRO L2 timer values + 3 timers supported + +- ufs,pwr-remote-l2-timer : specifies array of remote UNIPRO L2 timer values + 3 timers supported + +- ufs-rx-adv-fine-gran-sup_en : specifies support of fine granularity of MPHY, + this is a boolean property. +- ufs-rx-adv-fine-gran-step : specifies granularity steps of MPHY, + allowed step size is 0 to 3 +- ufs-rx-adv-min-activate-time-cap : specifies rx advanced minimum activate time of MPHY + range is 1 to 9 +- ufs-pa-granularity : specifies Granularity for PA_TActivate and PA_Hibern8Time +- ufs-pa-tacctivate : specifies time to wake-up remote M-RX +- ufs-pa-hibern8time : specifies minimum time to wait in HIBERN8 state + +Note: If above properties are not defined it can be assumed that the supply +regulators or clocks are always on. + +Example: + ufshc@0x15570000 { + compatible = "samsung,exynos7-ufs"; + reg = <0x15570000 0x100>, + <0x15570100 0x100>, + <0x15571000 0x200>, + <0x15572000 0x300>; + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = <0 200 0>; + + vdd-hba-supply = <&xxx_reg0>; + vdd-hba-fixed-regulator; + vcc-supply = <&xxx_reg1>; + vcc-supply-1p8; + vccq-supply = <&xxx_reg2>; + vccq2-supply = <&xxx_reg3>; + vcc-max-microamp = 500000; + vccq-max-microamp = 200000; + vccq2-max-microamp = 200000; + + clocks = <&core 0>, <&ref 0>, <&iface 0>; + clock-names = "core", "sclk_unipro_main", "ref", "ref_parent"; + freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>; + + pclk-freq-avail-range = <70000000 133000000>; + + ufs,pwr-attr-mode = "FAST"; + ufs,pwr-attr-lane = <2>; + ufs,pwr-attr-gear = <2>; + ufs,pwr-attr-hs-series = "HS_rate_b"; + ufs,pwr-local-l2-timer = <8000 28000 20000>; + ufs,pwr-remote-l2-timer = <12000 32000 16000>; + ufs-rx-adv-fine-gran-sup_en = <1>; + ufs-rx-adv-fine-gran-step = <3>; + ufs-rx-adv-min-activate-time-cap = <9>; + ufs-pa-granularity = <6>; + ufs-pa-tacctivate = <6>; + ufs-pa-hibern8time = <20>; + }; From patchwork Wed Mar 18 11:11:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alim Akhtar X-Patchwork-Id: 203135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18578C5ACD6 for ; Wed, 18 Mar 2020 11:18:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E3DD620775 for ; Wed, 18 Mar 2020 11:18:26 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Wed, 18 Mar 2020 11:18:13 +0000 (GMT) X-AuditID: b6c32a4b-acbff70000001280-23-5e72037625d6 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 93.3D.04024.573027E5; Wed, 18 Mar 2020 20:18:13 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.108.73.139]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20200318111811epsmtip25f1300dc888d520b56e28e072c69fd62~9Yee_CYG00622906229epsmtip2x; Wed, 18 Mar 2020 11:18:11 +0000 (GMT) From: Alim Akhtar To: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-scsi@vger.kernel.org Cc: krzk@kernel.org, avri.altman@wdc.com, martin.petersen@oracle.com, kwmad.kim@samsung.com, stanley.chu@mediatek.com, cang@codeaurora.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alim Akhtar Subject: [PATCH v2 5/5] arm64: dts: Add node for ufs exynos7 Date: Wed, 18 Mar 2020 16:41:44 +0530 Message-Id: <20200318111144.39525-6-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200318111144.39525-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprIKsWRmVeSWpSXmKPExsWy7bCmhm4Zc1GcwYkl3BYP5m1js3j58yqb xaf1y1gt5h85x2px/vwGdoubW46yWGx6fI3V4vKuOWwWM87vY7Lovr6DzWL58X9MFq17j7Bb LN16k9GB1+NyXy+Tx6ZVnWwem5fUe7Sc3M/i8fHpLRaPvi2rGD0+b5LzaD/QzRTAEcVlk5Ka k1mWWqRvl8CV8W7ze+aCY1IVfWsamBoYD4p2MXJySAiYSDxom83UxcjFISSwm1Hie8N/Vgjn E6PEji+P2CGcb4wSnx49ZoNpOfjuN1TVXkaJA7vnMUI4LUwS146/ZwKpYhPQlrg7fQuYLSIQ IHHp/UE2kCJmgXlMEose9QAlODiEBWwk7l+1AalhEVCVOPnnFTOIzQsU/nOomRFim7zE6g0H wOKcArYSf++2gi2TELjPJjGx+SsrRJGLxOy5T6AahCVeHd/CDmFLSbzsb2MH2SUhkC3Rs8sY IlwjsXTeMRYI217iwJU5LCAlzAKaEut36YOEmQX4JHp/P2GC6OSV6GgTgqhWlWh+dxWqU1pi Ync31AEeEv9mTWCDBMMERolTDeuYJzDKzkKYuoCRcRWjZGpBcW56arFpgXFearlecWJucWle ul5yfu4mRnBC0fLewbjpnM8hRgEORiUeXo4NBXFCrIllxZW5hxglOJiVRHgXF+bHCfGmJFZW pRblxxeV5qQWH2KU5mBREuedxHo1RkggPbEkNTs1tSC1CCbLxMEp1cBYN11A2kwgcs0mm+NN hzY4xG6d7mp/pFr2iQ7Hqmd992Z6eNgIT+uVmChfMPt/WH7FqnblR+s+a2dvqJybXd46LTTq VtpkuUPnTjBNK3WZlHXixlVjtunCOm+/V2Zfenuh6oxK8Ow9hzcl2EftM3k+t3DrmpUzdb/p zn/Kb+56XP6eZ+uvCfv+KLEUZyQaajEXFScCAA/WmvckAwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPLMWRmVeSWpSXmKPExsWy7bCSvG4pc1GcQUO3msWDedvYLF7+vMpm 8Wn9MlaL+UfOsVqcP7+B3eLmlqMsFpseX2O1uLxrDpvFjPP7mCy6r+9gs1h+/B+TReveI+wW S7feZHTg9bjc18vksWlVJ5vH5iX1Hi0n97N4fHx6i8Wjb8sqRo/Pm+Q82g90MwVwRHHZpKTm ZJalFunbJXBlvNv8nrngmFRF35oGpgbGg6JdjJwcEgImEgff/WYFsYUEdjNKLO7PgohLS1zf OIEdwhaWWPnvOZDNBVTTxCTxcHkzM0iCTUBb4u70LUwgtohAkMS9NWtZQYqYBVYxSXT2nmXs YuTgEBawkbh/1QakhkVAVeLkn1dgvbxA4T+HmhkhFshLrN5wACzOKWAr8fduKyPEQTYSxyb/ YpnAyLeAkWEVo2RqQXFuem6xYYFhXmq5XnFibnFpXrpecn7uJkZwMGtp7mC8vCT+EKMAB6MS D2/CpoI4IdbEsuLK3EOMEhzMSiK8iwvz44R4UxIrq1KL8uOLSnNSiw8xSnOwKInzPs07Fikk kJ5YkpqdmlqQWgSTZeLglGpgnGkQVfHx3z9uqae1ja947JSK1GYslFerOFOQbx+h+YgrXK1Y 2mLS7p9p6YsKJQ0qVvfP6Ha+5TlXalXHPfE3t3838AhaTg35LSUvk3Xr5IvE7V1TWSc8zP/m wZCbfz2MS27izgUqGVNVhfOk5uVUs/xJ7N5zpGZ9SKRc3stpSVusnVNU8zcosRRnJBpqMRcV JwIALZ7MAmICAAA= X-CMS-MailID: 20200318111813epcas5p126d7b871b194385099e8f71f2461303e X-Msg-Generator: CA CMS-TYPE: 105P X-CMS-RootMailID: 20200318111813epcas5p126d7b871b194385099e8f71f2461303e References: <20200318111144.39525-1-alim.akhtar@samsung.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adding dt node foe UFS and UFS-PHY for exynos7 SoC. Signed-off-by: Alim Akhtar --- .../boot/dts/exynos/exynos7-espresso.dts | 16 +++++++ arch/arm64/boot/dts/exynos/exynos7.dtsi | 43 ++++++++++++++++++- 2 files changed, 57 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index 7af288fa9475..b59a0a32620a 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -406,6 +406,22 @@ }; }; +&ufs { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; + ufs,pwr-attr-mode = "FAST"; + ufs,pwr-attr-lane = <2>; + ufs,pwr-attr-gear = <2>; + ufs,pwr-attr-hs-series = "HS_rate_b"; + ufs-rx-adv-fine-gran-sup_en = <1>; + ufs-rx-adv-fine-gran-step = <3>; + ufs-rx-adv-min-activate-time-cap = <9>; + ufs-pa-granularity = <6>; + ufs-pa-tacctivate = <3>; + ufs-pa-hibern8time = <20>; +}; + &usbdrd_phy { vbus-supply = <&usb30_vbus_reg>; vbus-boost-supply = <&usb3drd_boost_5v>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 5558045637ac..9d16c90edd07 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -220,9 +220,14 @@ #clock-cells = <1>; clocks = <&fin_pll>, <&clock_top1 DOUT_ACLK_FSYS1_200>, <&clock_top1 DOUT_SCLK_MMC0>, - <&clock_top1 DOUT_SCLK_MMC1>; + <&clock_top1 DOUT_SCLK_MMC1>, + <&clock_top1 DOUT_SCLK_UFSUNIPRO20>, + <&clock_top1 DOUT_SCLK_PHY_FSYS1>, + <&clock_top1 DOUT_SCLK_PHY_FSYS1_26M>; clock-names = "fin_pll", "dout_aclk_fsys1_200", - "dout_sclk_mmc0", "dout_sclk_mmc1"; + "dout_sclk_mmc0", "dout_sclk_mmc1", + "dout_sclk_ufsunipro20", "dout_sclk_phy_fsys1", + "dout_sclk_phy_fsys1_26m"; }; serial_0: serial@13630000 { @@ -601,6 +606,40 @@ }; }; + ufs: ufs@15570000 { + compatible = "samsung,exynos7-ufs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = <0x15570000 0x100>, /* 0: HCI standard */ + <0x15570100 0x100>, /* 1: Vendor specificed */ + <0x15571000 0x200>, /* 2: UNIPRO */ + <0x15572000 0x300>; /* 3: UFS protector */ + reg-names = "hci", "vs_hci", "unipro", "ufsp"; + interrupts = ; + clocks = <&clock_fsys1 ACLK_UFS20_LINK>, + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; + clock-names = "core_clk", "sclk_unipro_main"; + freq-table-hz = <0 0>, <0 0>; + pclk-freq-avail-range = <70000000 133000000>; + ufs,pwr-local-l2-timer = <8000 28000 20000>; + ufs,pwr-remote-l2-timer = <12000 32000 16000>; + phys = <&ufs_phy>; + phy-names = "ufs-phy"; + status = "disabled"; + }; + + ufs_phy: ufs-phy@0x15571800 { + compatible = "samsung,exynos7-ufs-phy"; + reg = <0x15571800 0x240>; + reg-names = "phy-pma"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + clocks = <&clock_fsys1 MOUT_FSYS1_PHYCLK_SEL1>, + <&clock_top1 CLK_SCLK_PHY_FSYS1_26M>; + clock-names = "ref_clk_parent", "ref_clk"; + }; + usbdrd_phy: phy@15500000 { compatible = "samsung,exynos7-usbdrd-phy"; reg = <0x15500000 0x100>;