From patchwork Thu Mar 19 05:38:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 203113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8978DC4332B for ; Thu, 19 Mar 2020 05:40:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 61AF320724 for ; Thu, 19 Mar 2020 05:40:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="FFUErapf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727031AbgCSFkn (ORCPT ); Thu, 19 Mar 2020 01:40:43 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:44334 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727023AbgCSFkn (ORCPT ); Thu, 19 Mar 2020 01:40:43 -0400 Received: by mail-pg1-f194.google.com with SMTP id 37so617260pgm.11 for ; Wed, 18 Mar 2020 22:40:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VjRbI/Qcy2ZipTYHWuUTokoOEV5DVKKVy86kR+PhWiE=; b=FFUErapf5Y2xQAQXCjZUnjfCRN0y0A0wXHXw/sJjUknTYFS2v99P/qu6S388LrmOBm WLQv+cq5ggJaBRDLDscsPzceMAR4Ms8QpkQ2bX8IBLhuFHBxHfIPq1m2LbgMU4MM1by+ NUPMaf8roA6uBTCE3QIQs1E4S6LoODWGK7/yl06GM+eQ75gKvAWjElYhZ6WYdomNYDxg XJHKMLQDANCKHRwGmr6mUwcaTQOpMDyIggWwmZmDx0Mesp/M8ucO9QmwOTm3oG8IUdxT C+bR2+rPRQYoK3OofEwW0JSBzL1nrf90wfYGe3UDT2fWVttqFZcBgDkUAYwdb++3iwVJ 9JXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VjRbI/Qcy2ZipTYHWuUTokoOEV5DVKKVy86kR+PhWiE=; b=lQ169lktg9b5FGJLrfF8XB+Vg/D5bovxaVBrxsZJtQenZWCpRquZ2oXXcojQDmBeIF YCOoNf3ADwgxPt14Viau1pGKsxQpWO4SuzcyH5DSpqUvs6pFZTZgbawF0efuI8TriU9I A8WqVKuv/UyQ1//iEtRtzeWFj7u6lUpCG5Px65/3nm26ycsw4MU/Z4q1L0BAdK4olyVS 95yfiCk80ksUVpjmcFsWD4XKl1c3/6rr0KEF4HjfGCLcv8FfjhGK2O0TY0mlhX8BIdue 8VXCniLfatY4DkNiYlJe/nlIWv1XiRP4UjXwsPhjH0wfNjUzOlfF4MZ9otTzZ47kTmvy v+2w== X-Gm-Message-State: ANhLgQ0c50G8rpHv4HB5Ps7r+dKznrafDQP71qPrqv58Fc9ownS7suin RJlyy9MotrbuFlLpEiXjfRi7PA== X-Google-Smtp-Source: ADFU+vvvpauezbIT9XfVdGer93wUikobvBaeW9uRALrfaX66+M/F4eSbIFlcahvLdahCTb5waovbRA== X-Received: by 2002:aa7:8ec1:: with SMTP id b1mr2136428pfr.125.1584596442589; Wed, 18 Mar 2020 22:40:42 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:41 -0700 (PDT) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd Cc: Andy Gross , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 1/4] clk: qcom: gdsc: Handle GDSC regulator supplies Date: Wed, 18 Mar 2020 22:38:59 -0700 Message-Id: <20200319053902.3415984-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Certain GDSCs, such as the GPU_GX on MSM8996, requires that the upstream regulator supply is powered in order to be turned on. It's not guaranteed that the bootloader will leave these supplies on and the driver core will attempt to enable any GDSCs before allowing the individual drivers to probe defer on the PMIC regulator driver not yet being present. So the gdsc driver needs to be made aware of supplying regulators and probe defer on their absence, and it needs to enable and disable the regulator accordingly. Voltage adjustments of the supplying regulator are deferred to the client drivers themselves. Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/gdsc.c | 24 ++++++++++++++++++++++++ drivers/clk/qcom/gdsc.h | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index a250f59708d8..3528789cc9d0 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "gdsc.h" #define PWR_ON_MASK BIT(31) @@ -112,6 +113,12 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) int ret; u32 val = (status == GDSC_ON) ? 0 : SW_COLLAPSE_MASK; + if (status == GDSC_ON && sc->rsupply) { + ret = regulator_enable(sc->rsupply); + if (ret < 0) + return ret; + } + ret = regmap_update_bits(sc->regmap, sc->gdscr, SW_COLLAPSE_MASK, val); if (ret) return ret; @@ -143,6 +150,13 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) ret = gdsc_poll_status(sc, status); WARN(ret, "%s status stuck at 'o%s'", sc->pd.name, status ? "ff" : "n"); + + if (!ret && status == GDSC_OFF && sc->rsupply) { + ret = regulator_disable(sc->rsupply); + if (ret < 0) + return ret; + } + return ret; } @@ -371,6 +385,16 @@ int gdsc_register(struct gdsc_desc *desc, if (!data->domains) return -ENOMEM; + /* Resolve any regulator supplies */ + for (i = 0; i < num; i++) { + if (!scs[i] || !scs[i]->supply) + continue; + + scs[i]->rsupply = devm_regulator_get(dev, scs[i]->supply); + if (IS_ERR(scs[i]->rsupply)) + return PTR_ERR(scs[i]->rsupply); + } + data->num_domains = num; for (i = 0; i < num; i++) { if (!scs[i]) diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 64cdc8cf0d4d..c36fc26dcdff 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -10,6 +10,7 @@ #include struct regmap; +struct regulator; struct reset_controller_dev; /** @@ -52,6 +53,9 @@ struct gdsc { struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; + + const char *supply; + struct regulator *rsupply; }; struct gdsc_desc { From patchwork Thu Mar 19 05:39:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 203112 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E95F8C4332D for ; Thu, 19 Mar 2020 05:40:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C29EA2072D for ; Thu, 19 Mar 2020 05:40:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="X53gtvJL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727183AbgCSFkx (ORCPT ); Thu, 19 Mar 2020 01:40:53 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:35873 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727149AbgCSFkw (ORCPT ); Thu, 19 Mar 2020 01:40:52 -0400 Received: by mail-pl1-f193.google.com with SMTP id g2so574915plo.3 for ; Wed, 18 Mar 2020 22:40:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DwffIuMpvk4MGqf+N9hfygy8Mho+4EUVsVCSokGeAQw=; b=X53gtvJLmWBUrskrgljJXYHsNsA8qA7LLIjZjGx/ddYmqslDXrqXaEZJCj2qZWkTb9 CpypERtzO85ih/v5b6/6ZC+0zhqOSCD3I9UNaFZiwwIdNffhPq1cAT7nPidTHZOMyHKT WM7vJFaWjdnwV/0PgMs89NSnqn/Jb5jiSe9inOaXf80SsfP/kDso2RyiF+HHEoCEm1k7 ywpPjIP4fMNCeiBWJ1u/C4foUCnOjKSO4XcU9u4WqY+Y2Pfc6N7BOI9koVnOVy6c0yEq wCrkeqOSVgWTtRJMziShLlsQbPuoqXSdmizzw/+wlhCC3V4VRNKB0QM1E4o9O/6tLw8K V5MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DwffIuMpvk4MGqf+N9hfygy8Mho+4EUVsVCSokGeAQw=; b=F8lrzrANantWRraf2ZvFKr3uLgdf/JIT1sP4pDs7hf/ceJyR4uP8zgSvE7i01lVUFY pz+a2IiC0KyHgqzE9g/SmlrOyiD4DptppzC9iLMnrRilL193D0K50SlIdIkRZqwTtYim /DAj9Q3NDt0eFjCk/oCEcaQmVRLF5yEzaUBuRrwdq7TzvkOZCm7OIIPvrRW8UjEMwkY5 VGRJNyTlx1EAmzDfNfB3fFum4bEpHcJZUNI2zhAWPnwKqaTLgr6LD7JcrIRp8jblWDH7 dA83t2W8abbYOUlrbsqpleuqxeRRtCfnV1BdyMHGGDf8bYcX3FTHedZRu7BPeLERktPc t3GQ== X-Gm-Message-State: ANhLgQ38rehOindwt8yY1wKaYlV22I9y2MMUdZNilUO6YwueAQRFm32t iCXJASdXiR/ODnvpGCew/HJupw== X-Google-Smtp-Source: ADFU+vu9i8jbX+n972WNpB0F25HnwNcSfJC5HNFNCANPQazM0JhMj0i565gk6eYk+vMAwS88xlSXpQ== X-Received: by 2002:a17:90a:1954:: with SMTP id 20mr2110292pjh.106.1584596445739; Wed, 18 Mar 2020 22:40:45 -0700 (PDT) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id l125sm229126pgl.57.2020.03.18.22.40.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Mar 2020 22:40:44 -0700 (PDT) From: Bjorn Andersson To: Andy Gross , Bjorn Andersson , Rob Herring Cc: Michael Turquette , Stephen Boyd , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Clark Subject: [PATCH 3/4] arm64: dts: qcom: db820c: Add s2 regulator in pmi8994 Date: Wed, 18 Mar 2020 22:39:01 -0700 Message-Id: <20200319053902.3415984-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200319053902.3415984-1-bjorn.andersson@linaro.org> References: <20200319053902.3415984-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rajendra Nayak Add the SPMI regulator node in the PMI8994, use it to give us VDD_GX at a fixed max nominal voltage for the db820c and specify this as supply for the MMSS GPU_GX GDSC. With the introduction of CPR support the range for VDD_GX should be expanded. Signed-off-by: Rajendra Nayak [bjorn: Split between pmi8994 and db820c, changed voltage, rewrote commit message] Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 14 ++++++++++++++ arch/arm64/boot/dts/qcom/pmi8994.dtsi | 6 ++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi index 4692b7ad16b7..075cebaec3f3 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi @@ -251,6 +251,10 @@ &mdss { status = "okay"; }; +&mmcc { + vdd_gfx-supply = <&vdd_gfx>; +}; + &msmgpio { gpio-line-names = "[SPI0_DOUT]", /* GPIO_0, BLSP1_SPI_MOSI, LSEC pin 14 */ @@ -688,6 +692,16 @@ pinconf { }; }; + +&pmi8994_spmi_regulators { + vdd_gfx: s2@1700 { + reg = <0x1700 0x100>; + regulator-name = "VDD_GFX"; + regulator-min-microvolt = <980000>; + regulator-max-microvolt = <980000>; + }; +}; + &rpm_requests { pm8994-regulators { compatible = "qcom,rpm-pm8994-regulators"; diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi b/arch/arm64/boot/dts/qcom/pmi8994.dtsi index 21e05215abe4..e5ed28ab9b2d 100644 --- a/arch/arm64/boot/dts/qcom/pmi8994.dtsi +++ b/arch/arm64/boot/dts/qcom/pmi8994.dtsi @@ -26,5 +26,11 @@ pmic@3 { reg = <0x3 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; + + pmi8994_spmi_regulators: regulators { + compatible = "qcom,pmi8994-regulators"; + #address-cells = <1>; + #size-cells = <1>; + }; }; };