From patchwork Wed Mar 25 15:38:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202825 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC21EC54FD3 for ; Wed, 25 Mar 2020 15:40:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D3E112073E for ; Wed, 25 Mar 2020 15:40:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727833AbgCYPj0 (ORCPT ); Wed, 25 Mar 2020 11:39:26 -0400 Received: from inva020.nxp.com ([92.121.34.13]:52820 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727702AbgCYPj0 (ORCPT ); Wed, 25 Mar 2020 11:39:26 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id DA4AE1A04EA; Wed, 25 Mar 2020 16:39:24 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id CD1571A00F9; Wed, 25 Mar 2020 16:39:24 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 244D8203CE; Wed, 25 Mar 2020 16:39:24 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 02/13] Documentation: mfd: Add DT bindings for i.MX Audiomix Date: Wed, 25 Mar 2020 17:38:40 +0200 Message-Id: <1585150731-3354-3-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The i.MX Audiomix is a mix of clock gates, reset bits and some other i.MX audio specific functionalities. Add information for the MFD, its clock and reset controllers. Signed-off-by: Abel Vesa --- .../devicetree/bindings/mfd/fsl,imx-audiomix.txt | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx-audiomix.txt diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx-audiomix.txt b/Documentation/devicetree/bindings/mfd/fsl,imx-audiomix.txt new file mode 100644 index 00000000..1622818 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/fsl,imx-audiomix.txt @@ -0,0 +1,34 @@ +Freescale i.MX Audiomix +====================================== + +Audiomix is a conglomerate of different functionalities. + +Required properties: +- compatible: Should be "fsl,-mix" for the MFD device + Should be"fsl,-audiomix-clk" for the clock controller + Should be"fsl,-audiomix-reset" for the reset controller + Some functionalities of the audiomix will be registered as syscon. +- reg: should be register base and length as documented in the + datasheet + +example: + audiomix: audiomix@30e20000 { + compatible = "fsl,imx8mp-mix"; + reg = <0x30e20000 0x10000>; + + audiomix_clk: clock-controller { + compatible = "fsl,imx8mp-audiomix-clk"; + #clock-cells = <1>; + clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>, + <&clk IMX8MP_CLK_AUDIO_AHB>, + <&clk IMX8MP_CLK_AUDIO_AXI_DIV>; + clock-names = "audio_root", + "audio_ahb", + "audio_axi_div"; + }; + + audiomix_reset: reset-controller { + compatible = "fsl,imx8mp-audiomix-reset"; + #reset-cells = <1>; + }; + }; From patchwork Wed Mar 25 15:38:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202826 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D656CC54FCF for ; Wed, 25 Mar 2020 15:40:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B4A852077D for ; Wed, 25 Mar 2020 15:40:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727875AbgCYPj2 (ORCPT ); Wed, 25 Mar 2020 11:39:28 -0400 Received: from inva021.nxp.com ([92.121.34.21]:53380 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727837AbgCYPj2 (ORCPT ); Wed, 25 Mar 2020 11:39:28 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6BD2520056B; Wed, 25 Mar 2020 16:39:26 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5E59C20055D; Wed, 25 Mar 2020 16:39:26 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 9FC08203CE; Wed, 25 Mar 2020 16:39:25 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 04/13] arm64: dts: imx8mp: Add audiomix node Date: Wed, 25 Mar 2020 17:38:42 +0200 Message-Id: <1585150731-3354-5-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Audiomix is a mix of multiple functionalities controlled by the audio IPs. In order to split the functionality between the rightfull drivers, it will be probled by the imx-mix MFD driver. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index c08156f..3e4c376 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -655,6 +655,11 @@ #address-cells = <1>; #size-cells = <1>; ranges; + + audiomix: audiomix@30e20000 { + compatible = "fsl,imx8mp-mix"; + reg = <0x30e20000 0x10000>; + }; }; gic: interrupt-controller@38800000 { From patchwork Wed Mar 25 15:38:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FBB1C1975A for ; Wed, 25 Mar 2020 15:40:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 86B972073E for ; Wed, 25 Mar 2020 15:40:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727766AbgCYPkG (ORCPT ); Wed, 25 Mar 2020 11:40:06 -0400 Received: from inva021.nxp.com ([92.121.34.21]:53400 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727702AbgCYPj3 (ORCPT ); Wed, 25 Mar 2020 11:39:29 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 30559200561; Wed, 25 Mar 2020 16:39:27 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2254120055D; Wed, 25 Mar 2020 16:39:27 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 6DA31203CE; Wed, 25 Mar 2020 16:39:26 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 05/13] clk: imx: gate2: Allow single bit gating clock Date: Wed, 25 Mar 2020 17:38:43 +0200 Message-Id: <1585150731-3354-6-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Audiomix on i.MX8MP registers two gates that share the same enable count but use the same bit to control the gate instead of two bits. By adding the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic gate ops for enable, disable and is_enabled. For the disable_unused, nothing happens if this flag is specified. Signed-off-by: Abel Vesa --- drivers/clk/imx/clk-gate2.c | 31 +++++++++++++++++++++++-------- drivers/clk/imx/clk.h | 13 +++++++++++++ 2 files changed, 36 insertions(+), 8 deletions(-) diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c index ce0060e..b87ab3c 100644 --- a/drivers/clk/imx/clk-gate2.c +++ b/drivers/clk/imx/clk-gate2.c @@ -41,21 +41,26 @@ static int clk_gate2_enable(struct clk_hw *hw) struct clk_gate2 *gate = to_clk_gate2(hw); u32 reg; unsigned long flags; + int ret = 0; spin_lock_irqsave(gate->lock, flags); if (gate->share_count && (*gate->share_count)++ > 0) goto out; - reg = readl(gate->reg); - reg &= ~(3 << gate->bit_idx); - reg |= gate->cgr_val << gate->bit_idx; - writel(reg, gate->reg); + if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) { + ret = clk_gate_ops.enable(hw); + } else { + reg = readl(gate->reg); + reg &= ~(3 << gate->bit_idx); + reg |= gate->cgr_val << gate->bit_idx; + writel(reg, gate->reg); + } out: spin_unlock_irqrestore(gate->lock, flags); - return 0; + return ret; } static void clk_gate2_disable(struct clk_hw *hw) @@ -73,9 +78,13 @@ static void clk_gate2_disable(struct clk_hw *hw) goto out; } - reg = readl(gate->reg); - reg &= ~(3 << gate->bit_idx); - writel(reg, gate->reg); + if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) { + clk_gate_ops.disable(hw); + } else { + reg = readl(gate->reg); + reg &= ~(3 << gate->bit_idx); + writel(reg, gate->reg); + } out: spin_unlock_irqrestore(gate->lock, flags); @@ -95,6 +104,9 @@ static int clk_gate2_is_enabled(struct clk_hw *hw) { struct clk_gate2 *gate = to_clk_gate2(hw); + if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) + return clk_gate_ops.is_enabled(hw); + return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx); } @@ -104,6 +116,9 @@ static void clk_gate2_disable_unused(struct clk_hw *hw) unsigned long flags; u32 reg; + if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) + return; + spin_lock_irqsave(gate->lock, flags); if (!gate->share_count || *gate->share_count == 0) { diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index f074dd8..01ff1db 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -5,6 +5,8 @@ #include #include +#define IMX_CLK_GATE2_SINGLE_BIT 1 + extern spinlock_t imx_ccm_lock; void imx_check_clocks(struct clk *clks[], unsigned int count); @@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name, &imx_ccm_lock, share_count); } +static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev, + const char *name, const char *parent, + void __iomem *reg, u8 shift, + unsigned int *share_count) +{ + return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | + CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, + IMX_CLK_GATE2_SINGLE_BIT, + &imx_ccm_lock, share_count); +} + static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) { From patchwork Wed Mar 25 15:38:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 171A8C54FD3 for ; Wed, 25 Mar 2020 15:40:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0079F20774 for ; Wed, 25 Mar 2020 15:40:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727909AbgCYPjb (ORCPT ); Wed, 25 Mar 2020 11:39:31 -0400 Received: from inva021.nxp.com ([92.121.34.21]:53442 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727881AbgCYPjb (ORCPT ); Wed, 25 Mar 2020 11:39:31 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A9CBD20056D; Wed, 25 Mar 2020 16:39:28 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 9CC8120055D; Wed, 25 Mar 2020 16:39:28 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id E8CAF203CE; Wed, 25 Mar 2020 16:39:27 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 07/13] clk: imx: Add helpers for passing the device as argument Date: Wed, 25 Mar 2020 17:38:45 +0200 Message-Id: <1585150731-3354-8-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org All the imx clocks that need to be registered by the audiomix need to pass on the device so that the runtime PM support could work properly. Signed-off-by: Abel Vesa Reviewed-by: Stephen Boyd Reviewed-by: Peng Fan --- drivers/clk/imx/clk.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index fcd9952a..b91b1b1 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -319,6 +319,13 @@ static inline struct clk_hw *imx_clk_hw_gate(const char *name, const char *paren shift, 0, &imx_ccm_lock); } +static inline struct clk_hw *imx_dev_clk_hw_gate(struct device *dev, const char *name, + const char *parent, void __iomem *reg, u8 shift) +{ + return clk_hw_register_gate(dev, name, parent, CLK_SET_RATE_PARENT, reg, + shift, 0, &imx_ccm_lock); +} + static inline struct clk_hw *imx_clk_hw_gate_dis(const char *name, const char *parent, void __iomem *reg, u8 shift) { @@ -431,6 +438,15 @@ static inline struct clk_hw *imx_clk_hw_mux(const char *name, void __iomem *reg, width, 0, &imx_ccm_lock); } +static inline struct clk_hw *imx_dev_clk_hw_mux(struct device *dev, + const char *name, void __iomem *reg, u8 shift, + u8 width, const char * const *parents, int num_parents) +{ + return clk_hw_register_mux(dev, name, parents, num_parents, + CLK_SET_RATE_NO_REPARENT | CLK_SET_PARENT_GATE, + reg, shift, width, 0, &imx_ccm_lock); +} + static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents) @@ -493,6 +509,19 @@ static inline struct clk_hw *imx_clk_hw_mux_flags(const char *name, reg, shift, width, 0, &imx_ccm_lock); } +static inline struct clk_hw *imx_dev_clk_hw_mux_flags(struct device *dev, + const char *name, + void __iomem *reg, u8 shift, + u8 width, + const char * const *parents, + int num_parents, + unsigned long flags) +{ + return clk_hw_register_mux(dev, name, parents, num_parents, + flags | CLK_SET_RATE_NO_REPARENT, + reg, shift, width, 0, &imx_ccm_lock); +} + struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name, struct clk *div, struct clk *mux, struct clk *pll, struct clk *step); From patchwork Wed Mar 25 15:38:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UPPERCASE_50_75,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC4AAC54FD0 for ; Wed, 25 Mar 2020 15:40:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A3B382077D for ; Wed, 25 Mar 2020 15:40:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727977AbgCYPjp (ORCPT ); Wed, 25 Mar 2020 11:39:45 -0400 Received: from inva020.nxp.com ([92.121.34.13]:52872 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727834AbgCYPjc (ORCPT ); Wed, 25 Mar 2020 11:39:32 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A6F371A04FA; Wed, 25 Mar 2020 16:39:29 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 99C871A00F9; Wed, 25 Mar 2020 16:39:29 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id ABF66203CE; Wed, 25 Mar 2020 16:39:28 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 08/13] dt-bindings: clocks: imx8mp: Add ids for audiomix clocks Date: Wed, 25 Mar 2020 17:38:46 +0200 Message-Id: <1585150731-3354-9-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add all the clock ids for the audiomix clocks. Signed-off-by: Abel Vesa Acked-by: Rob Herring Reviewed-by: Stephen Boyd --- include/dt-bindings/clock/imx8mp-clock.h | 62 ++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 47ab082..305433f 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -298,4 +298,66 @@ #define IMX8MP_CLK_END 289 +#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 +#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 +#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2 2 +#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3 3 +#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG 4 +#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1 5 +#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2 6 +#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3 7 +#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG 8 +#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1 9 +#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2 10 +#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3 11 +#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG 12 +#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1 13 +#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2 14 +#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3 15 +#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG 16 +#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1 17 +#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2 18 +#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3 19 +#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG 20 +#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1 21 +#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2 22 +#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23 +#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG 24 +#define IMX8MP_CLK_AUDIOMIX_PDM_IPG 25 +#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26 +#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27 +#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28 +#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT 29 +#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT 30 +#define IMX8MP_CLK_AUDIOMIX_EARC_IPG 31 +#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG 32 +#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG 33 +#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT 34 +#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT 35 +#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT 36 +#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT 37 +#define IMX8MP_CLK_AUDIOMIX_EARC_PHY 38 +#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT 39 +#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40 +#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41 +#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42 +#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL 43 +#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL 44 +#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL 45 +#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL 46 +#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL 47 +#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL 48 +#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL 49 +#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL 50 +#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL 51 +#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL 52 +#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL 53 +#define IMX8MP_CLK_AUDIOMIX_PDM_SEL 54 +#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL 55 +#define IMX8MP_CLK_AUDIOMIX_SAI_PLL 56 +#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS 57 +#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT 58 + +#define IMX8MP_CLK_AUDIOMIX_END 59 + #endif From patchwork Wed Mar 25 15:38:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DADBC54FD5 for ; Wed, 25 Mar 2020 15:39:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 300A520740 for ; Wed, 25 Mar 2020 15:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727968AbgCYPjp (ORCPT ); Wed, 25 Mar 2020 11:39:45 -0400 Received: from inva021.nxp.com ([92.121.34.21]:53472 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727903AbgCYPjc (ORCPT ); Wed, 25 Mar 2020 11:39:32 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6B560200558; Wed, 25 Mar 2020 16:39:30 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5CF1D2000D4; Wed, 25 Mar 2020 16:39:30 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id A7F37203CE; Wed, 25 Mar 2020 16:39:29 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 09/13] clk: imx: Add audiomix clock controller support Date: Wed, 25 Mar 2020 17:38:47 +0200 Message-Id: <1585150731-3354-10-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The imx-mix MFD driver registers some devices, one of which, in case of audiomix, maps correctly to a clock controller type. This driver registers a clock controller for that. Signed-off-by: Abel Vesa --- drivers/clk/imx/Makefile | 2 +- drivers/clk/imx/clk-audiomix.c | 228 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 229 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-audiomix.c diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile index 928f874c..afa54c1 100644 --- a/drivers/clk/imx/Makefile +++ b/drivers/clk/imx/Makefile @@ -27,7 +27,7 @@ obj-$(CONFIG_MXC_CLK_SCU) += \ obj-$(CONFIG_CLK_IMX8MM) += clk-imx8mm.o obj-$(CONFIG_CLK_IMX8MN) += clk-imx8mn.o -obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o +obj-$(CONFIG_CLK_IMX8MP) += clk-imx8mp.o clk-audiomix.o obj-$(CONFIG_CLK_IMX8MQ) += clk-imx8mq.o obj-$(CONFIG_CLK_IMX8QXP) += clk-imx8qxp.o clk-imx8qxp-lpcg.o diff --git a/drivers/clk/imx/clk-audiomix.c b/drivers/clk/imx/clk-audiomix.c new file mode 100644 index 00000000..5119b3c --- /dev/null +++ b/drivers/clk/imx/clk-audiomix.c @@ -0,0 +1,228 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2019 NXP. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static int shared_count_pdm; +static struct clk_hw **hws; +static struct clk_hw_onecell_data *clk_hw_data; +static uint32_t audiomix_clk_saved_regs[14]; +static struct clk *clk_audio_root; +static struct clk *clk_audio_ahb; +static struct clk *clk_audio_axi_div; + +static const struct imx_pll14xx_rate_table imx_audiomix_sai_pll_tbl[] = { + PLL_1443X_RATE(650000000U, 325, 3, 2, 0), +}; + +static const struct imx_pll14xx_clk imx_audiomix_sai_pll = { + .type = PLL_1443X, + .rate_table = imx_audiomix_sai_pll_tbl, +}; + +static const char * const imx_sai_mclk2_sels[] = {"sai1", "sai2", "sai3", "dummy", + "sai5", "sai6", "sai7", "dummy", + "dummy", "dummy", "dummy", + "dummy", "dummy", "dummy", "dummy"}; +static const char * const imx_sai1_mclk1_sels[] = {"sai1", "dummy", }; +static const char * const imx_sai2_mclk1_sels[] = {"sai2", "dummy", }; +static const char * const imx_sai3_mclk1_sels[] = {"sai3", "dummy", }; +static const char * const imx_sai5_mclk1_sels[] = {"sai5", "dummy", }; +static const char * const imx_sai6_mclk1_sels[] = {"sai6", "dummy", }; +static const char * const imx_sai7_mclk1_sels[] = {"sai7", "dummy", }; +static const char * const imx_pdm_sels[] = {"pdm", "sai_pll_div2", "dummy", "dummy" }; +static const char * const imx_sai_pll_ref_sels[] = {"osc_24m", "dummy", "dummy", "dummy", }; +static const char * const imx_sai_pll_bypass_sels[] = {"sai_pll", "sai_pll_ref_sel", }; + +static void __imx_audiomix_clk_read_write(int reg, void __iomem *addr, + bool write) +{ + if (write) + writel(audiomix_clk_saved_regs[reg], addr); + else + audiomix_clk_saved_regs[reg] = readl(addr); +} + +static void imx_audiomix_clk_read_write(struct device *dev, bool write) +{ + void __iomem *base; + int i, offset; + + base = dev_get_drvdata(dev->parent); + + for (i = offset = 0; i < 2; i++, offset += 4) + __imx_audiomix_clk_read_write(i, base + offset, write); + + for (offset = 0x300; i < 9; i++, offset += 4) + __imx_audiomix_clk_read_write(i, base + offset, write); + + for (offset = 0x400; i < 14; i++, offset += 4) + __imx_audiomix_clk_read_write(i, base + offset, write); + +} + +static int imx_audiomix_clk_suspend(struct device *dev) +{ + imx_audiomix_clk_read_write(dev, false); + + clk_disable_unprepare(clk_audio_ahb); + clk_disable_unprepare(clk_audio_root); + clk_disable_unprepare(clk_audio_axi_div); + pm_runtime_put(dev); + + return 0; +} + +static int imx_audiomix_clk_resume(struct device *dev) +{ + pm_runtime_get(dev); + clk_prepare_enable(clk_audio_ahb); + clk_prepare_enable(clk_audio_root); + clk_prepare_enable(clk_audio_axi_div); + + imx_audiomix_clk_read_write(dev, true); + + return 0; +} + +static int imx_audiomix_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + void __iomem *base; + + clk_audio_root = devm_clk_get(dev, "audio_root"); + if (IS_ERR(clk_audio_root)) + return PTR_ERR(clk_audio_root); + + clk_audio_ahb = devm_clk_get(dev, "audio_ahb"); + if (IS_ERR(clk_audio_ahb)) + return PTR_ERR(clk_audio_ahb); + + clk_audio_axi_div = devm_clk_get(dev, "audio_axi_div"); + if (IS_ERR(clk_audio_axi_div)) + return PTR_ERR(clk_audio_axi_div); + + base = dev_get_drvdata(dev->parent); + if (IS_ERR(base)) + return PTR_ERR(base); + + clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, + IMX8MP_CLK_AUDIOMIX_END), GFP_KERNEL); + if (WARN_ON(!clk_hw_data)) + return -ENOMEM; + + clk_hw_data->num = IMX8MP_CLK_AUDIOMIX_END; + hws = clk_hw_data->hws; + + pm_runtime_enable(dev); + + hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL] = imx_dev_clk_hw_mux(dev, "sai_pll_ref_sel", base + 0x400, 0, 2, imx_sai_pll_ref_sels, ARRAY_SIZE(imx_sai_pll_ref_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL] = imx_dev_clk_hw_pll14xx(dev, "sai_pll", "sai_pll_ref_sel", base + 0x400, &imx_audiomix_sai_pll); + + hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = imx_dev_clk_hw_mux_flags(dev, "sai_pll_bypass", base + 0x400, 4, 1, imx_sai_pll_bypass_sels, ARRAY_SIZE(imx_sai_pll_bypass_sels), CLK_SET_RATE_PARENT); + + hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = imx_dev_clk_hw_gate(dev, "sai_pll_out", "sai_pll_bypass", base + 0x400, 13); + + hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai1_mclk1_sel", base + 0x300, 0, 1, imx_sai1_mclk1_sels, ARRAY_SIZE(imx_sai1_mclk1_sels), CLK_SET_RATE_PARENT); + hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai1_mclk2_sel", base + 0x300, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai2_mclk1_sel", base + 0x304, 0, 1, imx_sai2_mclk1_sels, ARRAY_SIZE(imx_sai2_mclk1_sels), CLK_SET_RATE_PARENT); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai2_mclk2_sel", base + 0x304, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL] = imx_dev_clk_hw_mux_flags(dev, "sai3_mclk1_sel", base + 0x308, 0, 1, imx_sai3_mclk1_sels, ARRAY_SIZE(imx_sai3_mclk1_sels), CLK_SET_RATE_PARENT); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai3_mclk2_sel", base + 0x308, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai5_mclk1_sel", base + 0x30C, 0, 1, imx_sai5_mclk1_sels, ARRAY_SIZE(imx_sai5_mclk1_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai5_mclk2_sel", base + 0x30C, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai6_mclk1_sel", base + 0x310, 0, 1, imx_sai6_mclk1_sels, ARRAY_SIZE(imx_sai6_mclk1_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai6_mclk2_sel", base + 0x310, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL] = imx_dev_clk_hw_mux(dev, "sai7_mclk1_sel", base + 0x314, 0, 1, imx_sai7_mclk1_sels, ARRAY_SIZE(imx_sai7_mclk1_sels)); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL] = imx_dev_clk_hw_mux(dev, "sai7_mclk2_sel", base + 0x314, 1, 4, imx_sai_mclk2_sels, ARRAY_SIZE(imx_sai_mclk2_sels)); + + hws[IMX8MP_CLK_AUDIOMIX_SAI1_IPG] = imx_dev_clk_hw_gate(dev, "sai1_ipg_clk", "ipg_audio_root", base, 0); + hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1] = imx_dev_clk_hw_gate(dev, "sai1_mclk1_clk", "sai1_mclk1_sel", base, 1); + hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2] = imx_dev_clk_hw_gate(dev, "sai1_mclk2_clk", "sai1_mclk2_sel", base, 2); + hws[IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3] = imx_dev_clk_hw_gate(dev, "sai1_mclk3_clk", "sai_pll_out", base, 3); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_IPG] = imx_dev_clk_hw_gate(dev, "sai2_ipg_clk", "ipg_audio_root", base, 4); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1] = imx_dev_clk_hw_gate(dev, "sai2_mclk1_clk", "sai2_mclk1_sel", base, 5); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2] = imx_dev_clk_hw_gate(dev, "sai2_mclk2_clk", "sai2_mclk2_sel", base, 6); + hws[IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3] = imx_dev_clk_hw_gate(dev, "sai2_mclk3_clk", "sai_pll_out", base, 7); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_IPG] = imx_dev_clk_hw_gate(dev, "sai3_ipg_clk", "ipg_audio_root", base, 8); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1] = imx_dev_clk_hw_gate(dev, "sai3_mclk1_clk", "sai3_mclk1_sel", base, 9); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2] = imx_dev_clk_hw_gate(dev, "sai3_mclk2_clk", "sai3_mclk2_sel", base, 10); + hws[IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3] = imx_dev_clk_hw_gate(dev, "sai3_mclk3_clk", "sai_pll_out", base, 11); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_IPG] = imx_dev_clk_hw_gate(dev, "sai5_ipg_clk", "ipg_audio_root", base, 12); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1] = imx_dev_clk_hw_gate(dev, "sai5_mclk1_clk", "sai5_mclk1_sel", base, 13); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2] = imx_dev_clk_hw_gate(dev, "sai5_mclk2_clk", "sai5_mclk2_sel", base, 14); + hws[IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3] = imx_dev_clk_hw_gate(dev, "sai5_mclk3_clk", "sai_pll_out", base, 15); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_IPG] = imx_dev_clk_hw_gate(dev, "sai6_ipg_clk", "ipg_audio_root", base, 16); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1] = imx_dev_clk_hw_gate(dev, "sai6_mclk1_clk", "sai6_mclk1_sel", base, 17); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2] = imx_dev_clk_hw_gate(dev, "sai6_mclk2_clk", "sai6_mclk2_sel", base, 18); + hws[IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3] = imx_dev_clk_hw_gate(dev, "sai6_mclk3_clk", "sai_pll_out", base, 19); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_IPG] = imx_dev_clk_hw_gate(dev, "sai7_ipg_clk", "ipg_audio_root", base, 20); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1] = imx_dev_clk_hw_gate(dev, "sai7_mclk1_clk", "sai7_mclk1_sel", base, 21); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2] = imx_dev_clk_hw_gate(dev, "sai7_mclk2_clk", "sai7_mclk2_sel", base, 22); + hws[IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3] = imx_dev_clk_hw_gate(dev, "sai7_mclk3_clk", "sai_pll_out", base, 23); + hws[IMX8MP_CLK_AUDIOMIX_ASRC_IPG] = imx_dev_clk_hw_gate(dev, "asrc_ipg_clk", "ipg_audio_root", base, 24); + hws[IMX8MP_CLK_AUDIOMIX_PDM_IPG] = imx_dev_clk_hw_gate_shared(dev, "pdm_ipg_clk", "ipg_audio_root", base, 25, &shared_count_pdm); + hws[IMX8MP_CLK_AUDIOMIX_PDM_ROOT] = imx_dev_clk_hw_gate_shared(dev, "pdm_root_clk", "pdm", base, 25, &shared_count_pdm); + + hws[IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT] = imx_dev_clk_hw_gate(dev, "sdma2_root_clk", "ipg_audio_root", base, 26); + hws[IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT] = imx_dev_clk_hw_gate(dev, "sdma3_root_clk", "ipg_audio_root", base, 27); + hws[IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT] = imx_dev_clk_hw_gate(dev, "spba2_root_clk", "ipg_audio_root", base, 28); + hws[IMX8MP_CLK_AUDIOMIX_DSP_ROOT] = imx_dev_clk_hw_gate(dev, "dsp_root_clk", "ipg_audio_root", base, 29); + hws[IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT] = imx_dev_clk_hw_gate(dev, "dsp_dbg_clk", "ipg_audio_root", base, 30); + hws[IMX8MP_CLK_AUDIOMIX_EARC_IPG] = imx_dev_clk_hw_gate(dev, "earc_ipg_clk", "ipg_audio_root", base, 31); + + hws[IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG] = imx_dev_clk_hw_gate(dev, "ocram_a_ipg_clk", "ipg_audio_root", base + 4, 0); + hws[IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG] = imx_dev_clk_hw_gate(dev, "aud2htx_ipg_clk", "ipg_audio_root", base + 4, 1); + hws[IMX8MP_CLK_AUDIOMIX_EDMA_ROOT] = imx_dev_clk_hw_gate(dev, "edma_root_clk", "ipg_audio_root", base + 4, 2); + hws[IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT] = imx_dev_clk_hw_gate(dev, "aud_pll_clk", "ipg_audio_root", base + 4, 3); + hws[IMX8MP_CLK_AUDIOMIX_MU2_ROOT] = imx_dev_clk_hw_gate(dev, "mu2_root_clk", "ipg_audio_root", base + 4, 4); + hws[IMX8MP_CLK_AUDIOMIX_MU3_ROOT] = imx_dev_clk_hw_gate(dev, "mu3_root_clk", "ipg_audio_root", base + 4, 5); + hws[IMX8MP_CLK_AUDIOMIX_EARC_PHY] = imx_dev_clk_hw_gate(dev, "earc_phy_clk", "ipg_audio_root", base + 4, 6); + + hws[IMX8MP_CLK_AUDIOMIX_PDM_SEL] = imx_dev_clk_hw_mux(dev, "pdm_sel", base + 0x318, 1, 4, imx_pdm_sels, ARRAY_SIZE(imx_pdm_sels)); + + /* unbypass the pll */ + clk_hw_set_parent(hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS], + hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL]); + + imx_check_clk_hws(hws, IMX8MP_CLK_AUDIOMIX_END); + + of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, + clk_hw_data); + + return 0; +} + +UNIVERSAL_DEV_PM_OPS(imx_audiomix_clk_pm_ops, imx_audiomix_clk_suspend, + imx_audiomix_clk_resume, imx_audiomix_clk_resume); + +static const struct of_device_id imx_audiomix_clk_of_match[] = { + { .compatible = "fsl,imx8mp-audiomix-clk" }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx_audiomix_clk_of_match); + + +static struct platform_driver imx_audiomix_clk_driver = { + .probe = imx_audiomix_clk_probe, + .driver = { + .name = "imx-audiomix-clk", + .of_match_table = of_match_ptr(imx_audiomix_clk_of_match), + .pm = &imx_audiomix_clk_pm_ops, + }, +}; +module_platform_driver(imx_audiomix_clk_driver); From patchwork Wed Mar 25 15:38:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 202831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6084EC1975A for ; Wed, 25 Mar 2020 15:39:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48E3720740 for ; Wed, 25 Mar 2020 15:39:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727941AbgCYPjh (ORCPT ); Wed, 25 Mar 2020 11:39:37 -0400 Received: from inva020.nxp.com ([92.121.34.13]:52916 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727929AbgCYPje (ORCPT ); Wed, 25 Mar 2020 11:39:34 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 87BF31A0584; Wed, 25 Mar 2020 16:39:33 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 7B0881A0557; Wed, 25 Mar 2020 16:39:33 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id BD45A203CE; Wed, 25 Mar 2020 16:39:32 +0100 (CET) From: Abel Vesa To: Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam , Mike Turquette , Stephen Boyd , Lee Jones , Anson Huang , Leonard Crestez , Peng Fan , Jacky Bai , Philipp Zabel Cc: NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linux Kernel Mailing List , linux-clk@vger.kernel.org, Abel Vesa Subject: [PATCH v2 13/13] arm64: dts: imx8mp: Add audiomix reset controller node Date: Wed, 25 Mar 2020 17:38:51 +0200 Message-Id: <1585150731-3354-14-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> References: <1585150731-3354-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the audiomix reset controller as part of the audiomix MFD. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 03ace7f..882c91ff 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -670,6 +670,11 @@ "audio_ahb", "audio_axi_div"; }; + + audiomix_reset: reset-controller { + compatible = "fsl,imx8mp-audiomix-reset"; + #reset-cells = <1>; + }; }; };