From patchwork Sun Mar 29 17:35:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 202678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF34BC10F26 for ; Sun, 29 Mar 2020 17:36:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9141F2073E for ; Sun, 29 Mar 2020 17:36:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="NRWEiUWc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728529AbgC2Rgn (ORCPT ); Sun, 29 Mar 2020 13:36:43 -0400 Received: from mo4-p02-ob.smtp.rzone.de ([85.215.255.83]:12476 "EHLO mo4-p02-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728285AbgC2RgK (ORCPT ); Sun, 29 Mar 2020 13:36:10 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1585503366; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=Zg1B2MSlw8LBkeQrcB+SbHPflxN5qiikKNdtggvwHAA=; b=NRWEiUWc6buewPunl3ymSwFnhaLwWhtkGxTYzBZ7KNJpA3LvwjYMif4MkLTTqppEtF jNUjgmVmOy3FbrJPfizy4KjC+oF3S9xamG209PGfLABs0aeJH2OJrG7ctO52ujrB+vH6 fHWGQoGoCvAMx0Ugb28zoQyFZ2wAwGSM2a8ri/sbNfI9NKBAW4jfKKbesQLDyxNNefzf FYbx5/o16a5VT+FIwqUkBqiIF2m/f9MUbwu0/n2XvnN82+rakrOBjOu67aNpf+9lXWJj OCSoT8lrwpvphmkQ4mQQ6mKbO7+2bibOPoC6h/L6jDXorZ2qnFZNJ28khftdHiDQah0d 8Ihg== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNOsPj0pDz2rsNxxv" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 46.2.1 DYNA|AUTH) with ESMTPSA id m02241w2THZvBM8 (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sun, 29 Mar 2020 19:35:57 +0200 (CEST) From: "H. Nikolaus Schaller" To: Paul Cercueil , Paul Boddie , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , Linus Walleij , Andi Kleen , Krzysztof Kozlowski , Geert Uytterhoeven , "Eric W. Biederman" , "H. Nikolaus Schaller" , Miquel Raynal , Thomas Bogendoerfer , Kees Cook Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, letux-kernel@openphoenux.org, mips-creator-ci20-dev@googlegroups.com, Rob Herring Subject: [RFC v3 1/8] dt-bindings: display: convert ingenic, lcd.txt to ingenic, lcd.yaml Date: Sun, 29 Mar 2020 19:35:47 +0200 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org and add compatible: jz4780-lcd, including an example how to configure both lcd controllers. Also fix the clock names and examples. Based on work by Paul Cercueil and Sam Ravnborg Signed-off-by: H. Nikolaus Schaller Cc: Rob Herring Cc: devicetree@vger.kernel.org --- .../bindings/display/ingenic,lcd.txt | 45 ------ .../bindings/display/ingenic,lcd.yaml | 128 ++++++++++++++++++ 2 files changed, 128 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/ingenic,lcd.txt create mode 100644 Documentation/devicetree/bindings/display/ingenic,lcd.yaml diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.txt b/Documentation/devicetree/bindings/display/ingenic,lcd.txt deleted file mode 100644 index 01e3261defb6..000000000000 --- a/Documentation/devicetree/bindings/display/ingenic,lcd.txt +++ /dev/null @@ -1,45 +0,0 @@ -Ingenic JZ47xx LCD driver - -Required properties: -- compatible: one of: - * ingenic,jz4740-lcd - * ingenic,jz4725b-lcd - * ingenic,jz4770-lcd -- reg: LCD registers location and length -- clocks: LCD pixclock and device clock specifiers. - The device clock is only required on the JZ4740. -- clock-names: "lcd_pclk" and "lcd" -- interrupts: Specifies the interrupt line the LCD controller is connected to. - -Example: - -panel { - compatible = "sharp,ls020b1dd01d"; - - backlight = <&backlight>; - power-supply = <&vcc>; - - port { - panel_input: endpoint { - remote-endpoint = <&panel_output>; - }; - }; -}; - - -lcd: lcd-controller@13050000 { - compatible = "ingenic,jz4725b-lcd"; - reg = <0x13050000 0x1000>; - - interrupt-parent = <&intc>; - interrupts = <31>; - - clocks = <&cgu JZ4725B_CLK_LCD>; - clock-names = "lcd"; - - port { - panel_output: endpoint { - remote-endpoint = <&panel_input>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml new file mode 100644 index 000000000000..8b6467cfc191 --- /dev/null +++ b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/ingenic,lcd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for Ingenic JZ4780 LCD Controller + +maintainers: + - Paul Cercueil + +description: | + LCD Controller is the Display Controller for the Ingenic JZ47xx SoC + +properties: + compatible: + oneOf: + - const: ingenic,jz4725b-lcd + - const: ingenic,jz4740-lcd + - const: ingenic,jz4770-lcd + - const: ingenic,jz4780-lcd + + reg: + maxItems: 1 + description: LCD registers location and length + + interrupts: + maxItems: 1 + description: Specifies the interrupt provided by parent + + clocks: + maxItems: 2 + description: Clock specifiers for LCD pixclock and device clock. + The device clock is only required on the JZ4740 and JZ4780 + + clock-names: + items: + - const: lcd + - const: lcd_pclk + + port: + type: object + description: | + A port node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port + +additionalProperties: false + +examples: + - | + #include + + panel { + compatible = "sharp,ls020b1dd01d"; + + backlight = <&backlight>; + power-supply = <&vcc>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; + + lcd: lcd-controller@13050000 { + compatible = "ingenic,jz4725b-lcd"; + reg = <0x13050000 0x1000>; + + interrupt-parent = <&intc>; + interrupts = <31>; + + clocks = <&cgu JZ4725B_CLK_LCD>; + clock-names = "lcd", "lcd_pclk"; + + port { + panel_output: endpoint { + remote-endpoint = <&panel_input>; + }; + }; + }; + + - | + #include + + lcdc0: lcdc0@13050000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x13050000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + jz4780_lcd_out: port { + #address-cells = <1>; + #size-cells = <0>; + + jz4780_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_lcd>; + }; + }; + }; + + lcdc1: lcdc1@130a0000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x130a0000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + +... From patchwork Sun Mar 29 17:35:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 202681 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CF29C2D0ED for ; Sun, 29 Mar 2020 17:36:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 332EE2073E for ; Sun, 29 Mar 2020 17:36:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="J6h027Vn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728494AbgC2RgO (ORCPT ); Sun, 29 Mar 2020 13:36:14 -0400 Received: from mo4-p03-ob.smtp.rzone.de ([85.215.255.101]:13040 "EHLO mo4-p03-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727933AbgC2RgL (ORCPT ); Sun, 29 Mar 2020 13:36:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1585503369; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=q969EphFXv0KGrhdAiGCS2+PMGXFbeBIe9i3fa3YlIU=; b=J6h027VnQLR29/lz4Cyp/WIYy/UW+zsxWd1mnVqhH5ctVr/UrhExAMuG/E4uvLI//f sRx5Vtmvo/aIhuzuiDjUe3VGK4BTC/5eDxDLtzZ9HOPQ/HA81e8mnThl1cvetBieSRhR 45NPW0fccLvfEaudFGb/IjQODYdjkrLeyzcKsr/SsSgFUKINwp3bEysxvDTQlX3d9e/0 KSzGXuDWU318RJoSbu55olafntPcVJed4eGAXFmbcwP4n3Bxm8IVEApCozslRDYdWV9z R4AdpPOJptFr3fqDwtT8OCRCMEbzwZEd8UQxBPzvAMr/aCM/uz98Gn3NIFzuYJfhoYng I39A== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNOsPj0pDz2rsNxxv" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 46.2.1 DYNA|AUTH) with ESMTPSA id m02241w2THa1BMF (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sun, 29 Mar 2020 19:36:01 +0200 (CEST) From: "H. Nikolaus Schaller" To: Paul Cercueil , Paul Boddie , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , Linus Walleij , Andi Kleen , Krzysztof Kozlowski , Geert Uytterhoeven , "Eric W. Biederman" , "H. Nikolaus Schaller" , Miquel Raynal , Thomas Bogendoerfer , Kees Cook Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, letux-kernel@openphoenux.org, mips-creator-ci20-dev@googlegroups.com Subject: [RFC v3 6/8] MIPS: DTS: jz4780: account for Synopsys HDMI driver and LCD controller Date: Sun, 29 Mar 2020 19:35:52 +0200 Message-Id: <62c975f7de965181e1e44eb85e01ab60a645453b.1585503354.git.hns@goldelico.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Paul Boddie A specialisation of the generic Synopsys HDMI driver is employed for JZ4780 HDMI support. This requires a new driver, plus device tree and configuration modifications. Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 46 ++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index bb89653d16a3..73776514bbe5 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -434,4 +434,50 @@ bch: bch@134d0000 { status = "disabled"; }; + + hdmi: hdmi@10180000 { + compatible = "ingenic,jz4780-dw-hdmi"; + reg = <0x10180000 0x8000>; + reg-io-width = <4>; + + clocks = <&cgu JZ4780_CLK_HDMI>, <&cgu JZ4780_CLK_AHB0>; + clock-names = "isfr" , "iahb"; + + assigned-clocks = <&cgu JZ4780_CLK_HDMI>; + assigned-clock-rates = <27000000>; + + interrupt-parent = <&intc>; + interrupts = <3>; + + /* ddc-i2c-bus = <&i2c4>; */ + + status = "disabled"; + }; + + lcdc0: lcdc0@13050000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x13050000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + + lcdc1: lcdc1@130a0000 { + compatible = "ingenic,jz4780-lcd"; + reg = <0x130a0000 0x1800>; + + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD1PIXCLK>; + clock-names = "lcd", "lcd_pclk"; + + interrupt-parent = <&intc>; + interrupts = <31>; + + status = "disabled"; + }; + }; From patchwork Sun Mar 29 17:35:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H. Nikolaus Schaller" X-Patchwork-Id: 202680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4D47C2D0F1 for ; Sun, 29 Mar 2020 17:36:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7B7162083E for ; Sun, 29 Mar 2020 17:36:38 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=goldelico.com header.i=@goldelico.com header.b="p9/C7oLn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728482AbgC2RgO (ORCPT ); Sun, 29 Mar 2020 13:36:14 -0400 Received: from mo4-p04-ob.smtp.rzone.de ([85.215.255.122]:25297 "EHLO mo4-p04-ob.smtp.rzone.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728478AbgC2RgO (ORCPT ); Sun, 29 Mar 2020 13:36:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1585503369; s=strato-dkim-0002; d=goldelico.com; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=I039DbbWJmbU19A6VUFjmteqqzf+SHEXviIex+72I2k=; b=p9/C7oLnqU7pXKvQiaKafDCTeyTcyvnwoTQsYwJnbHl8AHMM9fK4DP43kbC4QeRSaf Km22xtr+au3K28aRo0aobZ1nlklr7/50J4Sla8O3vEl/t6thMsb2TWnwdOqk/yAhZ2eN H2SOtnPWgL7cBp1pOxpUK/KzD7E3ROIBRB8w8ONki+fwNqUGWBXlBJ8zs8+PdVxVRS80 //ZY+aqIKGfSui/Bc61LPCQyQ6gkhKJXicgkaY8rE1OjAPk35M6R9I8UCEIbssRt+bKM Enizh5yBhv0kwpcBpk433xv1nw99XnoAHBtHEqNRFDNui04jnm7jK9xWdOiUhCgHOvrz gXIQ== X-RZG-AUTH: ":JGIXVUS7cutRB/49FwqZ7WcJeFKiMhflhwDubTJ9o12DNOsPj0pDz2rsNxxv" X-RZG-CLASS-ID: mo00 Received: from iMac.fritz.box by smtp.strato.de (RZmta 46.2.1 DYNA|AUTH) with ESMTPSA id m02241w2THa2BMG (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Sun, 29 Mar 2020 19:36:02 +0200 (CEST) From: "H. Nikolaus Schaller" To: Paul Cercueil , Paul Boddie , David Airlie , Daniel Vetter , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , Linus Walleij , Andi Kleen , Krzysztof Kozlowski , Geert Uytterhoeven , "Eric W. Biederman" , "H. Nikolaus Schaller" , Miquel Raynal , Thomas Bogendoerfer , Kees Cook Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, letux-kernel@openphoenux.org, mips-creator-ci20-dev@googlegroups.com Subject: [RFC v3 7/8] MIPS: DTS: CI20: add HDMI setup Date: Sun, 29 Mar 2020 19:35:53 +0200 Message-Id: <90644c5a90f3321fc1542aa016c9eb848191526e.1585503354.git.hns@goldelico.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Paul Boddie We need to hook up * HDMI power regulator * HDMI connector * DDC pinmux * HDMI and LCD endpoint connections Signed-off-by: Paul Boddie Signed-off-by: H. Nikolaus Schaller --- arch/mips/boot/dts/ingenic/ci20.dts | 64 +++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index c340f947baa0..97e09382ebd7 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -62,6 +62,28 @@ eth0_power: fixedregulator@0 { enable-active-high; }; + hdmi_power: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "hdmi_power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpa 25 GPIO_ACTIVE_LOW>; + enable-active-high; + regulator-always-on; + }; + + hdmi_out: connector { + compatible = "hdmi-connector"; + label = "HDMI OUT"; + type = "a"; + + port { + hdmi_con: endpoint { + remote-endpoint = <&dw_hdmi_out>; + }; + }; + }; + wlan0_power: fixedregulator@1 { compatible = "regulator-fixed"; regulator-name = "wlan0_power"; @@ -435,6 +457,12 @@ pins_i2c4: i2c4 { bias-disable; }; + pins_hdmi_ddc: hdmi_ddc { + function = "hdmi-ddc"; + groups = "hdmi-ddc"; + bias-disable; + }; + pins_nemc: nemc { function = "nemc"; groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; @@ -471,3 +499,39 @@ &tcu { assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; assigned-clock-rates = <3000000>, <3000000>; }; + +&hdmi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_hdmi_ddc>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dw_hdmi_in: endpoint { + remote-endpoint = <&lcd_out>; + }; + }; + + port@1 { + reg = <1>; + dw_hdmi_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; +}; + +&lcdc0 { + status = "okay"; + + port { + lcd_out: endpoint { + remote-endpoint = <&dw_hdmi_in>; + }; + }; +};