From patchwork Thu Apr 30 11:56:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Priit Laes X-Patchwork-Id: 201305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_ADSP_ALL, DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 672FEC8300A for ; Thu, 30 Apr 2020 11:57:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3ED6A2078D for ; Thu, 30 Apr 2020 11:57:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=plaes.org header.i=@plaes.org header.b="ptSca4hV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726886AbgD3L5l (ORCPT ); Thu, 30 Apr 2020 07:57:41 -0400 Received: from plaes.org ([188.166.43.21]:37072 "EHLO plaes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726481AbgD3L5l (ORCPT ); Thu, 30 Apr 2020 07:57:41 -0400 Received: from localhost (unknown [IPv6:2001:1530:1000:d397:940e:6b9e:3deb:3]) by plaes.org (Postfix) with ESMTPSA id 13D554036D; Thu, 30 Apr 2020 11:57:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=plaes.org; s=mail; t=1588247829; bh=bh7o9ZhtcwUOEzy3WygVte7TJMzYuXaXlcYI721k4f8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ptSca4hVYlVlD+EeQS36HhT/dPaEy5pyiigz/Kfbl3GOJ5Bo8KfOzvXrIQg8VPoDM Fy66ScCGvpCkDjyVF7rM4ZeaugaTacGRw/4GkvtaW1BVIBvsEjU65L3VKl/wPP/VR5 oZFUBNSMdNsFEaFK9deqPJztaNHnS4X5yrYD6J2OprwfG/3GF+oScP+TI0uyLARkDH OUqgKKPngJlu71n6BqlE/UvnR+NKfdlb/nTR2IFBFOTAoIU02LI49ZndUolk5ENMII GAu/vY4jxfDLRiUBPUQC7Is3FUR141vs9/XhICwZ0uulGWwApMclmREtUICFh7PAAF w67FZ6Gbh76jw== From: Priit Laes To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Priit Laes Subject: [PATCH v3 1/6] clk: sunxi-ng: a20: Register regmap for sun7i CCU Date: Thu, 30 Apr 2020 14:56:57 +0300 Message-Id: <20200430115702.5768-2-plaes@plaes.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200430115702.5768-1-plaes@plaes.org> References: <20200430115702.5768-1-plaes@plaes.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sun7i, the gmac clock is handled by the dwmac-sunxi driver, but its configuration register is located in the CCU register range, requiring proper regmap setup. In order to do that, we use CLK_OF_DECLARE_DRIVER to initialize sun7i ccu, which clears the OF_POPULATED flag, allowing the platform device to probe the same resource with proper device node. Signed-off-by: Priit Laes --- drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 62 +++++++++++++++++++++++++++- 1 file changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c index f32366d9336e..fa147b8ce705 100644 --- a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c +++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c @@ -8,6 +8,8 @@ #include #include #include +#include +#include #include "ccu_common.h" #include "ccu_reset.h" @@ -1478,5 +1480,61 @@ static void __init sun7i_a20_ccu_setup(struct device_node *node) { sun4i_ccu_init(node, &sun7i_a20_ccu_desc); } -CLK_OF_DECLARE(sun7i_a20_ccu, "allwinner,sun7i-a20-ccu", - sun7i_a20_ccu_setup); +CLK_OF_DECLARE_DRIVER(sun7i_a20_ccu, "allwinner,sun7i-a20-ccu", + sun7i_a20_ccu_setup); + +/* + * Regmap for the GMAC driver (dwmac-sunxi) to allow access to + * GMAC configuration register. + */ +#define SUN7I_A20_GMAC_CFG_REG 0x164 +static bool sun7i_a20_ccu_regmap_accessible_reg(struct device *dev, + unsigned int reg) +{ + if (reg == SUN7I_A20_GMAC_CFG_REG) + return true; + return false; +} + +static struct regmap_config sun7i_a20_ccu_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x1f4, /* clk_out_b */ + + .readable_reg = sun7i_a20_ccu_regmap_accessible_reg, + .writeable_reg = sun7i_a20_ccu_regmap_accessible_reg, +}; + +static int sun7i_a20_ccu_probe_regmap(struct platform_device *pdev) +{ + void __iomem *reg; + struct resource *res; + struct regmap *regmap; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (IS_ERR(reg)) + return PTR_ERR(reg); + + regmap = devm_regmap_init_mmio(&pdev->dev, reg, + &sun7i_a20_ccu_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return 0; +} + +static const struct of_device_id sun7i_a20_ccu_ids[] = { + { .compatible = "allwinner,sun7i-a20-ccu"}, + { } +}; + +static struct platform_driver sun7i_a20_ccu_driver = { + .probe = sun7i_a20_ccu_probe_regmap, + .driver = { + .name = "sun7i-a20-ccu", + .of_match_table = sun7i_a20_ccu_ids, + }, +}; +builtin_platform_driver(sun7i_a20_ccu_driver); From patchwork Thu Apr 30 11:56:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Priit Laes X-Patchwork-Id: 201306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_ADSP_ALL, DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B88AC8300C for ; Thu, 30 Apr 2020 11:57:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BEB120870 for ; Thu, 30 Apr 2020 11:57:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=plaes.org header.i=@plaes.org header.b="BpLAHAYx" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726661AbgD3L5N (ORCPT ); Thu, 30 Apr 2020 07:57:13 -0400 Received: from plaes.org ([188.166.43.21]:37020 "EHLO plaes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726481AbgD3L5N (ORCPT ); Thu, 30 Apr 2020 07:57:13 -0400 Received: from localhost (unknown [IPv6:2001:1530:1000:d397:940e:6b9e:3deb:3]) by plaes.org (Postfix) with ESMTPSA id A676D4066A; Thu, 30 Apr 2020 11:57:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=plaes.org; s=mail; t=1588247830; bh=KtrNDTyIYly28OFcUiv1CrKTihke56ToqkXK8VtrLnE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BpLAHAYxOT56SoKWq8eNcb1vPxjkJV2WJVmtWEl+zOHPQi6PR78R4bLys2kodvc5r h3c0u6sizZblpY0lCm0OZHyk7+Qstv6FLC8CrD1oYXEdqeLVH19v2YR4xQGevjxry4 eYKGBnFgbIrxMrTweE/WW3snMGPm2WgkNwCvCo98cuRsUqrW6HpIuJd0BhR2KNz0nD 8mHbvuaS0j1mw56hXN8P6aSLn2GN2is99R4XxSEqLEMl9EM7Pwqr1rE97RGgWnQYyY WqeSx6Ak+uXtdj1Hk29Ti+TbFNf7tsMVawh2N7R4VGLWYJIjbJ4QebZjYjUmc0HjMd 48yIjieRaNlEw== From: Priit Laes To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Priit Laes Subject: [PATCH v3 2/6] clk: sunxi-ng: a31: Register regmap for sun6i CCU Date: Thu, 30 Apr 2020 14:56:58 +0300 Message-Id: <20200430115702.5768-3-plaes@plaes.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200430115702.5768-1-plaes@plaes.org> References: <20200430115702.5768-1-plaes@plaes.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On sun6i, the gmac clock is handled by the dwmac-sunxi driver, but its configuration register is located in the CCU register range, requiring proper regmap setup. In order to do that, we use CLK_OF_DECLARE_DRIVER to initialize sun7i ccu, which clears the OF_POPULATED flag, allowing the platform device to probe the same resource with device node. Signed-off-by: Priit Laes --- drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 62 +++++++++++++++++++++++++++- 1 file changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c index 9b40d53266a3..3f6f9824b2ca 100644 --- a/drivers/clk/sunxi-ng/ccu-sun6i-a31.c +++ b/drivers/clk/sunxi-ng/ccu-sun6i-a31.c @@ -10,6 +10,8 @@ #include #include #include +#include +#include #include "ccu_common.h" #include "ccu_reset.h" @@ -1262,5 +1264,61 @@ static void __init sun6i_a31_ccu_setup(struct device_node *node) ccu_mux_notifier_register(pll_cpu_clk.common.hw.clk, &sun6i_a31_cpu_nb); } -CLK_OF_DECLARE(sun6i_a31_ccu, "allwinner,sun6i-a31-ccu", - sun6i_a31_ccu_setup); +CLK_OF_DECLARE_DRIVER(sun6i_a31_ccu, "allwinner,sun6i-a31-ccu", + sun6i_a31_ccu_setup); + +/* + * Regmap for the GMAC driver (dwmac-sunxi) to allow access to + * GMAC configuration register. + */ +#define SUN6I_A31_GMAC_CFG_REG 0xD0 +static bool sun6i_a31_ccu_regmap_accessible_reg(struct device *dev, + unsigned int reg) +{ + if (reg == SUN6I_A31_GMAC_CFG_REG) + return true; + return false; +} + +static struct regmap_config sun6i_a31_ccu_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x308, /* clk_out_b */ + + .readable_reg = sun6i_a31_ccu_regmap_accessible_reg, + .writeable_reg = sun6i_a31_ccu_regmap_accessible_reg, +}; + +static int sun6i_a31_ccu_probe_regmap(struct platform_device *pdev) +{ + void __iomem *reg; + struct resource *res; + struct regmap *regmap; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + if (IS_ERR(reg)) + return PTR_ERR(reg); + + regmap = devm_regmap_init_mmio(&pdev->dev, reg, + &sun6i_a31_ccu_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + return 0; +} + +static const struct of_device_id sun6i_a31_ccu_ids[] = { + { .compatible = "allwinner,sun6i-a31-ccu"}, + { } +}; + +static struct platform_driver sun6i_a31_ccu_driver = { + .probe = sun6i_a31_ccu_probe_regmap, + .driver = { + .name = "sun6i-a31-ccu", + .of_match_table = sun6i_a31_ccu_ids, + }, +}; +builtin_platform_driver(sun6i_a31_ccu_driver); From patchwork Thu Apr 30 11:57:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Priit Laes X-Patchwork-Id: 201304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.4 required=3.0 tests=DKIM_ADSP_ALL, DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF4FDC8300B for ; Thu, 30 Apr 2020 11:57:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B0B620873 for ; Thu, 30 Apr 2020 11:57:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=plaes.org header.i=@plaes.org header.b="QkPepq9j" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726951AbgD3L5s (ORCPT ); Thu, 30 Apr 2020 07:57:48 -0400 Received: from plaes.org ([188.166.43.21]:37082 "EHLO plaes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726907AbgD3L5q (ORCPT ); Thu, 30 Apr 2020 07:57:46 -0400 Received: from localhost (unknown [IPv6:2001:1530:1000:d397:940e:6b9e:3deb:3]) by plaes.org (Postfix) with ESMTPSA id D017B4092D; Thu, 30 Apr 2020 11:57:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=plaes.org; s=mail; t=1588247834; bh=vMo2TanI9GatNd59nOo9RI6zU3bToC+1dQv+F9Smax0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QkPepq9jRIHzXYSDHzmANJ+RqWrN2Do7/VE3yhAEqeTTI/ddCGQF3C5E55wE/Wpk6 ETVZ7nf+ZlG6jVnqeNNpbWJwCHZpcjzVkNXa9YEK6Aeirv272bl10ne4TgEan1X9tU 6UZnTnma0bOmJP7Ls8Vb3PcNVMfP1uoPkHI9GROJnbK7St8rcR+sqPwSUShjQTxLeC eFpwtNQGmlpsoQtfbI+6x9rhEZ1k3+24xq9FxVr0rU18bdHgSlYQ32YaS13OhL1qmx 5e8Zuz6RWT9bMmIPwXynHtWIu4Ip167IeoVqKE2Dy34d4Ff+Gjv+pK5IupeH0i5raY XSkvGP8QXQ4jw== From: Priit Laes To: Maxime Ripard , Chen-Yu Tsai , Rob Herring , linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Priit Laes Subject: [PATCH v3 4/6] dt-bindings: net: sun7i-gmac: Add syscon support Date: Thu, 30 Apr 2020 14:57:00 +0300 Message-Id: <20200430115702.5768-5-plaes@plaes.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200430115702.5768-1-plaes@plaes.org> References: <20200430115702.5768-1-plaes@plaes.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that driver supports syscon-based regmap access, document also the devicetree binding. Signed-off-by: Priit Laes --- .../bindings/net/allwinner,sun7i-a20-gmac.yaml | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml index 703d0d886884..c41d7c598c19 100644 --- a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml +++ b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml @@ -29,17 +29,26 @@ properties: clocks: items: - description: GMAC main clock + + # Deprecated - description: TX clock clock-names: items: - const: stmmaceth + + # Deprecated - const: allwinner_gmac_tx phy-supply: description: PHY regulator + syscon: + $ref: /schemas/types.yaml#definitions/phandle + description: + Phandle to the device containing the GMAC clock register + required: - compatible - reg @@ -48,6 +57,7 @@ required: - clocks - clock-names - phy-mode + - syscon unevaluatedProperties: false @@ -55,11 +65,12 @@ examples: - | gmac: ethernet@1c50000 { compatible = "allwinner,sun7i-a20-gmac"; + syscon = <&syscon>; reg = <0x01c50000 0x10000>; interrupts = <0 85 1>; interrupt-names = "macirq"; - clocks = <&ahb_gates 49>, <&gmac_tx>; - clock-names = "stmmaceth", "allwinner_gmac_tx"; + clocks = <&ahb_gates 49>; + clock-names = "stmmaceth"; phy-mode = "mii"; };