From patchwork Fri May 8 04:13:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dillon Min X-Patchwork-Id: 200912 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 304CBC4724C for ; Fri, 8 May 2020 04:13:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1070020720 for ; Fri, 8 May 2020 04:13:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="i/wVvqB3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725681AbgEHEN0 (ORCPT ); Fri, 8 May 2020 00:13:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725287AbgEHEN0 (ORCPT ); Fri, 8 May 2020 00:13:26 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D4A6C05BD43; Thu, 7 May 2020 21:13:26 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id z6so154150plk.10; Thu, 07 May 2020 21:13:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bqTEGNao+ElhEnj/Er0d6hjqKNpR+gP54ehE1oHzSA8=; b=i/wVvqB3+fPstJONzideNUUichY4wXWAHwVT5OQLoilFMuWRm7HLeiVWnJD9vk5L2g h4DjyEQWGBpKydXHU4jH84MwcoftntpYGKLRk7FeRa2HlSbTL7k/dCDmlTDLUYqrNv9x 8fKBPKdrsl1AgvxHR+2tsJI+a/Zn7fS8yL5vBco3g5r5hy68/ez54uQXLk02BYhzNwxe XJ+57zEcPIeXSYqew1WXPstiL7P9xONrnXfrZHUpHcQij+nSG/2LQe6RMHTZuIk8W8nF yhNLkDSAxYl9+2wxiG6WmvwyvgnWi2SVjnvkJjV/gyXpEB8cfuMG6whNJnyE3S73SEiI 5r5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bqTEGNao+ElhEnj/Er0d6hjqKNpR+gP54ehE1oHzSA8=; b=XxW4KG15M0mYdXv0LJFim+NWVkmKJZTcOiY/Rc6A2NdcyepaKFFVmhRfc96FSHTY87 kUjvHtxED67j9ju8YC2moIUO32Umaqu3+GDTvaawaw9cJ1dL+/VIc5H6f/Ymo98ZjjFd 9QdGc9XKAPOKfzp93XnhN2MgGxI7Vz6mksuUbgt6Nme+uH9y8MjKlLacnNtX/OlvGoKL HJXaEdOr4Kf/YzzyhQtAlKhtydAakvMHfR/hHiimsVQKHu/zKyZQcxQPOoHaqquK4mYT ycPHyI31x7xny9EEFxfE/3clXQb8r5b3E63Q/MiVZzR/02I6wvqiUGYfiDX8MKewusl1 Yyog== X-Gm-Message-State: AGi0PuZecJGrWfp0OBipmb+T606JHWZFGdQkT+D/BtT0iqI4yppolbas 6KS282t0NqfYoecjH4vPxiY= X-Google-Smtp-Source: APiQypKaHw2KbN8J8RS60qHgSElYdfw03GNwICgDqOrarpdg12Wuj8BCSk6lbVC3eFPsDQVLZweYLQ== X-Received: by 2002:a17:90a:fd89:: with SMTP id cx9mr3869773pjb.64.1588911205126; Thu, 07 May 2020 21:13:25 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([103.206.190.146]) by smtp.gmail.com with ESMTPSA id h12sm314868pfq.176.2020.05.07.21.13.21 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2020 21:13:24 -0700 (PDT) From: dillon.minfei@gmail.com To: robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, thierry.reding@gmail.com, sam@ravnborg.org, airlied@linux.ie, daniel@ffwll.ch, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, dillon min Subject: [PATCH v2 1/5] ARM: dts: stm32: Add pin map for ltdc, spi5 on stm32f429-disco board Date: Fri, 8 May 2020 12:13:10 +0800 Message-Id: <1588911194-12433-2-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> References: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: dillon min This patch adds the pin configuration for ltdc, spi5 controller on stm32f429-disco board. Signed-off-by: dillon min --- arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 67 ++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi index 392fa14..0eb107f 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -316,6 +316,73 @@ }; }; + ltdc_pins_f429_disco: ltdc-1 { + pins { + pinmux = , + /* LCD_HSYNC */ + , + /* LCD_VSYNC */ + , + /* LCD_CLK */ + , + /* LCD_R2 */ + , + /* LCD_R3 */ + , + /* LCD_R4 */ + , + /* LCD_R5 */ + , + /* LCD_R6*/ + , + /* LCD_R7 */ + , + /* LCD_G2 */ + , + /* LCD_G3 */ + , + /* LCD_G4 */ + , + /* LCD_B2 */ + , + /* LCD_B3*/ + , + /* LCD_G5 */ + , + /* LCD_G6 */ + , + /* LCD_G7 */ + , + /* LCD_B4 */ + , + /* LCD_B5 */ + , + /* LCD_B6 */ + , + /* LCD_B7 */ + ; + /* LCD_DE */ + slew-rate = <2>; + }; + }; + + spi5_pins: spi5-0 { + pins1 { + pinmux = , + /* SPI5_CLK */ + ; + /* SPI5_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; + /* SPI5_MISO */ + bias-disable; + }; + }; + dcmi_pins: dcmi-0 { pins { pinmux = , /* DCMI_HSYNC */ From patchwork Fri May 8 04:13:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dillon Min X-Patchwork-Id: 200911 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C459DC47254 for ; Fri, 8 May 2020 04:13:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A5EF420661 for ; Fri, 8 May 2020 04:13:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HZa4Ftrm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726616AbgEHENf (ORCPT ); Fri, 8 May 2020 00:13:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725287AbgEHENe (ORCPT ); Fri, 8 May 2020 00:13:34 -0400 Received: from mail-pj1-x1044.google.com (mail-pj1-x1044.google.com [IPv6:2607:f8b0:4864:20::1044]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3823EC05BD43; Thu, 7 May 2020 21:13:34 -0700 (PDT) Received: by mail-pj1-x1044.google.com with SMTP id hi11so3665876pjb.3; Thu, 07 May 2020 21:13:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Db6qOihor5Bj8DkFXZYYMAre3zfCOsyEXmYIyTZWgqc=; b=HZa4Ftrmwnb5Ap1XUema1giGFlB40rvdwsHrEWexpeZ6u5tBF43Pq4MFzxAYUu84aI JunK7vj/+KG0NUE2q78MI7A8GNKQoC+8zU6hWn6d1wy/rzVCxyRUPShkVXyJi/z4rZ8X i25uLgD5ruVcCH5djhBBhZKzsS361Rev4ajBHWYRd4FOcqm3ApHA7RHKdjnCKfSxMdL/ OYq7KHB0yYJoOYEjmMuKH2w3YwgJDQNmQMo5R1V5fS/spm2DHonKxkvkoJEquM3oeLcX SCQtrBzKRLKh6kVEGNoNtw3jUeLMTnSQoqR3iHXqONoXhHB0amdTdYRt6MPXFkfyz2Fy C1xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Db6qOihor5Bj8DkFXZYYMAre3zfCOsyEXmYIyTZWgqc=; b=kN9XUvekDgWUFRGY9S/3GnIgHRWROel/SC9kXNhiPJwrHpXT0fCwjy9LeS4UQiDy38 HO1MXlFdjIu/It8T0atTveb+5B6N6uVJ3Q4BfMvMWHyEnqPYX59eV5we7GlMgIy/ILva pwh5QnyKn9J4BMhH7D1mRwozZ3L6ihQvopNX3B5TC0yCvGqlJ/LPU1KwjQqOccwVgbAB 3nqt5QxOUcbFi13gWcnmQ1G2ivpk1DXc9y1UauDa8IsTCKeV+xEeOL3TSjyFHP2E+icc 9jb+fqQzOjQCBcHrScyrP6i4lIAvDKU+MRSWWxqB45vOL0m+yDUzqQFoE6xrhiHASoiF Dsmg== X-Gm-Message-State: AGi0PuZ6/pddXFXmoTc6jjQJ6McOF1bjLQJrUF7tZTqNNXdLPzcV1oR7 RXM5PLkmraQzbv0cVe371jc= X-Google-Smtp-Source: APiQypJLGCxoTkz92z+vdPnEwubOafhAAPIJICKtjIgVVEZQPHbclNonxkvq6mn3XY2pZohgYlX7KQ== X-Received: by 2002:a17:90a:208f:: with SMTP id f15mr3825087pjg.60.1588911213774; Thu, 07 May 2020 21:13:33 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([103.206.190.146]) by smtp.gmail.com with ESMTPSA id h12sm314868pfq.176.2020.05.07.21.13.29 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2020 21:13:33 -0700 (PDT) From: dillon.minfei@gmail.com To: robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, thierry.reding@gmail.com, sam@ravnborg.org, airlied@linux.ie, daniel@ffwll.ch, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, dillon min Subject: [PATCH v2 3/5] dt-bindings: display: panel: Add ilitek ili9341 panel bindings Date: Fri, 8 May 2020 12:13:12 +0800 Message-Id: <1588911194-12433-4-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> References: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: dillon min Add documentation for "ilitek,ili9341" panel. Signed-off-by: dillon min --- Hi Rob Herring, This patch [PATCH V2 3/5] about ilitek,ili9341.yaml was verifyed with make dt_binding_check thanks. best regards, dillon, .../bindings/display/panel/ilitek,ili9341.yaml | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml new file mode 100644 index 0000000..94c2b15 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/ilitek,ili9341.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ilitek-9341 Display Panel + +maintainers: + - Dillon Min + +description: | + Ilitek ILI9341 TFT panel driver with SPI control bus + This is a driver for 320x240 TFT panels, accepting a rgb input + streams that get adapted and scaled to the panel. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - const: stm32f429,ltdc-panel + - {} # ilitek,ili9341, but not listed here to avoid false select + + reg: true + + dc-gpios: + maxItems: 1 + description: panel spi dc gpio + + spi-3wire: true + + spi-max-frequency: + const: 10000000 + + port: true + +additionalProperties: false + +required: + - compatible + - reg + - dc-gpios + - spi-3wire + - spi-max-frequency + - port + +examples: + - |+ + spi { + #address-cells = <1>; + #size-cells = <0>; + panel: display@0 { + compatible = "stm32f429,ltdc-panel", "ilitek,ili9341"; + reg = <0>; + spi-3wire; + spi-max-frequency = <10000000>; + dc-gpios = <&gpiod 13 0>; + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; + }; +... + From patchwork Fri May 8 04:13:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dillon Min X-Patchwork-Id: 200910 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA086C4724C for ; Fri, 8 May 2020 04:13:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 696C92085B for ; Fri, 8 May 2020 04:13:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="H+nggP6D" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726815AbgEHENo (ORCPT ); Fri, 8 May 2020 00:13:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725287AbgEHENo (ORCPT ); Fri, 8 May 2020 00:13:44 -0400 Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13EBFC05BD43; Thu, 7 May 2020 21:13:44 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id a4so286049pgc.0; Thu, 07 May 2020 21:13:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RsXnVDCbmTfLF5+palayxdoYvVpqGplnm+64NVDY5/0=; b=H+nggP6DxG1IL5CVrn1gSdvaF5SFSachwPT+ih2sWs6AlHEmJYuFETRjIuoil8M//R tEwjy2aY7s8AaTT6QLUFV8YUKje9ZFvop4pLFP2tkjA2Y7mHYsT0YJWUYK2SoyzV0BMG l9UJxwf0cAm/JwFgFEF5Kko0TrzqocaBr2Y913yTaHQusBBTpeXerWVxri9GSwfA1Sh+ 5iXgc7Qdnrvc7fYMEkN3v50aGJjdsOLubWgFV0MnpXiacxhcIQjPT7EA5HTAE4zTC4lG W4AiHtMplZqJrqckcC+0ZxHgGrO2Xtetu4K+aj5SgxySZeK/1I+VeXnlcvY/bxCzy03r SAdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RsXnVDCbmTfLF5+palayxdoYvVpqGplnm+64NVDY5/0=; b=hLmtN57PFp8SGTksGFxorYB09dn6d8X37XAp2a2mnwo1VMmWoNekMHws/Lq4pHAVco rmsdoXvQVQD51Ae7YlrFx0Nm1VZandThDHqovuibzvOMsUnWNQXjYJoWeWyKsXsBPL3Y vyaKzPgyoztahid1APSZgAKQxNOs9zy8el+oxcfNZAuLsWuDG8T6/+xub9jz+TvkjwBu HioM4cxMRU9rEQTdFAoS4KF+ImASgjBg76xPQkpU4fRf6+QEwX9U/WdhWofiqoI3ktui CzhfVxVlQPiHfynMdxAbMbu4zCTgjrAMuYJj3M4vCs1sdQZU0jQq7Feiv/9CqQpuXynD nAww== X-Gm-Message-State: AGi0PuYzarl14vlpO48Sscb2H4a9BFQw7EGLah4A8zyA/pWWPo05jqCE RGv9SqB8zXEhMIj/sH6CNl4= X-Google-Smtp-Source: APiQypKIXCx3OiHgfj/BJUE5gz3XlOICq81l2/Lgnr2WhzvArNlm0vWi4U0U7RjXA0BGIgI860PXtg== X-Received: by 2002:a63:3e0b:: with SMTP id l11mr365147pga.363.1588911223404; Thu, 07 May 2020 21:13:43 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([103.206.190.146]) by smtp.gmail.com with ESMTPSA id h12sm314868pfq.176.2020.05.07.21.13.38 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2020 21:13:43 -0700 (PDT) From: dillon.minfei@gmail.com To: robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, thierry.reding@gmail.com, sam@ravnborg.org, airlied@linux.ie, daniel@ffwll.ch, mturquette@baylibre.com, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, dillon min Subject: [PATCH v2 5/5] drm/panel: add panel driver for Ilitek ili9341 panels Date: Fri, 8 May 2020 12:13:14 +0800 Message-Id: <1588911194-12433-6-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> References: <1588911194-12433-1-git-send-email-dillon.minfei@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: dillon min This is a driver for 320x240 TFT panels, accepting a rgb input streams that get adapted and scaled to the panel. Signed-off-by: dillon min --- drivers/gpu/drm/panel/Kconfig | 8 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 561 +++++++++++++++++++++++++++ 3 files changed, 570 insertions(+) create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9341.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index a1723c1..e42692c 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -95,6 +95,14 @@ config DRM_PANEL_ILITEK_IL9322 Say Y here if you want to enable support for Ilitek IL9322 QVGA (320x240) RGB, YUV and ITU-T BT.656 panels. +config DRM_PANEL_ILITEK_IL9341 + tristate "Ilitek ILI9341 240x320 QVGA panels" + depends on OF && SPI + select REGMAP + help + Say Y here if you want to enable support for Ilitek IL9341 + QVGA (240x320) RGB panels. + config DRM_PANEL_ILITEK_ILI9881C tristate "Ilitek ILI9881C-based panels" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 96a883c..d123543 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o +obj-$(CONFIG_DRM_PANEL_ILITEK_IL9341) += panel-ilitek-ili9341.o obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o obj-$(CONFIG_DRM_PANEL_JDI_LT070ME05000) += panel-jdi-lt070me05000.o diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9341.c b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c new file mode 100644 index 0000000..ec22d80 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9341.c @@ -0,0 +1,561 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Ilitek ILI9341 TFT LCD drm_panel driver. + * + * This panel can be configured to support: + * - 16-bit parallel RGB interface + * + * Copyright (C) 2020 Dillon Min + * Derived from drivers/drm/gpu/panel/panel-ilitek-ili9322.c + */ + +#include +#include +#include +#include +#include +#include +#include + +#include