From patchwork Thu May 21 09:13:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 200201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0465EC433E0 for ; Thu, 21 May 2020 09:14:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E2C4C20897 for ; Thu, 21 May 2020 09:14:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728843AbgEUJOI (ORCPT ); Thu, 21 May 2020 05:14:08 -0400 Received: from v6.sk ([167.172.42.174]:34802 "EHLO v6.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728833AbgEUJOG (ORCPT ); Thu, 21 May 2020 05:14:06 -0400 Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id 4947A61300; Thu, 21 May 2020 09:14:04 +0000 (UTC) From: Lubomir Rintel To: Rob Herring Cc: Alessandro Zummo , Alexandre Belloni , Bartosz Golaszewski , Daniel Lezcano , Jason Cooper , Linus Walleij , Marc Zyngier , Thomas Gleixner , Ulf Hansson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 2/9] dt-bindings: gpio: Convert mrvl-gpio to json-schema Date: Thu, 21 May 2020 11:13:49 +0200 Message-Id: <20200521091356.2211020-3-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200521091356.2211020-1-lkundrak@v3.sk> References: <20200521091356.2211020-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This converts the mrvl-gpio binding to DT schema format using json-schema. Various fixes were done during the conversion, such as adding more properties that are in fact mandatory or extending the examples to include child nodes with extra GPIO blocks. The compatible strings are a mess. It is not clear why so many of them are needed; the driver doesn't really seem to differentiate between the models. Some of them, like marvell,pxa93x-gpio and marvell,pxa1928-gpio are not used at all, so it's not known how many interrupts they utilize. On the other hand, mrvl,pxa-gpio has been seen in the tree, but it doesn't end up in any actual DTB file. In any case -- the schema merely copies whatever was in the original binding document, so it's hopefully no more wrong that the original. Signed-off-by: Lubomir Rintel --- Changes since v1: - Drop marvell,pxa1928-gpio - Drop ranges from example with no gcb child nodes - Add default GPL-2.0-only license tag - Fill in maintainers from MAINTAINERS file .../devicetree/bindings/gpio/mrvl-gpio.txt | 48 ----- .../devicetree/bindings/gpio/mrvl-gpio.yaml | 174 ++++++++++++++++++ 2 files changed, 174 insertions(+), 48 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/mrvl-gpio.txt create mode 100644 Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt b/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt deleted file mode 100644 index 30fd2201b3d4..000000000000 --- a/Documentation/devicetree/bindings/gpio/mrvl-gpio.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Marvell PXA GPIO controller - -Required properties: -- compatible : Should be "intel,pxa25x-gpio", "intel,pxa26x-gpio", - "intel,pxa27x-gpio", "intel,pxa3xx-gpio", - "marvell,pxa93x-gpio", "marvell,mmp-gpio", - "marvell,mmp2-gpio" or marvell,pxa1928-gpio. -- reg : Address and length of the register set for the device -- interrupts : Should be the port interrupt shared by all gpio pins. - There're three gpio interrupts in arch-pxa, and they're gpio0, - gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp, - gpio_mux. -- interrupt-names : Should be the names of irq resources. Each interrupt - uses its own interrupt name, so there should be as many interrupt names - as referenced interrupts. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. -- gpio-controller : Marks the device node as a gpio controller. -- #gpio-cells : Should be two. The first cell is the pin number and - the second cell is used to specify flags. See gpio.txt for possible - values. - -Example for a MMP platform: - - gpio: gpio@d4019000 { - compatible = "marvell,mmp-gpio"; - reg = <0xd4019000 0x1000>; - interrupts = <49>; - interrupt-names = "gpio_mux"; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <1>; - }; - -Example for a PXA3xx platform: - - gpio: gpio@40e00000 { - compatible = "intel,pxa3xx-gpio"; - reg = <0x40e00000 0x10000>; - interrupt-names = "gpio0", "gpio1", "gpio_mux"; - interrupts = <8 9 10>; - gpio-controller; - #gpio-cells = <0x2>; - interrupt-controller; - #interrupt-cells = <0x2>; - }; diff --git a/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml b/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml new file mode 100644 index 000000000000..575ccc75ae30 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/mrvl-gpio.yaml @@ -0,0 +1,174 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA GPIO controller + +maintainers: + - Linus Walleij + - Bartosz Golaszewski + - Rob Herring + +allOf: + - if: + properties: + compatible: + contains: + enum: + - intel,pxa25x-gpio + - intel,pxa26x-gpio + - intel,pxa27x-gpio + - intel,pxa3xx-gpio + then: + properties: + interrupts: + minItems: 3 + maxItems: 3 + interrupt-names: + items: + - const: gpio0 + - const: gpio1 + - const: gpio_mux + - if: + properties: + compatible: + contains: + enum: + - marvell,mmp-gpio + - marvell,mmp2-gpio + then: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: gpio_mux + +properties: + $nodename: + pattern: '^gpio@[0-9a-f]+$' + + compatible: + enum: + - intel,pxa25x-gpio + - intel,pxa26x-gpio + - intel,pxa27x-gpio + - intel,pxa3xx-gpio + - marvell,mmp-gpio + - marvell,mmp2-gpio + - marvell,pxa93x-gpio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + maxItems: 1 + + interrupts: true + + interrupt-names: true + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + +patternProperties: + '^gpio@[0-9a-f]*$': + type: object + properties: + reg: + maxItems: 1 + + required: + - reg + + additionalProperties: false + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - gpio-controller + - '#gpio-cells' + - interrupts + - interrupt-names + - interrupt-controller + - '#interrupt-cells' + - ranges + +additionalProperties: false + +examples: + - | + #include + gpio@40e00000 { + compatible = "intel,pxa3xx-gpio"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40e00000 0x10000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <8>, <9>, <10>; + interrupt-names = "gpio0", "gpio1", "gpio_mux"; + clocks = <&clks CLK_GPIO>; + interrupt-controller; + #interrupt-cells = <2>; + }; + - | + #include + gpio@d4019000 { + compatible = "marvell,mmp-gpio"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xd4019000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <49>; + interrupt-names = "gpio_mux"; + clocks = <&soc_clocks PXA910_CLK_GPIO>; + resets = <&soc_clocks PXA910_CLK_GPIO>; + interrupt-controller; + #interrupt-cells = <2>; + ranges; + + gpio@d4019000 { + reg = <0xd4019000 0x4>; + }; + + gpio@d4019004 { + reg = <0xd4019004 0x4>; + }; + + gpio@d4019008 { + reg = <0xd4019008 0x4>; + }; + + gpio@d4019100 { + reg = <0xd4019100 0x4>; + }; + }; + +... From patchwork Thu May 21 09:13:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 200202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DAA6C433DF for ; Thu, 21 May 2020 09:14:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73CB0207D3 for ; Thu, 21 May 2020 09:14:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728833AbgEUJOK (ORCPT ); Thu, 21 May 2020 05:14:10 -0400 Received: from v6.sk ([167.172.42.174]:34802 "EHLO v6.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728842AbgEUJOJ (ORCPT ); Thu, 21 May 2020 05:14:09 -0400 Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id 7CC9961302; Thu, 21 May 2020 09:14:07 +0000 (UTC) From: Lubomir Rintel To: Rob Herring Cc: Alessandro Zummo , Alexandre Belloni , Bartosz Golaszewski , Daniel Lezcano , Jason Cooper , Linus Walleij , Marc Zyngier , Thomas Gleixner , Ulf Hansson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 4/9] dt-bindings: interrupt-controller: Convert mrvl, intc to json-schema Date: Thu, 21 May 2020 11:13:51 +0200 Message-Id: <20200521091356.2211020-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200521091356.2211020-1-lkundrak@v3.sk> References: <20200521091356.2211020-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the mrvl,intc binding to DT schema format using json-schema. Signed-off-by: Lubomir Rintel --- Changes since v1: - Move minItems/maxItems to main reg property definition from the conditional one - Drop the condition for marvell,orion-intc - Add default GPL-2.0-only license tag - Fill in maintainers from MAINTAINERS file .../interrupt-controller/mrvl,intc.txt | 64 --------- .../interrupt-controller/mrvl,intc.yaml | 134 ++++++++++++++++++ 2 files changed, 134 insertions(+), 64 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt deleted file mode 100644 index a0ed02725a9d..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt +++ /dev/null @@ -1,64 +0,0 @@ -* Marvell MMP Interrupt controller - -Required properties: -- compatible : Should be - "mrvl,mmp-intc" on Marvel MMP, - "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or - "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3 -- reg : Address and length of the register set of the interrupt controller. - If the interrupt controller is intc, address and length means the range - of the whole interrupt controller. The "marvell,mmp3-intc" controller - also has a secondary range for the second CPU core. If the interrupt - controller is mux-intc, address and length means one register. Since - address of mux-intc is in the range of intc. mux-intc is secondary - interrupt controller. -- reg-names : Name of the register set of the interrupt controller. It's - only required in mux-intc interrupt controller. -- interrupts : Should be the port interrupt shared by mux interrupts. It's - only required in mux-intc interrupt controller. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. -- mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt - controller. -- mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge - detection first. - -Example: - intc: interrupt-controller@d4282000 { - compatible = "mrvl,mmp2-intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xd4282000 0x1000>; - mrvl,intc-nr-irqs = <64>; - }; - - intcmux4@d4282150 { - compatible = "mrvl,mmp2-mux-intc"; - interrupts = <4>; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0x150 0x4>, <0x168 0x4>; - reg-names = "mux status", "mux mask"; - mrvl,intc-nr-irqs = <2>; - }; - -* Marvell Orion Interrupt controller - -Required properties -- compatible : Should be "marvell,orion-intc". -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. Supported value is <1>. -- interrupt-controller : Declare this node to be an interrupt controller. -- reg : Interrupt mask address. A list of 4 byte ranges, one per controller. - One entry in the list represents 32 interrupts. - -Example: - - intc: interrupt-controller { - compatible = "marvell,orion-intc", "marvell,intc"; - interrupt-controller; - #interrupt-cells = <1>; - reg = <0xfed20204 0x04>, - <0xfed20214 0x04>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml new file mode 100644 index 000000000000..372ccbfae771 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MMP/Orion Interrupt controller bindings + +maintainers: + - Thomas Gleixner + - Jason Cooper + - Marc Zyngier + - Rob Herring + +allOf: + - if: + properties: + compatible: + not: + contains: + const: marvell,orion-intc + then: + required: + - mrvl,intc-nr-irqs + - if: + properties: + compatible: + contains: + enum: + - mrvl,mmp-intc + - mrvl,mmp2-intc + then: + properties: + reg: + maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - marvell,mmp3-intc + - mrvl,mmp2-mux-intc + then: + properties: + reg: + minItems: 2 + - if: + properties: + compatible: + contains: + const: mrvl,mmp2-mux-intc + then: + properties: + interrupts: + maxItems: 1 + reg-names: + items: + - const: 'mux status' + - const: 'mux mask' + required: + - interrupts + else: + properties: + interrupts: false + +properties: + '#interrupt-cells': + const: 1 + + compatible: + enum: + - mrvl,mmp-intc + - mrvl,mmp2-intc + - marvell,mmp3-intc + - marvell,orion-intc + - mrvl,mmp2-mux-intc + + reg: + minItems: 1 + maxItems: 2 + + reg-names: true + + interrupts: true + + interrupt-controller: true + + mrvl,intc-nr-irqs: + description: | + Specifies the number of interrupts in the interrupt controller. + $ref: /schemas/types.yaml#/definitions/uint32 + + mrvl,clr-mfp-irq: + description: | + Specifies the interrupt that needs to clear MFP edge detection first. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - '#interrupt-cells' + - compatible + - reg + - interrupt-controller + +additionalProperties: false + +examples: + - | + interrupt-controller@d4282000 { + compatible = "mrvl,mmp2-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xd4282000 0x1000>; + mrvl,intc-nr-irqs = <64>; + }; + + interrupt-controller@d4282150 { + compatible = "mrvl,mmp2-mux-intc"; + interrupts = <4>; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x150 0x4>, <0x168 0x4>; + reg-names = "mux status", "mux mask"; + mrvl,intc-nr-irqs = <2>; + }; + - | + interrupt-controller@fed20204 { + compatible = "marvell,orion-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xfed20204 0x04>, + <0xfed20214 0x04>; + }; + +... From patchwork Thu May 21 09:13:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 200200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 698EAC433E0 for ; Thu, 21 May 2020 09:14:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3E5DB2070A for ; Thu, 21 May 2020 09:14:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728966AbgEUJOl (ORCPT ); Thu, 21 May 2020 05:14:41 -0400 Received: from v6.sk ([167.172.42.174]:34954 "EHLO v6.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728748AbgEUJOl (ORCPT ); Thu, 21 May 2020 05:14:41 -0400 Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id 394F661303; Thu, 21 May 2020 09:14:09 +0000 (UTC) From: Lubomir Rintel To: Rob Herring Cc: Alessandro Zummo , Alexandre Belloni , Bartosz Golaszewski , Daniel Lezcano , Jason Cooper , Linus Walleij , Marc Zyngier , Thomas Gleixner , Ulf Hansson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 5/9] dt-bindings: media: Convert marvell, mmp2-ccic to json-schema Date: Thu, 21 May 2020 11:13:52 +0200 Message-Id: <20200521091356.2211020-6-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200521091356.2211020-1-lkundrak@v3.sk> References: <20200521091356.2211020-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the marvell,mmp2-ccic binding to DT schema format using json-schema. While at that this drops the "func" and "phy" clocks. The driver consumes clocks with those names, but it's not clear what are they for and they are not used in DT systems. "phy" is probably a clock for the sensor and it would belong in the sensor node. Signed-off-by: Lubomir Rintel --- Changes since v1: - Fix indentation - Drop clocks other than "axi" - s/GPL-2.0-or-later/GPL-2.0-only/ .../bindings/media/marvell,mmp2-ccic.txt | 50 ---------- .../bindings/media/marvell,mmp2-ccic.yaml | 97 +++++++++++++++++++ 2 files changed, 97 insertions(+), 50 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt create mode 100644 Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml diff --git a/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt b/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt deleted file mode 100644 index 7ec2c8c8a3b9..000000000000 --- a/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.txt +++ /dev/null @@ -1,50 +0,0 @@ -Marvell MMP2 camera host interface - -Required properties: - - compatible: Should be "marvell,mmp2-ccic". - - reg: Register base and size. - - interrupts: The interrupt number. - - #clock-cells: Must be 0. - -Optional properties: - - clocks: Reference to the input clock as specified by - Documentation/devicetree/bindings/clock/clock-bindings.txt. - - clock-names: Names of the clocks used; "axi" for the AXI bus interface, - "func" for the peripheral clock and "phy" for the parallel - video bus interface. - - clock-output-names: Optional clock source for sensors. Shall be "mclk". - -Required subnodes: - - port: The parallel bus interface port with a single endpoint linked to - the sensor's endpoint as described in - Documentation/devicetree/bindings/media/video-interfaces.txt. - -Required endpoint properties: - - bus-type: data bus type, <5> or <6> for Parallel or Bt.656 respectively - - pclk-sample: pixel clock polarity - - hsync-active: horizontal synchronization polarity (only required for - parallel bus) - - vsync-active: vertical synchronization polarity (only required for - parallel bus) - -Example: - - camera0: camera@d420a000 { - compatible = "marvell,mmp2-ccic"; - reg = <0xd420a000 0x800>; - interrupts = <42>; - clocks = <&soc_clocks MMP2_CLK_CCIC0>; - clock-names = "axi"; - #clock-cells = <0>; - clock-output-names = "mclk"; - - port { - camera0_0: endpoint { - remote-endpoint = <&ov7670_0>; - bus-type = <5>; /* Parallel */ - hsync-active = <1>; /* Active high */ - vsync-active = <1>; /* Active high */ - pclk-sample = <0>; /* Falling */ - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml b/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml new file mode 100644 index 000000000000..fb399de668bb --- /dev/null +++ b/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019,2020 Lubomir Rintel +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MMP2 camera host interface bindings + +maintainers: + - Lubomir Rintel + +properties: + $nodename: + pattern: '^camera@[a-f0-9]+$' + + compatible: + const: marvell,mmp2-ccic + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + port: + type: object + additionalProperties: false + + properties: + endpoint: + type: object + additionalProperties: false + + # Properties described in + # Documentation/devicetree/bindings/media/video-interfaces.txt + properties: + remote-endpoint: true + hsync-active: true + vsync-active: true + pclk-sample: true + bus-type: true + + required: + - remote-endpoint + + required: + - endpoint + + clocks: + minItems: 1 + maxItems: 3 + items: + - description: AXI bus interface clock + - description: Peripheral clock + - description: Parallel video bus interface clock + + clock-names: + const: axi + + '#clock-cells': + const: 0 + + clock-output-names: + const: mclk + +required: + - compatible + - reg + - interrupts + - port + +examples: + - | + #include + + camera@d420a000 { + compatible = "marvell,mmp2-ccic"; + reg = <0xd420a000 0x800>; + interrupts = <42>; + clocks = <&soc_clocks MMP2_CLK_CCIC0>; + clock-names = "axi"; + #clock-cells = <0>; + clock-output-names = "mclk"; + + port { + camera0_0: endpoint { + remote-endpoint = <&ov7670_0>; + bus-type = <5>; /* Parallel */ + hsync-active = <1>; /* Active high */ + vsync-active = <1>; /* Active high */ + pclk-sample = <0>; /* Falling */ + }; + }; + }; + +... From patchwork Thu May 21 09:13:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 200203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0AC3C433E2 for ; Thu, 21 May 2020 09:14:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 895D020759 for ; Thu, 21 May 2020 09:14:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728914AbgEUJOO (ORCPT ); Thu, 21 May 2020 05:14:14 -0400 Received: from v6.sk ([167.172.42.174]:34802 "EHLO v6.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728870AbgEUJOO (ORCPT ); Thu, 21 May 2020 05:14:14 -0400 Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id 61ED461305; Thu, 21 May 2020 09:14:12 +0000 (UTC) From: Lubomir Rintel To: Rob Herring Cc: Alessandro Zummo , Alexandre Belloni , Bartosz Golaszewski , Daniel Lezcano , Jason Cooper , Linus Walleij , Marc Zyngier , Thomas Gleixner , Ulf Hansson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 7/9] dt-bindings: spi: Convert spi-pxa2xx to json-schema Date: Thu, 21 May 2020 11:13:54 +0200 Message-Id: <20200521091356.2211020-8-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200521091356.2211020-1-lkundrak@v3.sk> References: <20200521091356.2211020-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A straightforward conversion of the the spi-pxa2xx binding to DT schema format using json-schema. Signed-off-by: Lubomir Rintel --- Changes since v1: - Drop #address-cells and #size-cells - s/GPL-2.0-or-later/GPL-2.0-only/ .../bindings/spi/marvell,mmp2-ssp.yaml | 56 +++++++++++++++++++ .../devicetree/bindings/spi/spi-pxa2xx.txt | 27 --------- 2 files changed, 56 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-pxa2xx.txt diff --git a/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml b/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml new file mode 100644 index 000000000000..09bd831250a2 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019,2020 Lubomir Rintel +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PXA2xx SSP SPI Controller bindings + +maintainers: + - Lubomir Rintel + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: marvell,mmp2-ssp + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + ready-gpios: + description: | + GPIO used to signal a SPI master that the FIFO is filled and we're + ready to service a transfer. Only useful in slave mode. + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +dependencies: + ready-gpios: [ spi-slave ] + +examples: + - | + #include + spi@d4035000 { + compatible = "marvell,mmp2-ssp"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xd4035000 0x1000>; + clocks = <&soc_clocks MMP2_CLK_SSP0>; + interrupts = <0>; + }; + +... diff --git a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt b/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt deleted file mode 100644 index e30e0c2a4bce..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-pxa2xx.txt +++ /dev/null @@ -1,27 +0,0 @@ -PXA2xx SSP SPI Controller - -Required properties: -- compatible: Must be "marvell,mmp2-ssp". -- reg: Offset and length of the device's register set. -- interrupts: Should be the interrupt number. -- clocks: Should contain a single entry describing the clock input. -- #address-cells: Number of cells required to define a chip select address. -- #size-cells: Should be zero. - -Optional properties: -- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, - Documentation/devicetree/bindings/spi/spi-bus.txt -- spi-slave: Empty property indicating the SPI controller is used in slave mode. -- ready-gpios: GPIO used to signal a SPI master that the FIFO is filled - and we're ready to service a transfer. Only useful in slave mode. - -Child nodes represent devices on the SPI bus - See ../spi/spi-bus.txt - -Example: - ssp1: spi@d4035000 { - compatible = "marvell,mmp2-ssp"; - reg = <0xd4035000 0x1000>; - clocks = <&soc_clocks MMP2_CLK_SSP0>; - interrupts = <0>; - }; From patchwork Thu May 21 09:13:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 200204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8921AC433DF for ; Thu, 21 May 2020 09:14:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7097C20759 for ; Thu, 21 May 2020 09:14:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728683AbgEUJOR (ORCPT ); Thu, 21 May 2020 05:14:17 -0400 Received: from v6.sk ([167.172.42.174]:34802 "EHLO v6.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728870AbgEUJOR (ORCPT ); Thu, 21 May 2020 05:14:17 -0400 Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id BECA161307; Thu, 21 May 2020 09:14:15 +0000 (UTC) From: Lubomir Rintel To: Rob Herring Cc: Alessandro Zummo , Alexandre Belloni , Bartosz Golaszewski , Daniel Lezcano , Jason Cooper , Linus Walleij , Marc Zyngier , Thomas Gleixner , Ulf Hansson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 9/9] dt-bindings: usb: Convert ehci-mv to json-schema Date: Thu, 21 May 2020 11:13:56 +0200 Message-Id: <20200521091356.2211020-10-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200521091356.2211020-1-lkundrak@v3.sk> References: <20200521091356.2211020-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org A straightforward conversion of the ehci-mv binding to DT schema format using json-schema. Signed-off-by: Lubomir Rintel --- Changes since v1: - s/GPL-2.0-or-later/GPL-2.0-only/ .../devicetree/bindings/usb/ehci-mv.txt | 23 ------- .../bindings/usb/marvell,pxau2o-ehci.yaml | 60 +++++++++++++++++++ 2 files changed, 60 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/ehci-mv.txt create mode 100644 Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml diff --git a/Documentation/devicetree/bindings/usb/ehci-mv.txt b/Documentation/devicetree/bindings/usb/ehci-mv.txt deleted file mode 100644 index 335589895763..000000000000 --- a/Documentation/devicetree/bindings/usb/ehci-mv.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Marvell PXA/MMP EHCI controller. - -Required properties: - -- compatible: must be "marvell,pxau2o-ehci" -- reg: physical base addresses of the controller and length of memory mapped region -- interrupts: one EHCI controller interrupt should be described here -- clocks: phandle list of usb clocks -- clock-names: should be "USBCLK" -- phys: phandle for the PHY device -- phy-names: should be "usb" - -Example: - - ehci0: usb-ehci@d4208000 { - compatible = "marvell,pxau2o-ehci"; - reg = <0xd4208000 0x200>; - interrupts = <44>; - clocks = <&soc_clocks MMP2_CLK_USB>; - clock-names = "USBCLK"; - phys = <&usb_otg_phy>; - phy-names = "usb"; - }; diff --git a/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml b/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml new file mode 100644 index 000000000000..eccd8cb45f77 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019,2020 Lubomir Rintel +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA/MMP EHCI bindings + +maintainers: + - Lubomir Rintel + +allOf: + - $ref: usb-hcd.yaml# + +properties: + compatible: + const: marvell,pxau2o-ehci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: USBCLK + + phys: + maxItems: 1 + + phy-names: + const: usb + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - phys + - phy-names + +examples: + - | + #include + usb@d4208000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xd4208000 0x200>; + interrupts = <44>; + clocks = <&soc_clocks MMP2_CLK_USB>; + clock-names = "USBCLK"; + phys = <&usb_otg_phy>; + phy-names = "usb"; + }; + +...