From patchwork Sun Aug 6 02:44:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 109506 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4029qge; Sat, 5 Aug 2017 19:45:48 -0700 (PDT) X-Received: by 10.98.11.67 with SMTP id t64mr7672502pfi.82.1501987548268; Sat, 05 Aug 2017 19:45:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501987548; cv=none; d=google.com; s=arc-20160816; b=YnBc909EXkMENTRnF2KO0coN1dVRF8I7sJKnF8sScTCBJRslEoKAv8yFfc3YhdAIV9 DS8kqJXyYKOTWv87nJpzPaVpuuTDQRUvk5hSF7Jyc37BIOujDRf/O2iwMs2AYhIB9uxs r6fe/2TA8ZeFWOZbm6+DEw9I4Ho2YRhoV0xPND2ejb+2APliO2TpYY4SyfIVYRmRWZoS 3HUwykoR6FKRKovghFno53QJllmnKL7POUBiyZvcb5E4xvC917BABBAxDpwOD8nsVeAq yhA7uEDipCEu/RAPXrgbl8oJjk0QeX6b2PG22b4XaAXfytFh2ANPuJp4sVfCzWTHZs/O akwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; bh=2c/UzZoqslXS3qmon5H3ACbYPgVUy3kOtBuCq4a3d0U=; b=uQ10rhb4CVyvko5WoyWLkpv0PN+CVWgcoxZyxvwsY87HOHEbwKtEvKGj0rc29gwP2g jpeTWqWpcYdnQQLt/4XUV1TrzPpHAXPrV62TDMJGIAlV3V7A/GD9abeZmTrpTJf49TDI cDOD/6jge2g26g5Pz2z3JVQ/q/CYjUl+Vsy6tdrbVQBksjZmgVsL/SaqVsPwnv1rqVTQ GtkntnsVgV0d+2KttQLOdkoQIlOqkLY8vbKhEs6KfSWL2p4pI/BXZMFTBolYegcnwJJj wFqwg32YILliyGJw4R7GzZM6p9TiHTMb5Q+zXODgXELIW7h2npBSNZY61tbqVeYlIF+B ih9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.b=vxGMOslG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k7si2940274pfb.444.2017.08.05.19.45.47; Sat, 05 Aug 2017 19:45:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.b=vxGMOslG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751408AbdHFCpo (ORCPT + 25 others); Sat, 5 Aug 2017 22:45:44 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:39376 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751247AbdHFCp3 (ORCPT ); Sat, 5 Aug 2017 22:45:29 -0400 Received: from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp [122.131.185.176]) (authenticated) by conuserg-09.nifty.com with ESMTP id v762iEs2015151; Sun, 6 Aug 2017 11:44:15 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v762iEs2015151 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1501987456; bh=2c/UzZoqslXS3qmon5H3ACbYPgVUy3kOtBuCq4a3d0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vxGMOslGHu/b8x9vu49NPoEmTXqs0LYIQFdMo/765TdVM5Krjoa/Rm24KB1cNvGYi St5Bu8BHO9RkoMAwVXkdivdGenMyrHptikJMaWGGf31zpZ3Xn8/2mF2lp2YA5KOTFw KGHrVqbGuYqlMwul5TvsYX3rMnEvM7HIsQ2x0m2PsQFuneg04tGODgfuScm+L57do+ FrSPskKbEOqBrAcZoB8nmZyCi8+JsO6MrqBMeq4ZMHHdiSnyy1X76e8HN/l4+VUO0o TRjCBZTxnvcK4lIdTFuW4vTXb6hEoYPsqqP1abJEz/07MdYfw/EPwmMHNCQo1OI3BY 51JRlV2xvvr/w== X-Nifty-SrcIP: [122.131.185.176] From: Masahiro Yamada To: Philipp Zabel Cc: Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] reset: uniphier: remove sLD3 SoC support Date: Sun, 6 Aug 2017 11:44:01 +0900 Message-Id: <1501987442-2583-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501987442-2583-1-git-send-email-yamada.masahiro@socionext.com> References: <1501987442-2583-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada --- .../devicetree/bindings/reset/uniphier-reset.txt | 2 - drivers/reset/reset-uniphier.c | 48 ++++++++-------------- 2 files changed, 16 insertions(+), 34 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 83ab0f599c40..b80ccc03ab9f 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -6,7 +6,6 @@ System reset Required properties: - compatible: should be one of the following: - "socionext,uniphier-sld3-reset" - for sLD3 SoC "socionext,uniphier-ld4-reset" - for LD4 SoC "socionext,uniphier-pro4-reset" - for Pro4 SoC "socionext,uniphier-sld8-reset" - for sLD8 SoC @@ -37,7 +36,6 @@ Media I/O (MIO) reset, SD reset Required properties: - compatible: should be one of the following: - "socionext,uniphier-sld3-mio-reset" - for sLD3 SoC "socionext,uniphier-ld4-mio-reset" - for LD4 SoC "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC "socionext,uniphier-sld8-mio-reset" - for sLD8 SoC diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index c4ba89832796..3947fc2ef52c 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -50,18 +50,12 @@ struct uniphier_reset_data { } /* System reset data */ -#define UNIPHIER_SLD3_SYS_RESET_NAND(id) \ - UNIPHIER_RESETX((id), 0x2004, 2) - #define UNIPHIER_LD11_SYS_RESET_NAND(id) \ UNIPHIER_RESETX((id), 0x200c, 0) #define UNIPHIER_LD11_SYS_RESET_EMMC(id) \ UNIPHIER_RESETX((id), 0x200c, 2) -#define UNIPHIER_SLD3_SYS_RESET_STDMAC(id) \ - UNIPHIER_RESETX((id), 0x2000, 10) - #define UNIPHIER_LD11_SYS_RESET_STDMAC(id) \ UNIPHIER_RESETX((id), 0x200c, 8) @@ -74,15 +68,15 @@ struct uniphier_reset_data { #define UNIPHIER_PRO4_SYS_RESET_USB3(id, ch) \ UNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17) -static const struct uniphier_reset_data uniphier_sld3_sys_reset_data[] = { - UNIPHIER_SLD3_SYS_RESET_NAND(2), - UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* Ether, HSC, MIO */ +static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = { + UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { - UNIPHIER_SLD3_SYS_RESET_NAND(2), - UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, MIO, RLE */ + UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */ UNIPHIER_PRO4_SYS_RESET_GIO(12), /* Ether, SATA, USB3 */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), @@ -90,8 +84,8 @@ static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { - UNIPHIER_SLD3_SYS_RESET_NAND(2), - UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC */ + UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC) */ UNIPHIER_PRO4_SYS_RESET_GIO(12), /* PCIe, USB3 */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), @@ -99,8 +93,8 @@ static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { - UNIPHIER_SLD3_SYS_RESET_NAND(2), - UNIPHIER_SLD3_SYS_RESET_STDMAC(8), /* HSC, RLE */ + UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ + UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, RLE) */ UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */ @@ -151,7 +145,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { #define UNIPHIER_MIO_RESET_DMAC(id) \ UNIPHIER_RESETX((id), 0x110, 17) -static const struct uniphier_reset_data uniphier_sld3_mio_reset_data[] = { +static const struct uniphier_reset_data uniphier_ld4_mio_reset_data[] = { UNIPHIER_MIO_RESET_SD(0, 0), UNIPHIER_MIO_RESET_SD(1, 1), UNIPHIER_MIO_RESET_SD(2, 2), @@ -163,11 +157,9 @@ static const struct uniphier_reset_data uniphier_sld3_mio_reset_data[] = { UNIPHIER_MIO_RESET_USB2(8, 0), UNIPHIER_MIO_RESET_USB2(9, 1), UNIPHIER_MIO_RESET_USB2(10, 2), - UNIPHIER_MIO_RESET_USB2(11, 3), UNIPHIER_MIO_RESET_USB2_BRIDGE(12, 0), UNIPHIER_MIO_RESET_USB2_BRIDGE(13, 1), UNIPHIER_MIO_RESET_USB2_BRIDGE(14, 2), - UNIPHIER_MIO_RESET_USB2_BRIDGE(15, 3), UNIPHIER_RESET_END, }; @@ -346,12 +338,8 @@ static int uniphier_reset_probe(struct platform_device *pdev) static const struct of_device_id uniphier_reset_match[] = { /* System reset */ { - .compatible = "socionext,uniphier-sld3-reset", - .data = uniphier_sld3_sys_reset_data, - }, - { .compatible = "socionext,uniphier-ld4-reset", - .data = uniphier_sld3_sys_reset_data, + .data = uniphier_ld4_sys_reset_data, }, { .compatible = "socionext,uniphier-pro4-reset", @@ -359,7 +347,7 @@ static const struct of_device_id uniphier_reset_match[] = { }, { .compatible = "socionext,uniphier-sld8-reset", - .data = uniphier_sld3_sys_reset_data, + .data = uniphier_ld4_sys_reset_data, }, { .compatible = "socionext,uniphier-pro5-reset", @@ -379,20 +367,16 @@ static const struct of_device_id uniphier_reset_match[] = { }, /* Media I/O reset, SD reset */ { - .compatible = "socionext,uniphier-sld3-mio-reset", - .data = uniphier_sld3_mio_reset_data, - }, - { .compatible = "socionext,uniphier-ld4-mio-reset", - .data = uniphier_sld3_mio_reset_data, + .data = uniphier_ld4_mio_reset_data, }, { .compatible = "socionext,uniphier-pro4-mio-reset", - .data = uniphier_sld3_mio_reset_data, + .data = uniphier_ld4_mio_reset_data, }, { .compatible = "socionext,uniphier-sld8-mio-reset", - .data = uniphier_sld3_mio_reset_data, + .data = uniphier_ld4_mio_reset_data, }, { .compatible = "socionext,uniphier-pro5-sd-reset", @@ -404,7 +388,7 @@ static const struct of_device_id uniphier_reset_match[] = { }, { .compatible = "socionext,uniphier-ld11-mio-reset", - .data = uniphier_sld3_mio_reset_data, + .data = uniphier_ld4_mio_reset_data, }, { .compatible = "socionext,uniphier-ld11-sd-reset", From patchwork Sun Aug 6 02:44:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 109505 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4011qge; Sat, 5 Aug 2017 19:45:46 -0700 (PDT) X-Received: by 10.84.172.1 with SMTP id m1mr8657276plb.174.1501987546334; Sat, 05 Aug 2017 19:45:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501987546; cv=none; d=google.com; s=arc-20160816; b=MpI0oXfcXM6y2Gp7HhcRg7f5i3GcweMMwKSfBaFr8AO85CFJ2AN0NCuxmGizxxUBga YWo5iirWO46yLMTwtLLkCBsjjXZZ0vGRuhtKNnKUlqUuGJr+fEURSP2CQKtze1IcWJUN Tz0Ex+3W0ZS58OUloc4GxQCp/CcwCf2SVFrjdvt/eWZ6fn9S1YVnYKDA7CDkh2TI06Xf gyMAcUVEHePwMafTTBeiObnpbakjmtqODDGXMHs99OtarBgKlMjfBeLhSntwFJ5l68H+ GjRzWdhgVJT8MBaX49eXGK1eW3V40itWL0tumiLn7ZjAqzFmZNWTrn+KJQzu0XBI8yur HPIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter :arc-authentication-results; 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[209.132.180.67]) by mx.google.com with ESMTP id k7si2940274pfb.444.2017.08.05.19.45.46; Sat, 05 Aug 2017 19:45:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.b=cSUJiMdR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751341AbdHFCp3 (ORCPT + 25 others); Sat, 5 Aug 2017 22:45:29 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:39342 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751242AbdHFCp1 (ORCPT ); Sat, 5 Aug 2017 22:45:27 -0400 Received: from grover.sesame (FL1-122-131-185-176.osk.mesh.ad.jp [122.131.185.176]) (authenticated) by conuserg-09.nifty.com with ESMTP id v762iEs3015151; Sun, 6 Aug 2017 11:44:16 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com v762iEs3015151 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1501987456; bh=uFPeIeeNmMAsEbPIImfbZfEa++GmJJrH2Io1M6fHYnY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cSUJiMdRcQ/Ytw0KsLcxTJvR0p/wbxPF3MlsfK+33u2wr3Y0RsD3H00mrTLiie9qz sOStTZyxyDFio+V0r9B1i5skCmTmMxUryCHIQfKivr5CmIe357DhSHMpkMiYxEGRV/ nCt0V77Zc/bSKEAv0x5kRq2pUQbyv5eJEu6xfZf5hQkVVzV5vNhRfd4TAKWL3qXX5O kypXYa+isC2dLC1AvYmXmO72bn1erDYMSzin8PjTfqgrpw1Ia+162QPGlSUzcQpCvL tRVdCb8lCJwkqXeooR70ChGOyXLQy2n/BnWNrwGo3OZS/ovJz6gCDELV8Wu7psaL0J FWaN/Qx4VrBTw== X-Nifty-SrcIP: [122.131.185.176] From: Masahiro Yamada To: Philipp Zabel Cc: Masahiro Yamada , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] reset: uniphier: do not use per-SoC macro for system reset block Date: Sun, 6 Aug 2017 11:44:02 +0900 Message-Id: <1501987442-2583-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1501987442-2583-1-git-send-email-yamada.masahiro@socionext.com> References: <1501987442-2583-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This macro turned out not so useful as I had expected. Hardware engineers said they would change reset bit assignments for every SoC going forward. This means we can not share the macros among SoCs. Just use primitive macros. Signed-off-by: Masahiro Yamada --- drivers/reset/reset-uniphier.c | 48 +++++++++++++----------------------------- 1 file changed, 15 insertions(+), 33 deletions(-) -- 2.7.4 diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c index 3947fc2ef52c..954b2c4e6ca7 100644 --- a/drivers/reset/reset-uniphier.c +++ b/drivers/reset/reset-uniphier.c @@ -50,24 +50,6 @@ struct uniphier_reset_data { } /* System reset data */ -#define UNIPHIER_LD11_SYS_RESET_NAND(id) \ - UNIPHIER_RESETX((id), 0x200c, 0) - -#define UNIPHIER_LD11_SYS_RESET_EMMC(id) \ - UNIPHIER_RESETX((id), 0x200c, 2) - -#define UNIPHIER_LD11_SYS_RESET_STDMAC(id) \ - UNIPHIER_RESETX((id), 0x200c, 8) - -#define UNIPHIER_PRO4_SYS_RESET_GIO(id) \ - UNIPHIER_RESETX((id), 0x2000, 6) - -#define UNIPHIER_LD20_SYS_RESET_GIO(id) \ - UNIPHIER_RESETX((id), 0x200c, 5) - -#define UNIPHIER_PRO4_SYS_RESET_USB3(id, ch) \ - UNIPHIER_RESETX((id), 0x2000 + 0x4 * (ch), 17) - static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (Ether, HSC, MIO) */ @@ -77,26 +59,26 @@ static const struct uniphier_reset_data uniphier_ld4_sys_reset_data[] = { static const struct uniphier_reset_data uniphier_pro4_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, MIO, RLE) */ - UNIPHIER_PRO4_SYS_RESET_GIO(12), /* Ether, SATA, USB3 */ - UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), - UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), + UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (Ether, SATA, USB3) */ + UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ + UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_pro5_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC) */ - UNIPHIER_PRO4_SYS_RESET_GIO(12), /* PCIe, USB3 */ - UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), - UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), + UNIPHIER_RESETX(12, 0x2000, 6), /* GIO (PCIe, USB3) */ + UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ + UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { UNIPHIER_RESETX(2, 0x2000, 2), /* NAND */ UNIPHIER_RESETX(8, 0x2000, 10), /* STDMAC (HSC, RLE) */ - UNIPHIER_PRO4_SYS_RESET_USB3(14, 0), - UNIPHIER_PRO4_SYS_RESET_USB3(15, 1), + UNIPHIER_RESETX(14, 0x2000, 17), /* USB30 */ + UNIPHIER_RESETX(15, 0x2004, 17), /* USB31 */ UNIPHIER_RESETX(16, 0x2014, 4), /* USB30-PHY0 */ UNIPHIER_RESETX(17, 0x2014, 0), /* USB30-PHY1 */ UNIPHIER_RESETX(18, 0x2014, 2), /* USB30-PHY2 */ @@ -108,17 +90,17 @@ static const struct uniphier_reset_data uniphier_pxs2_sys_reset_data[] = { }; static const struct uniphier_reset_data uniphier_ld11_sys_reset_data[] = { - UNIPHIER_LD11_SYS_RESET_NAND(2), - UNIPHIER_LD11_SYS_RESET_EMMC(4), - UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC, MIO */ + UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ + UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC, MIO) */ UNIPHIER_RESET_END, }; static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = { - UNIPHIER_LD11_SYS_RESET_NAND(2), - UNIPHIER_LD11_SYS_RESET_EMMC(4), - UNIPHIER_LD11_SYS_RESET_STDMAC(8), /* HSC */ - UNIPHIER_LD20_SYS_RESET_GIO(12), /* PCIe, USB3 */ + UNIPHIER_RESETX(2, 0x200c, 0), /* NAND */ + UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */ + UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC) */ + UNIPHIER_RESETX(12, 0x200c, 5), /* GIO (PCIe, USB3) */ UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */ UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */ UNIPHIER_RESETX(18, 0x200c, 14), /* USB30-PHY2 */