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[46.4.26.8]) by smtp.gmail.com with ESMTPSA id b185sm1781226itc.1.2017.08.02.01.38.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 02 Aug 2017 01:38:14 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: adrian.hunter@intel.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 1/2] mmc: sdhci: add sdma_buffer_boundary_arg member to sdhci_host Date: Wed, 2 Aug 2017 10:38:06 +0200 Message-Id: <20170802083807.26280-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170802083807.26280-1-srinivas.kandagatla@linaro.org> References: <20170802083807.26280-1-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Srinivas Kandagatla This patch adds sdma_buffer_boundary_arg member to struct sdhci_host to give more flexibility to drivers to control the sdma boundary buffer value and also to fix issue on some sdhci controllers which are broken when HOST SDMA Buffer Boundary is programmed in Block Size Register (0x04) when using ADMA. Qualcomm sdhci controller is one of such type, writing to this bits is un-supported. Default value of sdma_buffer_boundary_arg is set to SDHCI_DEFAULT_BOUNDARY_ARG. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/sdhci.c | 14 ++++++++++---- drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 13 insertions(+), 4 deletions(-) -- 2.11.0 diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index ecd0d4350e8a..4a7b5dcfc55b 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -897,7 +897,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) sdhci_set_transfer_irqs(host); /* Set the DMA boundary value and block size */ - sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, + sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_buffer_boundary_arg, data->blksz), SDHCI_BLOCK_SIZE); sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); } @@ -2037,6 +2037,7 @@ static void sdhci_send_tuning(struct sdhci_host *host, u32 opcode) struct mmc_command cmd = {}; struct mmc_request mrq = {}; unsigned long flags; + u32 barg = host->sdma_buffer_boundary_arg; spin_lock_irqsave(&host->lock, flags); @@ -2052,9 +2053,11 @@ static void sdhci_send_tuning(struct sdhci_host *host, u32 opcode) */ if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200 && mmc->ios.bus_width == MMC_BUS_WIDTH_8) - sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), SDHCI_BLOCK_SIZE); + sdhci_writew(host, + SDHCI_MAKE_BLKSZ(barg, 128), SDHCI_BLOCK_SIZE); else - sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), SDHCI_BLOCK_SIZE); + sdhci_writew(host, + SDHCI_MAKE_BLKSZ(barg, 64), SDHCI_BLOCK_SIZE); /* * The tuning block is sent by the card to the host controller. @@ -2998,7 +3001,8 @@ void sdhci_cqe_enable(struct mmc_host *mmc) ctrl |= SDHCI_CTRL_ADMA32; sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); - sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 512), + sdhci_writew(host, + SDHCI_MAKE_BLKSZ(host->sdma_buffer_boundary_arg, 512), SDHCI_BLOCK_SIZE); /* Set maximum timeout */ @@ -3119,6 +3123,8 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev, host->tuning_delay = -1; + host->sdma_buffer_boundary_arg = SDHCI_DEFAULT_BOUNDARY_ARG; + return host; } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 0469fa191493..6ff2294e55b3 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -541,6 +541,9 @@ struct sdhci_host { /* Delay (ms) between tuning commands */ int tuning_delay; + /* Host SDMA buffer boundary. */ + u32 sdma_buffer_boundary_arg; + unsigned long private[0] ____cacheline_aligned; }; From patchwork Wed Aug 2 08:38:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 109197 Delivered-To: patch@linaro.org Received: by 10.140.101.6 with SMTP id t6csp2504917qge; Wed, 2 Aug 2017 01:38:25 -0700 (PDT) X-Received: by 10.84.133.69 with SMTP id 63mr16399925plf.186.1501663105714; Wed, 02 Aug 2017 01:38:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1501663105; cv=none; d=google.com; s=arc-20160816; b=CM0T/qG02TljVfdQTSR8ZUiWciiwrXzfdBW5yKLphHkztYFhGOZ4GLHae0NMLRUhW/ cNpmajMJg4tPOIATrf4AW9ccK7UWDS/LxYENOJVSpwG1Z1hM6aJ0jIT7ob8KgYTRJVf6 olhay9FOVsqjOI1jLuj1BIv6irqzJEOT2N+vKAWoEY10PzC+yWW2VcmR/RNUn38sPg7O wk7Y8MG+/HWNiouSl3FICLNiP3bli/zBNfdqESGbvsarg1nlhBMJhncxo0s3VlLxzpW5 iYeRkgtrH+hBzf8PdYg+9oMG64RGMD2FqHM2/Khxb2xpnIwSOosIYKl4e7kivgM7sHx7 eCjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=IZFoHdqo+A+LOK2IQP+bXD1SjdTvh184cgDOM6XmgmU=; b=qFcntf06lL7lM/RXHH4a3kyX+d28LrhCba+eh7MWY4cCGa9C8N2Tn20Sj/RjkWM2AA k7HLLk6vE28tVlryI1AA6VPDYGhp2oQFD7zFDnrBhyHSTHkYYubWp/XEo2JPJ6tL5Q8e R+L19qgPYq4Gt/0YUWzgvrv35CMnt2dRAuQO0zaWXn2aCKU50La6J/sOd0QzEFY7KFhc FZVu5SHxLtvpSQFjjVVO5Vk3IvRxcT5suxSdAKbibQbqObOHdzyBUYrcMZ4ygayGlbuR ZH3Uo2s3l7Xz/TI79YEjUqPHvAAXGf5iZLPdu1CVWRg+TstO72dKY8Z/bHv2Xwx0XRFF FaHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=ahf7GYW0; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[46.4.26.8]) by smtp.gmail.com with ESMTPSA id b185sm1781226itc.1.2017.08.02.01.38.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 02 Aug 2017 01:38:15 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: adrian.hunter@intel.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 2/2] mmc: sdhci-msm: set sdma_buffer_boundary_arg to zero Date: Wed, 2 Aug 2017 10:38:07 +0200 Message-Id: <20170802083807.26280-3-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170802083807.26280-1-srinivas.kandagatla@linaro.org> References: <20170802083807.26280-1-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Srinivas Kandagatla Programming legacy HOST SDMA Buffer Boundary bits in Block Size Register (0x04) is not supported in Qualcomm sdhci controllers. Writing to this would cause the controller not to transfer last block in case block size is 4 bytes or less. This issue was noticed while testing sdio wlan card on Qcom DB410c board. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/sdhci-msm.c | 1 + 1 file changed, 1 insertion(+) -- 2.11.0 diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 9d601dc0d646..bb699c0247ef 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -1133,6 +1133,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) if (IS_ERR(host)) return PTR_ERR(host); + host->sdma_buffer_boundary_arg = 0; pltfm_host = sdhci_priv(host); msm_host = sdhci_pltfm_priv(pltfm_host); msm_host->mmc = host->mmc;