From patchwork Tue Jul 25 11:17:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 108637 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp446215qge; Tue, 25 Jul 2017 04:19:54 -0700 (PDT) X-Received: by 10.84.210.33 with SMTP id z30mr20815135plh.49.1500981594495; Tue, 25 Jul 2017 04:19:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500981594; cv=none; d=google.com; s=arc-20160816; b=vWDK6ekfU1Ygqp3AgnsVE28lFySDNvM/2lvVpZJS6cn7hLq8RbCMFwLHezsAWaPBLr lZktxmA3+n9HzWq0ksqnjWxrYf+9ogpwdX1H6l6AoQqq99tn7KGvhhV1s6egveY6Jh11 J2XwAEv+5mzyDzumDzcBbIqTXrOSGpou+U6SEE/Oq28ZcE6st3ktu/3F8M1r4VBYNHcM pTMVVkID9vEawD+xNIEwKY3xO3/awPIQq61i1zoVCofKwiBtgcgvXnlB57RQeRZaNzcO C4IflkPMeT1ZVBT+yEWEPvqwBtLeW66u/L46DjSD8/eXSr4dviqXk+NYnVEnLdvXkV4C edIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=V3IGZpCeN2MFty+HTedu+hX2r12i67vPoUeFRzyhhpk=; b=Gv/mAOhr+qXtthuwg8GN9LwXVW/TGerq+L/LyTWJqM3Aicelx/QqQag0gWkPSNEOHQ +eHs3X483bRLVgZ5BcAzVmPFXLEVoVQKqviCgjKTM8ZruwU08hIcCG/dkEnWKIY5QaDe 8ovg9Qjsuvjd/JJR3FbbFCdXxcAj6nvqM7H4Lp7jDhaSkKaugZ24RbEPIX4ee2BcSCi9 01tZX+ngtZYDU9vZ/Wo7RJSDuZwIQRfvGg5SPtESyjeZx2F0Y60m7WUkaZbsLgru2BGs 2JQDsGj/Na0ngAI8w1cs1rtvTqqJefyEeeWh3zxlniYdeSz1y7HmtvtWNcWWh7xIBu2d l4jg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h11si8572998plk.114.2017.07.25.04.19.54; Tue, 25 Jul 2017 04:19:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751547AbdGYLTx (ORCPT + 7 others); Tue, 25 Jul 2017 07:19:53 -0400 Received: from szxga01-in.huawei.com ([45.249.212.187]:10263 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750864AbdGYLTk (ORCPT ); Tue, 25 Jul 2017 07:19:40 -0400 Received: from 172.30.72.55 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.55]) by dggrg01-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id ASZ13823; Tue, 25 Jul 2017 19:19:38 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.203.177.212) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Tue, 25 Jul 2017 19:19:30 +0800 From: Shameer Kolothum To: , , , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v4 1/2] acpi:iort: Add an IORT helper function to reserve HW ITS address regions for IOMMU drivers Date: Tue, 25 Jul 2017 12:17:31 +0100 Message-ID: <20170725111732.41792-2-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170725111732.41792-1-shameerali.kolothum.thodi@huawei.com> References: <20170725111732.41792-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.203.177.212] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090201.5977294A.0074, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 0facec0b5c60e365b39a7709242bb854 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The helper function retrieves ITS address regions through IORT device <-> ITS mappings and reserves it so that these regions will not be translated by IOMMU and will be excluded from IOVA allocations. IOMMU drivers can use this to implement their .get_resv_regions callback. Signed-off-by: Shameer Kolothum --- drivers/acpi/arm64/iort.c | 91 ++++++++++++++++++++++++++++++++++++++-- drivers/irqchip/irq-gic-v3-its.c | 3 +- include/linux/acpi_iort.h | 8 +++- 3 files changed, 97 insertions(+), 5 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Signed-off-by: Shameer Kolothum Signed-off-by: Lorenzo Pieralisi diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index a3215ee..e28f30c 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -39,6 +39,7 @@ struct iort_its_msi_chip { struct list_head list; struct fwnode_handle *fw_node; + phys_addr_t base_addr; u32 translation_id; }; @@ -136,14 +137,16 @@ typedef acpi_status (*iort_find_node_callback) static DEFINE_SPINLOCK(iort_msi_chip_lock); /** - * iort_register_domain_token() - register domain token and related ITS ID - * to the list from where we can get it back later on. + * iort_register_domain_token() - register domain token along with related + * ITS ID and base address to the list from where we can get it back later on. * @trans_id: ITS ID. + * @base: ITS base address. * @fw_node: Domain token. * * Returns: 0 on success, -ENOMEM if no memory when allocating list element */ -int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node) +int iort_register_domain_token(int trans_id, phys_addr_t base, + struct fwnode_handle *fw_node) { struct iort_its_msi_chip *its_msi_chip; @@ -153,6 +156,7 @@ int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node) its_msi_chip->fw_node = fw_node; its_msi_chip->translation_id = trans_id; + its_msi_chip->base_addr = base; spin_lock(&iort_msi_chip_lock); list_add(&its_msi_chip->list, &iort_msi_chip_list); @@ -481,6 +485,24 @@ int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id) return -ENODEV; } +static int iort_find_its_base(u32 its_id, phys_addr_t *base) +{ + struct iort_its_msi_chip *its_msi_chip; + bool match = false; + + spin_lock(&iort_msi_chip_lock); + list_for_each_entry(its_msi_chip, &iort_msi_chip_list, list) { + if (its_msi_chip->translation_id == its_id) { + *base = its_msi_chip->base_addr; + match = true; + break; + } + } + spin_unlock(&iort_msi_chip_lock); + + return match ? 0 : -ENODEV; +} + /** * iort_dev_find_its_id() - Find the ITS identifier for a device * @dev: The device. @@ -639,6 +661,67 @@ int iort_add_device_replay(const struct iommu_ops *ops, struct device *dev) return err; } + +/** + * iort_iommu_its_get_resv_regions - Reserved region driver helper + * @dev: Device from iommu_get_resv_regions() + * @list: Reserved region list from iommu_get_resv_regions() + * + * Returns: Number of reserved regions on success(0 if no associated ITS), + * appropriate error value otherwise. + * + * IOMMU drivers can use this to implement their .get_resv_regions callback + * for reserving the HW ITS address regions. + */ +int iort_iommu_its_get_resv_regions(struct device *dev, struct list_head *head) +{ + int i; + struct acpi_iort_its_group *its; + struct acpi_iort_node *node, *its_node = NULL; + int resv = 0; + + node = iort_find_dev_node(dev); + if (!node) + return -ENODEV; + + if (dev_is_pci(dev)) { + u32 rid; + + pci_for_each_dma_alias(to_pci_dev(dev), __get_pci_rid, &rid); + its_node = iort_node_map_id(node, rid, NULL, IORT_MSI_TYPE); + } else { + for (i = 0; i < node->mapping_count; i++) { + its_node = iort_node_map_platform_id(node, NULL, + IORT_MSI_TYPE, i); + if (its_node) + break; + } + } + + if (!its_node) + return 0; + + /* Move to ITS specific data */ + its = (struct acpi_iort_its_group *)its_node->node_data; + + for (i = 0; i < its->its_count; i++) { + phys_addr_t base; + + if (!iort_find_its_base(its->identifiers[i], &base)) { + int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; + struct iommu_resv_region *region; + + region = iommu_alloc_resv_region(base, SZ_128K, prot, + IOMMU_RESV_MSI); + if (region) { + list_add_tail(®ion->list, head); + resv++; + } + } + } + + return (resv == its->its_count) ? resv : -ENODEV; +} #else static inline const struct iommu_ops *iort_fwspec_iommu_ops(struct iommu_fwspec *fwspec) @@ -646,6 +729,8 @@ const struct iommu_ops *iort_fwspec_iommu_ops(struct iommu_fwspec *fwspec) static inline int iort_add_device_replay(const struct iommu_ops *ops, struct device *dev) { return 0; } +int iort_iommu_its_get_resv_regions(struct device *dev, struct list_head *head) +{ return -ENODEV; } #endif static const struct iommu_ops *iort_iommu_xlate(struct device *dev, diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 6893287..77322b3 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -1928,7 +1928,8 @@ static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header, return -ENOMEM; } - err = iort_register_domain_token(its_entry->translation_id, dom_handle); + err = iort_register_domain_token(its_entry->translation_id, res.start, + dom_handle); if (err) { pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n", &res.start, its_entry->translation_id); diff --git a/include/linux/acpi_iort.h b/include/linux/acpi_iort.h index 8379d40..56bb6c7 100644 --- a/include/linux/acpi_iort.h +++ b/include/linux/acpi_iort.h @@ -26,7 +26,8 @@ #define IORT_IRQ_MASK(irq) (irq & 0xffffffffULL) #define IORT_IRQ_TRIGGER_MASK(irq) ((irq >> 32) & 0xffffffffULL) -int iort_register_domain_token(int trans_id, struct fwnode_handle *fw_node); +int iort_register_domain_token(int trans_id, phys_addr_t base, + struct fwnode_handle *fw_node); void iort_deregister_domain_token(int trans_id); struct fwnode_handle *iort_find_domain_token(int trans_id); #ifdef CONFIG_ACPI_IORT @@ -38,8 +39,10 @@ /* IOMMU interface */ void iort_set_dma_mask(struct device *dev); const struct iommu_ops *iort_iommu_configure(struct device *dev); +int iort_iommu_its_get_resv_regions(struct device *dev, struct list_head *head); #else static inline void acpi_iort_init(void) { } +static inline bool iort_node_match(u8 type) { return false; } static inline u32 iort_msi_map_rid(struct device *dev, u32 req_id) { return req_id; } static inline struct irq_domain *iort_get_device_domain(struct device *dev, @@ -51,6 +54,9 @@ static inline void iort_set_dma_mask(struct device *dev) { } static inline const struct iommu_ops *iort_iommu_configure(struct device *dev) { return NULL; } +static inline +int iort_iommu_its_get_resv_regions(struct device *dev, struct list_head *head) +{ return -ENODEV; } #endif #endif /* __ACPI_IORT_H__ */ From patchwork Tue Jul 25 11:17:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shameerali Kolothum Thodi X-Patchwork-Id: 108636 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp446173qge; Tue, 25 Jul 2017 04:19:50 -0700 (PDT) X-Received: by 10.84.179.165 with SMTP id b34mr12386734plc.455.1500981590751; Tue, 25 Jul 2017 04:19:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500981590; cv=none; d=google.com; s=arc-20160816; b=UyrvM4XkBGWcr0PDiz1vvgTYOKrdzo/TQ467AlQ5VXODIZNzYBlz6A0LrIakI0o8Y6 5HYVRuvrOY/5ipCSSdoeU2WH5RJxudiNxI0ShXXh1xCepptxmvMurUnEl0zcHipkcoOv NHH3Ga/hef9U5BAFB6v/YT+IeaIKQhv+ixT/O6SFyctmz+TlsaRC5T+icFeTd1eNvNdN +fCg7eJpdTYYeNCwQL943llkLfoFlYwVbfdTEBYS94ba2pDa7mKemcTN1I7G68cNQlva bh2I7mA5EzSJVDh6QJyK6i3lwDHDQtqBYJBRum6cHWhIqvI6NI9uJ2wVNoLOhLUc+gJl +6Sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=4sYYxGL+itDYhMVRkyJru7eQhNz0eogMO+8bukCRCjA=; b=uWJR4tMOIqr3SvICA2BOcuLUQQZLvpO49vPCha0csgQjTRWAsIfcdjTyGbMU5HIvBO T9YExAxXGhaIWSYpWQigVhSwyJcfvumWuZo8cMa11DZjgU8dWaMtmpD3lcvL0bP9HqNY Kaok6BbZTab0nTRpStkArVBn5smws4Yk2ePzmgwCA67zAU3+aduq94cot9KzB8PdDUXy 54Jw47UelG/D70auwZhbkjgIj6PIBfuLglZyPvW8T2BU0iDHIz2do+CvSMwHEjqHytwm QwQiRYkS7SWk7xxjwsaBJrSjVhrANLTKY7jGVwfonTwjU8Lo8vlA088KKV9OZVeKshAC SwpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h11si8572998plk.114.2017.07.25.04.19.50; Tue, 25 Jul 2017 04:19:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-acpi-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751527AbdGYLTt (ORCPT + 7 others); Tue, 25 Jul 2017 07:19:49 -0400 Received: from szxga03-in.huawei.com ([45.249.212.189]:9413 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750839AbdGYLTs (ORCPT ); Tue, 25 Jul 2017 07:19:48 -0400 Received: from 172.30.72.57 (EHLO dggeml406-hub.china.huawei.com) ([172.30.72.57]) by dggrg03-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id ARZ13630; Tue, 25 Jul 2017 19:19:42 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.203.177.212) by dggeml406-hub.china.huawei.com (10.3.17.50) with Microsoft SMTP Server id 14.3.301.0; Tue, 25 Jul 2017 19:19:35 +0800 From: Shameer Kolothum To: , , , , , CC: , , , , , , , , , Shameer Kolothum Subject: [PATCH v4 2/2] iommu/dma: Add HW MSI address regions reservation for IOMMU drivers Date: Tue, 25 Jul 2017 12:17:32 +0100 Message-ID: <20170725111732.41792-3-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170725111732.41792-1-shameerali.kolothum.thodi@huawei.com> References: <20170725111732.41792-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.203.177.212] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A0B0207.5977294F.0032, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 61d326fb0f2c7f44d710b46e421f90d2 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Modified iommu_dma_get_resv_regions() to include HW MSI (ARM GICv3 ITS MSI) specific reservations if available. Suggested-by: Robin Murphy Signed-off-by: Shameer Kolothum --- drivers/iommu/dma-iommu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 9d1cebe..3b6fde7 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -19,6 +19,7 @@ * along with this program. If not, see . */ +#include #include #include #include @@ -167,13 +168,18 @@ void iommu_put_dma_cookie(struct iommu_domain *domain) * * IOMMU drivers can use this to implement their .get_resv_regions callback * for general non-IOMMU-specific reservations. Currently, this covers host - * bridge windows for PCI devices. + * bridge windows for PCI devices and HW MSI(ARM GICv3 ITS MSI) region + * reservations if avialable. */ void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list) { struct pci_host_bridge *bridge; struct resource_entry *window; + if (!is_of_node(dev->iommu_fwspec->iommu_fwnode) && + iort_iommu_its_get_resv_regions(dev, list) < 0) + return; + if (!dev_is_pci(dev)) return;