From patchwork Tue Jul 25 07:37:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 108623 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp260950qge; Tue, 25 Jul 2017 00:42:14 -0700 (PDT) X-Received: by 10.84.241.139 with SMTP id b11mr15926681pll.422.1500968534480; Tue, 25 Jul 2017 00:42:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500968534; cv=none; d=google.com; s=arc-20160816; b=hFyEUTbdoH/fTjAQ8guOiDxozJKpAnujHSOnNfMDTb6Srkvnp+k4BJtGi/22TLPKiv hszm2Uqsojw7An9n+55x2OXjJgw1U51nQf/c6G6AwQ1aePlI6xK78scOHia78BBRR8/l XxcaeuqC6/AGaRsg6Fcvmw3NmznFZEkJZOinkjmjeD/jo57Qtto/4Dal1uhm/7zY/lBu JA6Yue55Qt5MOm+Rnn3wPHqUfrrxY2W0korLw7frt/+aVcKf/0ZPRCQ6MNEu1xiKZKmw Y/rl/IPvXAH0+8KPf8HYXrTRqXzMhj3RtOdASXMBlcuWCLFAZkjcRgO0qb+Sl8oXOmNx hFSA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=z1lGEXXWKcjO2X3l3eOjvvL/c7WzrQWUvQ6eySyJelo=; b=UEnR9hN37lrt1nCeHgxKMlfhKNcZlGXfpvHXbrzMgGdv3jKmuE+W65PT0GdVhqxxPu xEl77EhIhajSVHBAw/19OCU5foxlEca4pv4VoIljd5WlBr8xDkPFX5KTzO8SFN1+fSFu h4R4y8ON2IAmfLFrgBYWdV4Hymo4bp7ljpm4AM4aWwJ3+MZkIX8kZuBKM9Gbd/a5Ledd oLPKYi6fvrvSk1FFIq/0vyohx/jGHWQ90uKRmYjhZ46cM24HicINdmbZqKyCuyiHzTAe QYNTmaVbWZSFNYrdlf6MT1xrXB9iJ5MffsT9skWg8ZT9v0sjqlPumMxXM+uU6gmExqS1 TgFw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q20si7722905pfq.106.2017.07.25.00.42.14; Tue, 25 Jul 2017 00:42:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751700AbdGYHmM (ORCPT + 7 others); Tue, 25 Jul 2017 03:42:12 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:42351 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751527AbdGYHlP (ORCPT ); Tue, 25 Jul 2017 03:41:15 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B7A802094A; Tue, 25 Jul 2017 09:41:12 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8870C21DFE; Tue, 25 Jul 2017 09:40:54 +0200 (CEST) From: Quentin Schulz To: mturquette@baylibre.com, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, lgirdwood@gmail.com, broonie@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@free-electrons.com, linux@armlinux.org.uk, boris.brezillon@free-electrons.com, perex@perex.cz, tiwai@suse.com Cc: cyrille.pitchen@wedev4u.fr, thomas.petazzoni@free-electrons.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, Quentin Schulz Subject: [PATCH v4 7/9] ASoC: atmel-classd: remove aclk clock from DT binding Date: Tue, 25 Jul 2017 09:37:08 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since gclk (generated-clk) is now able to determine the rate of the audio_pll, there is no need for classd to have a direct phandle to the audio_pll while already having a phandle to gclk. This binding is used by no board in mainline so it is safe to be modified. Signed-off-by: Quentin Schulz Acked-by: Mark Brown Acked-by: Rob Herring --- Documentation/devicetree/bindings/sound/atmel-classd.txt | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) -- git-series 0.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/sound/atmel-classd.txt b/Documentation/devicetree/bindings/sound/atmel-classd.txt index 549e701..8985510 100644 --- a/Documentation/devicetree/bindings/sound/atmel-classd.txt +++ b/Documentation/devicetree/bindings/sound/atmel-classd.txt @@ -13,13 +13,11 @@ Required properties: Must be "tx". - clock-names Tuple listing input clock names. - Required elements: "pclk", "gclk" and "aclk". + Required elements: "pclk" and "gclk". - clocks Please refer to clock-bindings.txt. - assigned-clocks Should be <&classd_gclk>. -- assigned-clock-parents - Should be <&audio_pll_pmc>. Optional properties: - pinctrl-names, pinctrl-0 @@ -45,10 +43,9 @@ classd: classd@fc048000 { (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(47))>; dma-names = "tx"; - clocks = <&classd_clk>, <&classd_gclk>, <&audio_pll_pmc>; - clock-names = "pclk", "gclk", "aclk"; + clocks = <&classd_clk>, <&classd_gclk>; + clock-names = "pclk", "gclk"; assigned-clocks = <&classd_gclk>; - assigned-clock-parents = <&audio_pll_pmc>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_classd_default>; From patchwork Tue Jul 25 07:37:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 108622 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp260764qge; Tue, 25 Jul 2017 00:41:59 -0700 (PDT) X-Received: by 10.98.63.10 with SMTP id m10mr9300190pfa.232.1500968518988; Tue, 25 Jul 2017 00:41:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500968518; cv=none; d=google.com; s=arc-20160816; b=etGVq+xWOs1ofJLDJqip+c2ztLqUEH/l++dxx6xNDqvvC8GG3SUy9/t/o2IAcgEFdI Z9NaIdum7ZG6jR06IJIvkbAsg38dbcvdGD1AF0+i83I5YwXiNtnpqF8hfwiYof3/UcZN HWBSXlBIaQGVQs0fGe/aykpRPehncLERWMFhvhsYr3NkxALIAxMB2f54XgzGRsvP1sNF EKR1HPZIJ82bksGRhS0nXQ6CPuVwbOVG8KM1qLDAKWXFgaHF28cuQhqW6Tg5EJiJ6MK5 tMG4PD82X692yxjR2anCJtClzmMHcsfOgbqwEAyam+qW698TuJV4tvceTGa5GZs5fY5x BaKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ehMQiDRIR0lQdYzRU1EqL117gxLuFbuxOnydAQTj8W0=; b=kjrlnIhp5E1zEecjjvNZIrK/8PC/dcrRCKCWyO+3sbz4WaAkszozob1GkxD3EhTd7q gJjmsbFHlS5jod3EKinS9BGOKIx8b39EN9SAbMQGeFWQES6MpnE4tkq85WMRauByEdTi ZzSRyMT86N/ZJrXWI9pomy4Y7ZVR2MMEtzz+YvtTKNyrn/+w22nDU+ji3/n1BI/LiQ0l bxYfj2PKwjR1wF07/hySZ2kmBDbEG3SY9ipRDYXodt3KwrIRLTEkFL2Cjf3AtoSRRcbB +I1LrkWt7KswMY9+P85fASJP5l5qiS59eh7I+sJ/Xueq13AKbTSdipE3L2vq/G+qTYpb Aj2Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 188si7703259pfe.269.2017.07.25.00.41.58; Tue, 25 Jul 2017 00:41:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751646AbdGYHl5 (ORCPT + 7 others); Tue, 25 Jul 2017 03:41:57 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:42380 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751540AbdGYHlQ (ORCPT ); Tue, 25 Jul 2017 03:41:16 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 1D94721D43; Tue, 25 Jul 2017 09:41:13 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id DC52721E7B; Tue, 25 Jul 2017 09:40:54 +0200 (CEST) From: Quentin Schulz To: mturquette@baylibre.com, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, lgirdwood@gmail.com, broonie@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@free-electrons.com, linux@armlinux.org.uk, boris.brezillon@free-electrons.com, perex@perex.cz, tiwai@suse.com Cc: cyrille.pitchen@wedev4u.fr, thomas.petazzoni@free-electrons.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, Quentin Schulz Subject: [PATCH v4 8/9] ASoC: atmel-classd: remove aclk clock Date: Tue, 25 Jul 2017 09:37:09 +0200 Message-Id: <645aa35fec4a2384ca2f3039615ee6598602f9e2.1500968090.git-series.quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since gclk (generated-clk) is now able to determine the rate of the audio_pll, there is no need for classd to have a direct phandle to the audio_pll while already having a phandle to gclk. Thus, remove all mentions to aclk in classd driver and update macros and variable names. Signed-off-by: Quentin Schulz Acked-by: Mark Brown --- sound/soc/atmel/atmel-classd.c | 47 ++++++++++------------------------- 1 file changed, 14 insertions(+), 33 deletions(-) -- git-series 0.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Nicolas Ferre diff --git a/sound/soc/atmel/atmel-classd.c b/sound/soc/atmel/atmel-classd.c index b7ef8c5..be6b775 100644 --- a/sound/soc/atmel/atmel-classd.c +++ b/sound/soc/atmel/atmel-classd.c @@ -32,7 +32,6 @@ struct atmel_classd { struct regmap *regmap; struct clk *pclk; struct clk *gclk; - struct clk *aclk; int irq; const struct atmel_classd_pdata *pdata; }; @@ -330,11 +329,6 @@ static int atmel_classd_codec_dai_startup(struct snd_pcm_substream *substream, { struct snd_soc_pcm_runtime *rtd = substream->private_data; struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); - int ret; - - ret = clk_prepare_enable(dd->aclk); - if (ret) - return ret; return clk_prepare_enable(dd->gclk); } @@ -357,31 +351,31 @@ static int atmel_classd_codec_dai_digital_mute(struct snd_soc_dai *codec_dai, return 0; } -#define CLASSD_ACLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) -#define CLASSD_ACLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) +#define CLASSD_GCLK_RATE_11M2896_MPY_8 (112896 * 100 * 8) +#define CLASSD_GCLK_RATE_12M288_MPY_8 (12288 * 1000 * 8) static struct { int rate; int sample_rate; int dsp_clk; - unsigned long aclk_rate; + unsigned long gclk_rate; } const sample_rates[] = { { 8000, CLASSD_INTPMR_FRAME_8K, - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, { 16000, CLASSD_INTPMR_FRAME_16K, - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, { 32000, CLASSD_INTPMR_FRAME_32K, - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, { 48000, CLASSD_INTPMR_FRAME_48K, - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, { 96000, CLASSD_INTPMR_FRAME_96K, - CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_ACLK_RATE_12M288_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_12M288, CLASSD_GCLK_RATE_12M288_MPY_8 }, { 22050, CLASSD_INTPMR_FRAME_22K, - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, { 44100, CLASSD_INTPMR_FRAME_44K, - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, { 88200, CLASSD_INTPMR_FRAME_88K, - CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_ACLK_RATE_11M2896_MPY_8 }, + CLASSD_INTPMR_DSP_CLK_FREQ_11M2896, CLASSD_GCLK_RATE_11M2896_MPY_8 }, }; static int @@ -410,13 +404,12 @@ atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, } dev_dbg(codec->dev, - "Selected SAMPLE_RATE of %dHz, ACLK_RATE of %ldHz\n", - sample_rates[best].rate, sample_rates[best].aclk_rate); + "Selected SAMPLE_RATE of %dHz, GCLK_RATE of %ldHz\n", + sample_rates[best].rate, sample_rates[best].gclk_rate); clk_disable_unprepare(dd->gclk); - clk_disable_unprepare(dd->aclk); - ret = clk_set_rate(dd->aclk, sample_rates[best].aclk_rate); + ret = clk_set_rate(dd->gclk, sample_rates[best].gclk_rate); if (ret) return ret; @@ -426,10 +419,6 @@ atmel_classd_codec_dai_hw_params(struct snd_pcm_substream *substream, snd_soc_update_bits(codec, CLASSD_INTPMR, mask, val); - ret = clk_prepare_enable(dd->aclk); - if (ret) - return ret; - return clk_prepare_enable(dd->gclk); } @@ -441,7 +430,6 @@ atmel_classd_codec_dai_shutdown(struct snd_pcm_substream *substream, struct atmel_classd *dd = snd_soc_card_get_drvdata(rtd->card); clk_disable_unprepare(dd->gclk); - clk_disable_unprepare(dd->aclk); } static int atmel_classd_codec_dai_prepare(struct snd_pcm_substream *substream, @@ -596,13 +584,6 @@ static int atmel_classd_probe(struct platform_device *pdev) return ret; } - dd->aclk = devm_clk_get(dev, "aclk"); - if (IS_ERR(dd->aclk)) { - ret = PTR_ERR(dd->aclk); - dev_err(dev, "failed to get audio clock: %d\n", ret); - return ret; - } - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); io_base = devm_ioremap_resource(dev, res); if (IS_ERR(io_base)) { From patchwork Tue Jul 25 07:37:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 108619 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp260292qge; Tue, 25 Jul 2017 00:41:20 -0700 (PDT) X-Received: by 10.84.231.194 with SMTP id g2mr20780664pln.5.1500968480360; Tue, 25 Jul 2017 00:41:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500968480; cv=none; d=google.com; s=arc-20160816; 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[209.132.180.67]) by mx.google.com with ESMTP id c8si8226815plk.233.2017.07.25.00.41.20; Tue, 25 Jul 2017 00:41:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751574AbdGYHlS (ORCPT + 7 others); Tue, 25 Jul 2017 03:41:18 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:42391 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751548AbdGYHlR (ORCPT ); Tue, 25 Jul 2017 03:41:17 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 21F7821E7B; Tue, 25 Jul 2017 09:41:13 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 3C28721E7C; Tue, 25 Jul 2017 09:40:55 +0200 (CEST) From: Quentin Schulz To: mturquette@baylibre.com, sboyd@codeaurora.org, robh+dt@kernel.org, mark.rutland@arm.com, lgirdwood@gmail.com, broonie@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@free-electrons.com, linux@armlinux.org.uk, boris.brezillon@free-electrons.com, perex@perex.cz, tiwai@suse.com Cc: cyrille.pitchen@wedev4u.fr, thomas.petazzoni@free-electrons.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alsa-devel@alsa-project.org, linux-arm-kernel@lists.infradead.org, Quentin Schulz , Cyrille Pitchen , Nicolas Ferre Subject: [PATCH v4 9/9] ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd Date: Tue, 25 Jul 2017 09:37:10 +0200 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Cyrille Pitchen This patch adds the pin muxing for classd and enables it. Signed-off-by: Cyrille Pitchen Signed-off-by: Nicolas Ferre Signed-off-by: Quentin Schulz --- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- git-series 0.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts b/arch/arm/boot/dts/at91-sama5d2_xplained.dts index 6eec8dc..c7e9ccf 100644 --- a/arch/arm/boot/dts/at91-sama5d2_xplained.dts +++ b/arch/arm/boot/dts/at91-sama5d2_xplained.dts @@ -355,6 +355,14 @@ bias-pull-up; }; + pinctrl_classd_default: classd_default { + pinmux = , + , + , + ; + bias-pull-up; + }; + pinctrl_flx0_default: flx0_default { pinmux = , ; @@ -488,6 +496,14 @@ }; + classd: classd@fc048000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_classd_default>; + atmel,pwm-type = "diff"; + atmel,non-overlap-time = <10>; + status = "okay"; + }; + can1: can@fc050000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_default>;