From patchwork Thu Jun 18 13:06:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 191102 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1405451ilo; Thu, 18 Jun 2020 06:07:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw3oFoulAyJhOlfka3LMc33yaaPQcZQT14TfYCBIRat6A4PvF7/ymE0xstJPukzdWJ6HnVX X-Received: by 2002:a17:907:35c2:: with SMTP id ap2mr3684458ejc.530.1592485643776; Thu, 18 Jun 2020 06:07:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592485643; cv=none; d=google.com; s=arc-20160816; b=bKBVUn70XYDtkGRBQwTuWjzYn2YakoInpTZf8o6TXSY6MEtuHC6D3vFjGFWQ8k59jm 1A/iSpVdVsiQ3jlpOei1cNl0eS5vpSaY9wxNv15HqHsCBB1CkIj8URytXeW4FGuiihY9 pPOYSlB/KCqsWenNvVenq/5X0Zhu4bs39iaukYUnjcRErEEzZQSp97jYjyrP2SY7GDMb XCMyXWkz1EohOu3+EUAMBLi2z4yFX7SdlY7rLldS5P6N5iP5sx3OdiYSVGsszJi1pYdO XAOVg0dIax19eQQIF00HFlV2xn4U/a2dOjYHQGG9wTTcLViWnlGAsks60QS2Wcy13Uoz au3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=5XU/0J3RAI8AZsj9EUAZG/2xnH7KRcguIz1gSCUQgL8=; b=y4a7IRVzMlSNo2w4IQb3uYMpm2g+dMfUmyBtv2GAqP0sFW0NnEPIM2dkaEO83GVEOi Y8EJWvkhjfgTuHm0cOqEkd1Ya3irLa27hFChD2Tvs8IsB1y8vz1Wngm5G7u12IHkbhJu kAb4ibDtf1yGYWselFTJc7d5X/MABAL3IOayJPSn7E5hENLfAaAknAZKXkFAbI59T/Gl pvt9z6i1O/2EJ1X3+8EirQbl3AXZ3tj2CB+3ZbjinsOFgrQNNqBDUdjVz8XxCBooOB6q Vk7S7ZKd02RBDdJymTSL/DWpJYDbJpSElRwYZZj5wPs6DxGLjbWzFG2/QYdFf/vnTLGt nqlw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=Qk4+YYl8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d18si1921810edv.51.2020.06.18.06.07.23; Thu, 18 Jun 2020 06:07:23 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=Qk4+YYl8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725953AbgFRNHS (ORCPT + 6 others); Thu, 18 Jun 2020 09:07:18 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:12542 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730078AbgFRNHR (ORCPT ); Thu, 18 Jun 2020 09:07:17 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05ID4TDA002369; Thu, 18 Jun 2020 15:07:03 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=5XU/0J3RAI8AZsj9EUAZG/2xnH7KRcguIz1gSCUQgL8=; b=Qk4+YYl8GlgAHbuzKtdbXHneDZTRQFNa5antsevYD8QYI4GF/oo1BuJkuqvm/AmvpFS4 QoT9nIXQaIAK3iw1sw/PAqfaF4o440QgpTwIQzoUees9zH38ExEWZ6LOnHN6liQJFDMH X3QviWkhD77oYqlQaT0CRpHaNWx+yG5V+gxtHQy0RHfPS93jro+8LQ3xyHT/jAkMIFuM aEbkYfQYoQDNiA2T9ZDS5+LMBhIpFI5LvnPOVghRWSg2cZ/iSATzJcAxf0rZmDvlo6nF MuHhtoWJ0+Q+f7RU+z9O2r4x9e1c3vpp4GnWQHdc4lX7ZDfFyFcMkctnw63yT/2VdEhc pw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31q649k3gk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2020 15:07:03 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BF2EC100034; Thu, 18 Jun 2020 15:06:59 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AC9382AAA9A; Thu, 18 Jun 2020 15:06:59 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 18 Jun 2020 15:06:59 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH v2 1/5] ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl Date: Thu, 18 Jun 2020 15:06:47 +0200 Message-ID: <20200618130651.29836-2-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200618130651.29836-1-erwan.leray@st.com> References: <20200618130651.29836-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG4NODE2.st.com (10.75.127.11) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-18_12:2020-06-18,2020-06-18 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds usart2_pins_c, usart3_pins_b, usart3_pins_c and uart7_pins_c pins configurations in stm32mp15-pinctrl. - usart2_pins_c pins are connected to Bluetooth chip on dk2 board. - usart3_pins_b pins are connected to GPIO expansion connector on evx board. - usart3_pins_c pins are connected to GPIO expansion connector on dkx board. - uart7_pins_c pins are connected to Arduino Uno connector on dkx board. Signed-off-by: Erwan Le Ray Changes in v2: - Update UART7 pins comments. Comments indicated "USART" instead of "UART". -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index fb98a66977fe..21b0906accf3 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -1658,6 +1658,36 @@ }; }; + uart7_pins_c: uart7-1 { + pins1 { + pinmux = ; /* UART7_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART7_RX */ + bias-disable; + }; + }; + + uart7_idle_pins_c: uart7-idle-1 { + pins1 { + pinmux = ; /* UART7_TX */ + }; + pins2 { + pinmux = ; /* UART7_RX */ + bias-disable; + }; + }; + + uart7_sleep_pins_c: uart7-sleep-1 { + pins { + pinmux = , /* UART7_TX */ + ; /* UART7_RX */ + }; + }; + uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -1719,6 +1749,42 @@ }; }; + usart2_pins_c: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_idle_pins_c: usart2-idle-0 { + pins1 { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART2_RX */ + bias-disable; + }; + }; + + usart2_sleep_pins_c: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; + usart3_pins_a: usart3-0 { pins1 { pinmux = ; /* USART3_TX */ @@ -1732,6 +1798,78 @@ }; }; + usart3_pins_b: usart3-0 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_idle_pins_b: usart3-idle-0 { + pins1 { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RX */ + bias-disable; + }; + }; + + usart3_sleep_pins_b: usart3-sleep-0 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + + usart3_pins_c: usart3-1 { + pins1 { + pinmux = , /* USART3_TX */ + ; /* USART3_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART3_RX */ + ; /* USART3_CTS_NSS */ + bias-disable; + }; + }; + + usart3_idle_pins_c: usart3-idle-1 { + pins1 { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + ; /* USART3_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART3_RX */ + bias-disable; + }; + }; + + usart3_sleep_pins_c: usart3-sleep-1 { + pins { + pinmux = , /* USART3_TX */ + , /* USART3_RTS */ + , /* USART3_CTS_NSS */ + ; /* USART3_RX */ + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ From patchwork Thu Jun 18 13:06:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 191103 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1405477ilo; Thu, 18 Jun 2020 06:07:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyOYxtirAufxWVl97dEOOOaBVQjdulMdg7rl+S6U/ukWdcVCEHX0NKw0tJoV35shBFvyb19 X-Received: by 2002:a17:906:6a0a:: with SMTP id o10mr3884541ejr.192.1592485645440; Thu, 18 Jun 2020 06:07:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592485645; cv=none; d=google.com; s=arc-20160816; b=09hkCed/e67WWM5gInLHuzhBy8lw6upzxRKLkYVhHaqUVx0eV4cZ4uThUs6HH/wh/3 TnvkVrQY5kcM6BpNcCbtXotEsJ9QQgp8JNJLId56rG6qz09tBzjEBMDregIq6gWilM+E 0T1uSebr8EnUJqj/yZmHo9QhE/Jp7aKXEbkXdULV2ajshNbTcRgU5PiW31R8R9zT3FOY KQuSgl5CjOSjFcDJ0ojEF7KAMEONNj7CuQF0sRn8Q3+Eia96h1DKfQ0zGdvBaw3QO043 rzNJ8vmFwKGqVHxdM7SYWIoYw36m9hN/bmu3vqcHVDKAPtiQymw2NxMmw/LuaaZwnf8t hP0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=F1ks9VYjpvP05Of9CUD3DC+d0dNYqSzdgBJGWySKuj0=; b=Jg695hmwF61VW5x804M6fjTvwnH6PLHhfJcJT04RwSlRsxMAI+lzEUtdsixGBla+ea 0GmiFp+4zdBxdQ1jqTTTUyr7ANa0jWQZTYO3AzWboSnIr2HZtF9kVtzGDdaKX3+/N73t y+bSZ0wdplvSxV3vSFV62ha67M8J+TuqJw3uy+ETqJIKhZ+9dKRMPuidb7KPLOMkx3Zc a2oTZF4gIzrozqtcrudQ6vZks70Xgr67/vLwDBa84s9Pm4FKTDwJTP8JbABQjkc2zqxw k4VuoKD7xgNnh9o7U6qAnWj3W2FhgpCHZfayFjYBI0OAK8Tbw+JUIKLEoHUOHiNlSLDu 6KHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=d+ISS4mv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d18si1921810edv.51.2020.06.18.06.07.25; Thu, 18 Jun 2020 06:07:25 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=d+ISS4mv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730122AbgFRNHX (ORCPT + 6 others); Thu, 18 Jun 2020 09:07:23 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:20174 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730066AbgFRNHS (ORCPT ); Thu, 18 Jun 2020 09:07:18 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05ID3ERd009888; Thu, 18 Jun 2020 15:07:02 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=F1ks9VYjpvP05Of9CUD3DC+d0dNYqSzdgBJGWySKuj0=; b=d+ISS4mv/dq48tUeqUnycN/ahs453L892x1wpss62YITWDE1KX1rJorn7sgVq7c1sPQt A8RtqpMEUMlMmfp/dNYiosfdxRRG5ZNXZdOoCwHAZx4AGZ40xkM97LNcdJBJnLqb1xoR uYilZOHUYJxY9B4zOoOFJdylqSvT0du4X00Q49GzhhVeuk40qo6b1yq+XytLofsZfTg5 Vr9wo5OIrItw3NZpZd2iQIhYh/jwUUdFDzCiUasCqr0cNPLEhhrMdhx7tFk4tT6R5uzv dexvChLiBHy+6w1NL0KddZKqV2HehgRR8ffIWMIXB0eBSx7xa3hLRyomqu1dAAYcM3ZR /w== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31q6jmjyux-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2020 15:07:02 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6CCDC100038; Thu, 18 Jun 2020 15:07:00 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 603062AAA6C; Thu, 18 Jun 2020 15:07:00 +0200 (CEST) Received: from localhost (10.75.127.46) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 18 Jun 2020 15:06:59 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH v2 2/5] ARM: dts: stm32: add usart3 node to stm32mp15xx-dkx boards Date: Thu, 18 Jun 2020 15:06:48 +0200 Message-ID: <20200618130651.29836-3-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200618130651.29836-1-erwan.leray@st.com> References: <20200618130651.29836-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-18_12:2020-06-18,2020-06-18 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds usart3 node to stm32mp15xx-dkx and usart3 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts index d03d4cd2606a..65ee61b7667a 100644 --- a/arch/arm/boot/dts/stm32mp157a-dk1.dts +++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts @@ -18,6 +18,7 @@ aliases { ethernet0 = ðernet0; serial0 = &uart4; + serial1 = &usart3; }; chosen { diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts index 9a8a26710ac1..fb690a817e28 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts @@ -19,6 +19,7 @@ aliases { ethernet0 = ðernet0; serial0 = &uart4; + serial1 = &usart3; }; chosen { diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi index e5fdbc149bf4..243aa4b2063d 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi @@ -591,6 +591,15 @@ status = "okay"; }; +&usart3 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart3_pins_c>; + pinctrl-1 = <&usart3_sleep_pins_c>; + pinctrl-2 = <&usart3_idle_pins_c>; + uart-has-rtscts; + status = "disabled"; +}; + &usbh_ehci { phys = <&usbphyc_port0>; status = "okay"; From patchwork Thu Jun 18 13:06:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 191101 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1405358ilo; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8QzPexkZw6KWIt0XklgawUiEWlEgER7FQUNOxf/kkZPKy0GfBWzdgbC/Hpe9GCYG58Okr X-Received: by 2002:a50:951d:: with SMTP id u29mr4088239eda.333.1592485637559; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592485637; cv=none; d=google.com; s=arc-20160816; b=qtLMFNDr6kMWV9pTj6R69WR52hov1NnJZN4e/wz1is7zA/tIJK28JKlUDetf2sKzop LwvLgwc/80YPBK4Ox3+5w79XzjvVifnnaVoCILw+oY6VZe4PU9gFpKuqyLc0mjA9fbHT /2JE4sNiLJImLHX5SFYFjos+JTawbUoyWVScxSkdEeoCR6bHO+h3JJmmrETluuJmyIkd bvNWXbGyB/h37+1rFfBOL/fUW5dzbY0mVeuILWgrshLXPrP1d2MD9l6WoXx9vdDBh3fg DXSZRZTLr7khwOZpMik5nUh4btIJucalUIzH2UMQmMAIX7Jh8sV0yGE9SgWvXS29g4sC 9AfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=wzZNcYBfyuUeNiTtVen51N6/kCN5vjlsNYLVHoB5I1A=; b=MvUq0GIpxg9AA8Fpa4Jg4e7/D2AvaiWl6A8FyUeIY3cWUA1UvrqjoXGbwrClt1VXcC sPzHRSq4POyanBtB8s/CUdXVsFccFvxhRPnjoG3pUOawHS9Y9Qnliw0e3OA4/kE+i4UT zMSWoBllWpbe6HFZf/ywrBidbIs8UMzWXdA+ob0yTYMR9UAIhdrTGO8Xd8pBRE4wgMTs 0o8ybDAZce/hWHNKmpqhJwboMj6YnPj/6PjBYKPzodL7j1uUzjYvpOp2uzNpk13aHAnn gyzFq3s+11j2QSeyzf7UozhSwKrQLP7KkfiWf8oP/eBCyMm/hflwPza7PDULUNlQ/Xwc iZzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=oAdAxGYN; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n9si1944827ejz.644.2020.06.18.06.07.17; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=oAdAxGYN; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730061AbgFRNHP (ORCPT + 6 others); Thu, 18 Jun 2020 09:07:15 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:56998 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725953AbgFRNHP (ORCPT ); Thu, 18 Jun 2020 09:07:15 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05ID2ZVf030156; Thu, 18 Jun 2020 15:07:02 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=wzZNcYBfyuUeNiTtVen51N6/kCN5vjlsNYLVHoB5I1A=; b=oAdAxGYNAqXNISIMfpu6F7A2plIhnbbyY82kJ4K6Q3tUNw6HZQ/IbOIeizV1OgbHdghB Ra4ZHCnBrxYdLr2yLFl9YLTdsByD3OACm9Rdv96xR10vie6X3HOrzHCoN6lj2Y012Owm jn2HJmRaVIGLs3A8GWse3kDi/bVmm4kAit885Vo1iZ51wVu4GuHkCFfMUnwcT/ptbQO+ yW7PBpCApFW1FpWzqLS4PzwLXaKsUzJ+eHvAZxfJgg7sOfVH8dLtfr+jwwcKnZFS1Zmx 581JUZ6BYRim+d3pi0i7+hYMTeS29ZY06KfexohQm1IFyoWu42mAoe0rig/jGA9ep8rF zQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31q64cb3ft-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2020 15:07:02 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 30FFD10002A; Thu, 18 Jun 2020 15:07:01 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 248C62B8A0D; Thu, 18 Jun 2020 15:07:01 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 18 Jun 2020 15:07:00 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH v2 3/5] ARM: dts: stm32: add usart3 node to stm32mp157c-ev1 Date: Thu, 18 Jun 2020 15:06:49 +0200 Message-ID: <20200618130651.29836-4-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200618130651.29836-1-erwan.leray@st.com> References: <20200618130651.29836-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG7NODE1.st.com (10.75.127.19) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-18_12:2020-06-18,2020-06-18 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds the usart3 node to stm32mp157c-ev1 board. usart3 pins are connected to GPIO Expansion connector. usart3 is disabled by default. Signed-off-by: Erwan Le Ray Changes in v2: - Add a comment to indicate how to wire USART3_RTS flow control to the GPIO expansion connector on ev1. -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts index b19056557ef0..85628e16d2d5 100644 --- a/arch/arm/boot/dts/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts @@ -19,6 +19,7 @@ aliases { serial0 = &uart4; + serial1 = &usart3; ethernet0 = ðernet0; }; @@ -341,6 +342,20 @@ }; }; +&usart3 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart3_pins_b>; + pinctrl-1 = <&usart3_sleep_pins_b>; + pinctrl-2 = <&usart3_idle_pins_b>; + /* + * HW flow control USART3_RTS is optional, and isn't default wired to + * the connector. SB23 needs to be soldered in order to use it, and R77 + * (ETH_CLK) should be removed. + */ + uart-has-rtscts; + status = "disabled"; +}; + &usbh_ehci { phys = <&usbphyc_port0>; status = "okay"; From patchwork Thu Jun 18 13:06:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 191100 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1405346ilo; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzJz6ZVryonlNN/nAN7msEKl5GryiHok8q1jhiG4hB9Ma1UAeiwQa8/UtorsFO3EBzaEIIv X-Received: by 2002:a05:6402:1604:: with SMTP id f4mr4048250edv.379.1592485637189; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592485637; cv=none; d=google.com; s=arc-20160816; b=zCeZ6P1AyWalacjMtjyLZa8YQHoUshAYwd4IqzHJKkzb+cApxP+lclmQ58RUA1UtID 3iPlpeWSDOHOCSHFFHw9D4gNYwx6aGotzGsaY6OfffExitBpZ60Hp/W/NFmYotVI3TlE hLNMZbfTh7zY1E8RlU58+oYFrgwyg07EstB7o3WVkq84o3KcY/Lc/hKZeGXCOXzurvcn 3wi9tmw8kvNfMz2cJTCNDHqGUplGTxhakSF240dkRaOnds/n85j1TPiM5m9nI1J0VgtJ KtbK+PmNuRFTQWtlW9036HrrSzTq0/TPhOBZ9/2/lHkcCry2M08a+KfvnCunWmUB7seF 9Qvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Vziesq9T1Vwi7upsEQvfvn3cU0cCEod7h3VYJIhC8yg=; b=no9PlUock2LvmHqMRs568TW0qesQRdc2adHLZ+D2nWfDMUfiZjpRFjYt5ujZfNwHLu pfae411Ags8itffkhFfdMwM87g5M2jqebT8RYdsIiTZml5SvrPYGULoWwPeZJ7nVazUZ 46XncxQe32Fzor1I6JKak7X2tk3a6DHGsztYKzAekTWLFVvNgNSQd94wWCfEurJjyUNe kuCKguRnnKDBNR5fhqWXrGkMSDb8UtG7bSovUYmhCcoKo2Zvuy1+VqxCooDq/7sG59Bh 9cA1JPSPyveTD7RsKoPqs4SjSqnI1byacn5uB5SGsVaXfbaB4fF+nw6yOnUHbTEmmUTA OJAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=WVz26Pwo; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n9si1944827ejz.644.2020.06.18.06.07.16; Thu, 18 Jun 2020 06:07:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=WVz26Pwo; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729709AbgFRNHP (ORCPT + 6 others); Thu, 18 Jun 2020 09:07:15 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:57000 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728303AbgFRNHO (ORCPT ); Thu, 18 Jun 2020 09:07:14 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05ID2ZvO030173; Thu, 18 Jun 2020 15:07:02 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=Vziesq9T1Vwi7upsEQvfvn3cU0cCEod7h3VYJIhC8yg=; b=WVz26PwolGQWQ6MfULl5J9dxPXVnVtSR10s6/VnqukL6XpgLwVtTIjcGdIShtqct/Zcl sbPVRldel/J1tmJ7eD09KdcLXzIL/ysv64VJNkGznrZ+pSyGyGhpTHZkj0G+O3/MeuVY YRF/AahQuUT+uAvlQftqrYm2xcEapDarXs2VXjq/OVIgh7q0eWVYs5XvAbKnoKx8SxKz AcbnB2en62xFRFW6V96U3b89aLWyh6FANEXRebq5JWdSpPox81PNCiwasxZN/udGWrNL VvFkYTFmpCugm6wXqtbgaHbNqUacbRjnOBrP7m1MNwu55JH+4N7LxfOav9k75w+6XMIP 5A== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31q64cb3fv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2020 15:07:02 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E4367100039; Thu, 18 Jun 2020 15:07:01 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D6A452B8A0D; Thu, 18 Jun 2020 15:07:01 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 18 Jun 2020 15:07:01 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH v2 4/5] ARM: dts: stm32: add uart7 support to stm32mp15xx-dkx boards Date: Thu, 18 Jun 2020 15:06:50 +0200 Message-ID: <20200618130651.29836-5-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200618130651.29836-1-erwan.leray@st.com> References: <20200618130651.29836-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-18_12:2020-06-18,2020-06-18 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds uart7 node to stm32mp15xx-dkx and uart7 alias to stm32mp157a-dk1 and stm32mp157c-dk2 boards. uart7 pins are connected to Arduino connector. uart7 is disabled by default. Signed-off-by: Erwan Le Ray -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts index 65ee61b7667a..4c8be9c8eb20 100644 --- a/arch/arm/boot/dts/stm32mp157a-dk1.dts +++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts @@ -19,6 +19,7 @@ ethernet0 = ðernet0; serial0 = &uart4; serial1 = &usart3; + serial2 = &uart7; }; chosen { diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts index fb690a817e28..ffbae4a8753d 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts @@ -20,6 +20,7 @@ ethernet0 = ðernet0; serial0 = &uart4; serial1 = &usart3; + serial2 = &uart7; }; chosen { diff --git a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi index 243aa4b2063d..cfbe3e2afef2 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dkx.dtsi @@ -591,6 +591,14 @@ status = "okay"; }; +&uart7 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart7_pins_c>; + pinctrl-1 = <&uart7_sleep_pins_c>; + pinctrl-2 = <&uart7_idle_pins_c>; + status = "disabled"; +}; + &usart3 { pinctrl-names = "default", "sleep", "idle"; pinctrl-0 = <&usart3_pins_c>; From patchwork Thu Jun 18 13:06:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erwan Le Ray X-Patchwork-Id: 191105 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1405679ilo; Thu, 18 Jun 2020 06:07:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzmeGJsGcqyfbsFLFHUrLLRuCpquABeU4AB4cigtAQnzZkXLY+HAWHcnccz1gXHtAACnA+u X-Received: by 2002:a17:906:d9cd:: with SMTP id qk13mr3848925ejb.268.1592485656464; Thu, 18 Jun 2020 06:07:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592485656; cv=none; d=google.com; s=arc-20160816; b=LOWwCTzH0sdhRvj4oCijliZev4RhVeH2/dTJnKfAqN1G+wYfK4EDphrQvN3QuHm2fg fuFSN6Ev+UTMISJcYcqMJuCQXHuP5wk1yEK9fhN4ezg4JrWUkDuYUEHbMMBOsRVl1yTd z299aFIR4YkjPc3QU1uB/G0jMjY4XQjnaMYJfvfIYj1RjMp0iKmcztMDvbkUNyRiQB8I XlAs32i/a2RxwjErm3/lDRz+auGZkwAmz/xaWteez265CfLzknqjwFDn1KvYn9Z/Z3W7 hWjtPIsNLAN0c3au6jM763SXcnk8ukkESge47M0K3Jcx4QAAD16/8k9jOOX3riuQOvPK Osyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Q6db3X4dxlS6qvbPYnAd4zoz3ZPexCGcUlqOVKKA23Y=; b=JzitXqCbGVusCl4atrDRuRht8w9mGGRh2oGqmzBTx3sbt4kgKwskTWEhyyMeivQGMX QWM8LVklnx9cO7EkRlveYc+hpQOWHA8hE7kowJkexqYQ/muSakV0wlgNx9nDzsvE5prw 5cZQSPe5KMWEDxkK4fpr8lC9HWW/jwmD/QbcRKFYsMA+MO+jzyzRbKiH+EoqOsiDB9zO x5aPbxTKXliVPWUKzCchT0trJEnxSvVmMgi5i5ZWwMFcoT6L21aCd8u7swbyctHIXes5 5P2nn3xsHNu/x0C3lKAS752cmtd47SssoLLtKMeiC9fMCkBQDEYJ1LVqZNkPhLpFWltw oXsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="l5f/pokG"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dj11si2008213edb.333.2020.06.18.06.07.36; Thu, 18 Jun 2020 06:07:36 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b="l5f/pokG"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730147AbgFRNHc (ORCPT + 6 others); Thu, 18 Jun 2020 09:07:32 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:27214 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730077AbgFRNHX (ORCPT ); Thu, 18 Jun 2020 09:07:23 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05ID4Ihk012640; Thu, 18 Jun 2020 15:07:03 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=Q6db3X4dxlS6qvbPYnAd4zoz3ZPexCGcUlqOVKKA23Y=; b=l5f/pokGAVl0Lj4IK20biU6p2wz2JLJBZGY0PTKzqWBZ37o1f0X4TIwOZbe0AGuvZEW/ M2q1Ty7x1UxAaqduanZNnbOek4PHbFLwuH1mMtbcI+tHmrsTdYJLt+9IR0ZVGqO2gLaO UN6Hdz9cqpg/vJsN95nE5GtR2sKc3gVYVMJVr569Iob19AzWsiWKaZ+PkMyRoOehOi0d VOTLl1KOHD/08bd6aAQY4qkQNESKGCBx2DvL3QY0jc5TQ7JmXGogID4AUbQ2+mOTTmBh DjDNNEd9/N86vXIyqdt1gQhnSXW7jl2xB+GdnOqxWXqLD8V4SmxnpOdkG/WopEeFO50d MQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 31q64ak3hx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 18 Jun 2020 15:07:03 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A6BD9100038; Thu, 18 Jun 2020 15:07:02 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9A25B2B8A0D; Thu, 18 Jun 2020 15:07:02 +0200 (CEST) Received: from localhost (10.75.127.44) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 18 Jun 2020 15:07:02 +0200 From: Erwan Le Ray To: Maxime Coquelin , Alexandre Torgue , Rob Herring , Mark Rutland CC: , , , , Erwan Le Ray , Fabrice Gasnier Subject: [PATCH v2 5/5] ARM: dts: stm32: add usart2 node to stm32mp157c-dk2 Date: Thu, 18 Jun 2020 15:06:51 +0200 Message-ID: <20200618130651.29836-6-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200618130651.29836-1-erwan.leray@st.com> References: <20200618130651.29836-1-erwan.leray@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-18_12:2020-06-18,2020-06-18 signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adds the usart2 node to stm32mp157c-dk2 board. usart2 pins are connected to Bluetooth component. usart2 is disabled by default. Signed-off-by: Erwan Le Ray -- 2.17.1 diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts b/arch/arm/boot/dts/stm32mp157c-dk2.dts index ffbae4a8753d..045636555ddd 100644 --- a/arch/arm/boot/dts/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/stm32mp157c-dk2.dts @@ -21,6 +21,7 @@ serial0 = &uart4; serial1 = &usart3; serial2 = &uart7; + serial3 = &usart2; }; chosen { @@ -86,3 +87,11 @@ }; }; }; + +&usart2 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_c>; + pinctrl-1 = <&usart2_sleep_pins_c>; + pinctrl-2 = <&usart2_idle_pins_c>; + status = "disabled"; +};