From patchwork Wed Jul 12 14:15:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 107523 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp869431qge; Wed, 12 Jul 2017 07:15:55 -0700 (PDT) X-Received: by 10.98.205.69 with SMTP id o66mr56927003pfg.173.1499868955326; Wed, 12 Jul 2017 07:15:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499868955; cv=none; d=google.com; s=arc-20160816; b=E+ecz+Q9+enN/hdUT/onNg6LOyFU55PbV8estEPkg7caXZTD+us9h2poc8+E58MD4A WLUEH4PSgZFOxryKd63fQu0kVyCo8RuLZ1gE6Aj43Uex2MOXldIuIdJBN39M/mQnqj49 SCM94alDSf57Jq4pzmfD5GSyEqcPf2fdVYuHNHOhg4yivpLESE2a4y8etT9Lv+WJ0+Eu fWK0Q9wtqePnvRZGQtgZrkwa6fbWFWdnaPsXdXsRCAEVFO6z5NHKaibFcKlPIzC3maZ1 SPtxAvkSzaKTZNYx/8dmHla1xWfMEgb4KY7XsrqAmwnwb/viYxAzA5qMMjIVb7idwgvc 4SfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=F+H2o0HSoKNSwSmAcS/xJBWjKEAJoIccfHuvgaMjjKU=; b=V7/ruieVL/wuUHfV+xFel3aIBfZrer2b+2R1Ul8UoJniq1U0EqCacTiH+p2dsUTA19 eJwFEDGOI7ncTS6x1BbNpzG8CCCH5r4wlxNEoA16KMl8DjV88rtmOUV1PdBHkOlvC4xa Go6ZTe/gD9qaW9OD/f2bNe41/TmVwKs8RC7yZhqxRf4/MacJ2okW7Mw61PD8TAIjyXLN NYqPgbqzbFomkLqyPNhOrlhT2O5wgi3A1ozkxmQsbRD82w+T8J7Dq54WN4vPdA8mQT9F HIElb8GncPSzU8EMcUEHv9Bm3Y1kRjUcBUrn7c+YK3ymOAZgKG/O607mPHuKxiTqJvro CaSg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n68si1962587pfn.246.2017.07.12.07.15.54; Wed, 12 Jul 2017 07:15:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752777AbdGLOPi (ORCPT + 25 others); Wed, 12 Jul 2017 10:15:38 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:58431 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752697AbdGLOPf (ORCPT ); Wed, 12 Jul 2017 10:15:35 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 7B05F21E01; Wed, 12 Jul 2017 16:15:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 37DF221DFB; Wed, 12 Jul 2017 16:15:32 +0200 (CEST) From: Quentin Schulz To: adrian.hunter@intel.com, ludovic.desroches@microchip.com, ulf.hansson@linaro.org Cc: Quentin Schulz , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@free-electrons.com, alexandre.belloni@free-electrons.com, nicolas.ferre@microchip.com, cyrille.pitchen@wedev4u.fr Subject: [PATCH v2 2/2] mmc: sdhci-of-at91: set clocks and presets after resume from deepest PM Date: Wed, 12 Jul 2017 16:15:19 +0200 Message-Id: <20170712141519.15684-2-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170712141519.15684-1-quentin.schulz@free-electrons.com> References: <20170712141519.15684-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SDHCI controller. When resuming from deepest state, it is required to restore preset registers as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. The clocks need to be reconfigured as well. The other registers and init process are taken care of by the SDHCI core. Signed-off-by: Quentin Schulz Acked-by: Ludovic Desroches --- v2: - use runtime_resume as system_resume, - set a flag to tell when restoring presets is needed, - use a flag to tell runtime_resume to restore presets, - surround sdhci_at91_suspend with ifdef CONFIG_PM_SLEEP instead of CONFIG_PM, drivers/mmc/host/sdhci-of-at91.c | 29 +++++++++++++++++++++++++++-- 1 file changed, 27 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index fb8c6011f13d..828076965277 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -41,6 +41,7 @@ struct sdhci_at91_priv { struct clk *hclock; struct clk *gck; struct clk *mainck; + bool restore_needed; }; static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) @@ -206,6 +207,19 @@ static int sdhci_at91_set_clks_presets(struct device *dev) return 0; } +#ifdef CONFIG_PM_SLEEP +static int sdhci_at91_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); + + priv->restore_needed = true; + + return pm_runtime_force_suspend(dev); +} +#endif /* CONFIG_PM_SLEEP */ + #ifdef CONFIG_PM static int sdhci_at91_runtime_suspend(struct device *dev) { @@ -233,6 +247,15 @@ static int sdhci_at91_runtime_resume(struct device *dev) struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); int ret; + if (priv->restore_needed) { + ret = sdhci_at91_set_clks_presets(dev); + if (ret) + return ret; + + priv->restore_needed = false; + goto out; + } + ret = clk_prepare_enable(priv->mainck); if (ret) { dev_err(dev, "can't enable mainck\n"); @@ -251,13 +274,13 @@ static int sdhci_at91_runtime_resume(struct device *dev) return ret; } +out: return sdhci_runtime_resume_host(host); } #endif /* CONFIG_PM */ static const struct dev_pm_ops sdhci_at91_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, - pm_runtime_force_resume) + SET_SYSTEM_SLEEP_PM_OPS(sdhci_at91_suspend, pm_runtime_force_resume) SET_RUNTIME_PM_OPS(sdhci_at91_runtime_suspend, sdhci_at91_runtime_resume, NULL) @@ -306,6 +329,8 @@ static int sdhci_at91_probe(struct platform_device *pdev) if (ret) goto sdhci_pltfm_free; + priv->restore_needed = false; + ret = mmc_of_parse(host->mmc); if (ret) goto clocks_disable_unprepare;