From patchwork Tue Mar 17 13:57:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 189942 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 912AAC5ACBF for ; Tue, 17 Mar 2020 13:58:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6993420767 for ; Tue, 17 Mar 2020 13:58:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Qu8Ps6Q8" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726187AbgCQN6Q (ORCPT ); Tue, 17 Mar 2020 09:58:16 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:35948 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726278AbgCQN54 (ORCPT ); Tue, 17 Mar 2020 09:57:56 -0400 Received: by mail-wr1-f67.google.com with SMTP id s5so25860877wrg.3 for ; Tue, 17 Mar 2020 06:57:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E7ZsSBUhejcW1WENgNkFbYtvh60PcoS0PtZmGJlxadU=; b=Qu8Ps6Q87cbQkhFKxkNsAmQdAElXSe+ZGHs0h7urUZ76bgNkrTvzwwas3mBUVeKoBo jsbWik9YedB5fjdzozCPLze7QaOfOxfbjFTC5P7Pme/y0ngwDSADLzeX0lj4vAE+rtDh My88mJq0n/MSGE6vZ25+Ug6dpnrJGq7XtV27+2JdzxB5VCJx2fnRodufZ3P/lJq2rZ0A g0yGWLZAych/XHYX/BQBnZgrXB3jhyaabqqsjTkezMquF2MfINpTDDOFW6u9/2oBcpHv ImAD3QOcSFUdOzbkMyrXdxUQYpEVLWW78xctBP3Kd90tK8mhgRaYirAjFiHsRF+f8F0p yGig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E7ZsSBUhejcW1WENgNkFbYtvh60PcoS0PtZmGJlxadU=; b=G1Xy0jI/BvrElXINC7XIm9hnPq96ahxHYvkIKOEuDTnjnkIsgK655LeJqMfWA252Xq 7xJs+aQ9IlBhna42/RcqpsuMLKNWSdwNSGviND4nVAy/t50CrwFHzmVigQnbtp5H1hqR akeuNN7zGZlbTvOHMkJLrpRiR/OTraChG2Xd1sqVn8Aj01K8WG7SxxcQ/4FNrxaqlhIE jPqwHXnWYS8dwsFxNcJIkDPbwyUFg+6AUjImRn+pPFGZPVski8Rx+nwn/w5M64LwQI+u lpCpYibYfv48QfjgnX9Xu9cxFd616RaLpEdtp1/ftL42dOtbBv+8Obcktquus5Uv6838 lntA== X-Gm-Message-State: ANhLgQ2v3mioAMRDcjl7w+OtGyEG+Bd/wJMh0OgeoIKK7TogrgYSCHEH ePbnqNeUYewRBDaIoqyiIJCBcw== X-Google-Smtp-Source: ADFU+vtui492H+miaWTyfRzOCSzn/SzVawYdAfgXp6SNtzgRBoH32Npb5uwL2TWiiuaM5Q+QdEJ4vw== X-Received: by 2002:adf:fdc6:: with SMTP id i6mr6204937wrs.414.1584453473419; Tue, 17 Mar 2020 06:57:53 -0700 (PDT) Received: from xps7590.local ([2a02:2450:102f:13b8:84f7:5c25:a9d8:81a1]) by smtp.gmail.com with ESMTPSA id r3sm2976558wrn.35.2020.03.17.06.57.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Mar 2020 06:57:52 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, olof@lixom.net, maxime@cerno.tech, Anson.Huang@nxp.com, dinguyen@kernel.org, leonard.crestez@nxp.com, marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain Cc: Robert Foss Subject: [v2 2/6] arm64: dts: apq8016-sbc: Add CCI/Sensor nodes Date: Tue, 17 Mar 2020 14:57:36 +0100 Message-Id: <20200317135740.19412-3-robert.foss@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317135740.19412-1-robert.foss@linaro.org> References: <20200317135740.19412-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain Add cci device to msm8916.dtsi. Add default 96boards camera node for db410c (apq8016-sbc). Signed-off-by: Loic Poulain Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Reference CCI by label - Don't use generic node names - Move regulator nodes out of /soc - Use CCI label and move node out of /soc - Use reference for camss and move node out of /soc - Use reference for cci-i2c0 and move out of /cci - Disable camera_read by default, since no mezzanine board is guaranteed arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 76 +++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi index 037e26b3f8d5..d98c7e9e6eb9 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi @@ -51,6 +51,30 @@ stdout-path = "serial0"; }; + camera_vdddo_1v8: camera_vdddo_1v8 { + compatible = "regulator-fixed"; + regulator-name = "camera_vdddo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + camera_vdda_2v8: camera_vdda_2v8 { + compatible = "regulator-fixed"; + regulator-name = "camera_vdda"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + camera_vddd_1v5: camera_vddd_1v5 { + compatible = "regulator-fixed"; + regulator-name = "camera_vddd"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + reserved-memory { ramoops@bff00000{ compatible = "ramoops"; @@ -538,6 +562,58 @@ }; }; +&camss { + status = "ok"; + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + csiphy0_ep: endpoint { + clock-lanes = <1>; + data-lanes = <0 2>; + remote-endpoint = <&ov5640_ep>; + status = "okay"; + }; + }; + }; +}; + +&cci { + status = "ok"; +}; + +&cci_i2c0 { + camera_rear@3b { + compatible = "ovti,ov5640"; + reg = <0x3b>; + + enable-gpios = <&msmgpio 34 GPIO_ACTIVE_HIGH>; + reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&camera_rear_default>; + + clocks = <&gcc GCC_CAMSS_MCLK0_CLK>; + clock-names = "xclk"; + clock-frequency = <23880000>; + + vdddo-supply = <&camera_vdddo_1v8>; + vdda-supply = <&camera_vdda_2v8>; + vddd-supply = <&camera_vddd_1v5>; + + /* No camera mezzanine by default */ + status = "disabled"; + + port { + ov5640_ep: endpoint { + clock-lanes = <1>; + data-lanes = <0 2>; + remote-endpoint = <&csiphy0_ep>; + }; + }; + }; +}; + &spmi_bus { pm8916_0: pm8916@0 { pon@800 { From patchwork Tue Mar 17 13:57:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 189943 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DDA6C5ACBF for ; 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Tue, 17 Mar 2020 06:57:56 -0700 (PDT) Received: from xps7590.local ([2a02:2450:102f:13b8:84f7:5c25:a9d8:81a1]) by smtp.gmail.com with ESMTPSA id r3sm2976558wrn.35.2020.03.17.06.57.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Mar 2020 06:57:55 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, olof@lixom.net, maxime@cerno.tech, Anson.Huang@nxp.com, dinguyen@kernel.org, leonard.crestez@nxp.com, marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain Cc: Robert Foss Subject: [v2 4/6] arm64: dts: sdm845-db845c: Add pm_8998 gpio names Date: Tue, 17 Mar 2020 14:57:38 +0100 Message-Id: <20200317135740.19412-5-robert.foss@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317135740.19412-1-robert.foss@linaro.org> References: <20200317135740.19412-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pm_8998 GPIO trace names. These names are defined in the 96boards db845c mezzanine schematic. Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Move gpio-names to previous reference to pm8998_gpio label arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index a6b6837c3d68..efb0086e2aa1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -365,6 +365,34 @@ }; &pm8998_gpio { + gpio-line-names = + "NC", + "NC", + "WLAN_SW_CTRL", + "NC", + "PM_GPIO5_BLUE_BT_LED", + "VOL_UP_N", + "NC", + "ADC_IN1", + "PM_GPIO9_YEL_WIFI_LED", + "CAM0_AVDD_EN", + "NC", + "CAM0_DVDD_EN", + "PM_GPIO13_GREEN_U4_LED", + "DIV_CLK2", + "NC", + "NC", + "NC", + "SMB_STAT", + "NC", + "NC", + "ADC_IN2", + "OPTION1", + "WCSS_PWR_REQ", + "PM845_GPIO24", + "OPTION2", + "PM845_SLB"; + vol_up_pin_a: vol-up-active { pins = "gpio6"; function = "normal"; From patchwork Tue Mar 17 13:57:39 2020 Content-Type: text/plain; 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Tue, 17 Mar 2020 06:57:57 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, olof@lixom.net, maxime@cerno.tech, Anson.Huang@nxp.com, dinguyen@kernel.org, leonard.crestez@nxp.com, marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain Cc: Robert Foss Subject: [v2 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes Date: Tue, 17 Mar 2020 14:57:39 +0100 Message-Id: <20200317135740.19412-6-robert.foss@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317135740.19412-1-robert.foss@linaro.org> References: <20200317135740.19412-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable the ov8856 main camera and the ov7251 b/w tracking camera used on the Qualcomm RB3 kit. Currently the camera nodes have not yet been attached to an to a CSI2 endpoint, since no driver currently supports the ISP that the the SDM845/db845c ships with. Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Move cam0_ pinctrls subnodes into the first pm8998_gpio reference - Remove accidentally committed &tlmn node subnodes - Remove redundant tlmm pinctrl subnodes - Fix pinctrl subnode identation - Remove accidentally committed &tlmn node subnodes - Replace underscores in node names - Reference cci i2c buses by labe - Change camera node names from camX@YY to camera@YY - Remove camera@10 comment about I2C addresses - Replace GPIO_ACTIVE_HIGH with 0 in camera nodes - Removed extra newline - Remove comment about not being available always - Disable cameras as CSI driver is missing - Fix factual error in comment about vreg_s4a_1p8 - Remove dummy regulator cam3_vddd_1v2 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 178 +++++++++++++++++++++ 1 file changed, 178 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index efb0086e2aa1..ed71278196f2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -110,6 +110,40 @@ // enable-active-high; }; + cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { + compatible = "regulator-fixed"; + regulator-name = "CAM0_DVDD_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + enable-active-high; + gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_dvdd_1v2_en_default>; + vin-supply = <&vbat>; + }; + + cam0_avdd_2v8: reg_cam0_avdd_2v8 { + compatible = "regulator-fixed"; + regulator-name = "CAM0_AVDD_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + enable-active-high; + gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_avdd_2v8_en_default>; + vin-supply = <&vbat>; + }; + + /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ + cam3_avdd_2v8: reg_cam3_avdd_2v8 { + compatible = "regulator-fixed"; + regulator-name = "CAM3_AVDD_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + vin-supply = <&vbat>; + }; + pcie0_3p3v_dual: vldo-3v3-regulator { compatible = "regulator-fixed"; regulator-name = "VLDO_3V3"; @@ -393,6 +427,24 @@ "OPTION2", "PM845_SLB"; + cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { + pins = "gpio12"; + function = "normal"; + + bias-pull-up; + drive-push-pull; + qcom,drive-strength = ; + }; + + cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { + pins = "gpio10"; + function = "normal"; + + bias-pull-up; + drive-push-pull; + qcom,drive-strength = ; + }; + vol_up_pin_a: vol-up-active { pins = "gpio6"; function = "normal"; @@ -434,6 +486,42 @@ }; &tlmm { + cam0_default: cam0_default { + rst { + pins = "gpio9"; + function = "gpio"; + + drive-strength = <16>; + bias-disable; + }; + + mclk0 { + pins = "gpio13"; + function = "cam_mclk"; + + drive-strength = <16>; + bias-disable; + }; + }; + + cam3_default: cam3_default { + rst { + function = "gpio"; + pins = "gpio21"; + + drive-strength = <16>; + bias-disable; + }; + + mclk3 { + function = "cam_mclk"; + pins = "gpio16"; + + drive-strength = <16>; + bias-disable; + }; + }; + pcie0_pwren_state: pcie0-pwren { pins = "gpio90"; function = "gpio"; @@ -612,6 +700,96 @@ }; }; +&pm8998_gpio { + +}; + &cci { status = "ok"; }; + +&cci_i2c0 { + camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + // CAM0_RST_N + reset-gpios = <&tlmm 9 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_default>; + gpios = <&tlmm 13 0>, + <&tlmm 9 0>; + + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + /* The &vreg_s4a_1p8 trace is powered on as a, + * so it is represented by a fixed regulator. + * + * The 2.8V vdda-supply and 1.2V vddd-supply regulators + * both have to be enabled through the power management + * gpios. + */ + power-domains = <&clock_camcc TITAN_TOP_GDSC>; + + dovdd-supply = <&vreg_lvs1a_1p8>; + avdd-supply = <&cam0_avdd_2v8>; + dvdd-supply = <&cam0_dvdd_1v2>; + + status = "disable"; + + port { + ov8856_ep: endpoint { + clock-lanes = <1>; + link-frequencies = /bits/ 64 + <360000000 180000000>; + data-lanes = <1 2 3 4>; +// remote-endpoint = <&csiphy0_ep>; + }; + }; + }; +}; + +&cci_i2c1 { + camera@60 { + compatible = "ovti,ov7251"; + + // I2C address as per ov7251.txt linux documentation + reg = <0x60>; + + // CAM3_RST_N + enable-gpios = <&tlmm 21 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam3_default>; + gpios = <&tlmm 16 0>, + <&tlmm 21 0>; + + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "xclk"; + clock-frequency = <24000000>; + + /* The &vreg_s4a_1p8 trace always powered on. + * + * The 2.8V vdda-supply regulator is enabled when the + * vreg_s4a_1p8 trace is pulled high. + * It too is represented by a fixed regulator. + * + * No 1.2V vddd-supply regulator is used. + */ + power-domains = <&clock_camcc TITAN_TOP_GDSC>; + + vdddo-supply = <&vreg_lvs1a_1p8>; + vdda-supply = <&cam3_avdd_2v8>; + + status = "disable"; + + port { + ov7251_ep: endpoint { + clock-lanes = <1>; + data-lanes = <0 1>; +// remote-endpoint = <&csiphy3_ep>; + }; + }; + }; +};