From patchwork Wed Apr 8 13:09:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 189698 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9808C2BB1D for ; Wed, 8 Apr 2020 13:11:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7515120780 for ; Wed, 8 Apr 2020 13:11:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="aFWPOjD+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728401AbgDHNLK (ORCPT ); Wed, 8 Apr 2020 09:11:10 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:39793 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729069AbgDHNKv (ORCPT ); Wed, 8 Apr 2020 09:10:51 -0400 Received: by mail-wm1-f65.google.com with SMTP id y24so1316319wma.4 for ; Wed, 08 Apr 2020 06:10:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NlDlRv555GH3IWzPThM2PIkVo5dnbd1J1aXXNjhdRgU=; b=aFWPOjD+POZxqE+i+gRicc1Ttn6UlDSIUKWVEXYrw6mfX2v20gZgt82l4KRhjiIe9A b7eh6/OF5TAIN8zLoLVxFZu6TXaYtFE7/efNaS8sZKDyPnHEaYTT/n35OdxMY05APuOt rlWYwUne8HTx4HnFmTSaPsuQsXqpfgebNO4ZoJARRorQ9DkoYG3cYPagjmaYqCRxy/5p rnFMxw1K+6Rzmgrq1DW3Fnq4at0dmmS01p0cbFLJdKNnxjXp8BkfZrycWl7oUXu+s+cK d/adjUK3FZcpZfWktEdbNJoad3EocqLejBbg1sRQ265bF0LqSaopWWshBlwmpvodh1TX BEag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NlDlRv555GH3IWzPThM2PIkVo5dnbd1J1aXXNjhdRgU=; b=dGSRgOg0qS+6ih3s2kOwbvMU5AHWyu37qOtJ9l09GJgPgaqmpUDq8oM/27UWKhaD1j Ts3hoUga3nMTwgNWz9j7ta1ctsdy6jWLeO9+0i8P68lxKVGFmFhM8j1OGCX6SMYEowh+ AOrBh5E060WFzitPkh9cn1quhcgK+TN/6ZrZqxOSEUZYoolloufBRNNNDyxXvLne+BFK P4DPuu01nNgjK+zVD2BVf7kaP7YMo0jSaPG2WCO0IE5oaZ3QBy/YTHdR/08jb6fySWLy kop6KnVgvPRyTQa/Q6KmGeIpvW3grVeBQXEIl2UL9xPiYe6QvT+G+HA/n4CVr+hNatoZ qxOA== X-Gm-Message-State: AGi0Puayp1B5SWxH9rvyGzzApGPYggWNDvNL9IaGjQNvxx3EYfRp90F2 twvmeigY6puR4DIs96YCLu0/vw== X-Google-Smtp-Source: APiQypKFGiJ+gX60BLbUE1LDlC51Duk6XfC5j/frP0y9C+JdDx5KsdFSZwr18YptOjMFQlBlrJHuCg== X-Received: by 2002:a7b:c1da:: with SMTP id a26mr3107514wmj.125.1586351446839; Wed, 08 Apr 2020 06:10:46 -0700 (PDT) Received: from localhost.localdomain ([37.120.50.78]) by smtp.gmail.com with ESMTPSA id f4sm18428044wrp.80.2020.04.08.06.10.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Apr 2020 06:10:46 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, leoyang.li@nxp.com, Anson.Huang@nxp.com, olof@lixom.net, leonard.crestez@nxp.com, geert+renesas@glider.be, marcin.juszkiewicz@linaro.org, valentin.schneider@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain , Luca Weiss Cc: Robert Foss Subject: [PATCH v4 1/6] arm64: dts: msm8916: Add i2c-qcom-cci node Date: Wed, 8 Apr 2020 15:09:54 +0200 Message-Id: <20200408130959.2717409-2-robert.foss@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200408130959.2717409-1-robert.foss@linaro.org> References: <20200408130959.2717409-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain The msm8916 CCI controller provides one CCI/I2C bus. Signed-off-by: Loic Poulain Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Add label to cci node - Sort cci node by address - Relabel cci0 i2c bus to cci-i2c0 arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index a88a15f2352b..cad0ac482367 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1603,6 +1603,33 @@ ports { }; }; + cci: cci@1b0c000 { + compatible = "qcom,msm8916-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1b0c000 0x1000>; + interrupts = ; + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names = "camss_top_ahb", "cci_ahb", + "cci", "camss_ahb"; + assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates = <80000000>, <19200000>; + pinctrl-names = "default"; + pinctrl-0 = <&cci0_default>; + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + smd { compatible = "qcom,smd"; From patchwork Wed Apr 8 13:09:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 189699 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9794C2BA1A for ; Wed, 8 Apr 2020 13:11:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7EB6D20787 for ; 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Wed, 08 Apr 2020 06:10:51 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, leoyang.li@nxp.com, Anson.Huang@nxp.com, olof@lixom.net, leonard.crestez@nxp.com, geert+renesas@glider.be, marcin.juszkiewicz@linaro.org, valentin.schneider@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain , Luca Weiss Cc: Robert Foss Subject: [PATCH v4 4/6] arm64: dts: sdm845-db845c: Add pm_8998 gpio names Date: Wed, 8 Apr 2020 15:09:57 +0200 Message-Id: <20200408130959.2717409-5-robert.foss@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200408130959.2717409-1-robert.foss@linaro.org> References: <20200408130959.2717409-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add pm_8998 GPIO trace names. These names are defined in the 96boards db845c mezzanine schematic. Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Move gpio-names to previous reference to pm8998_gpio label arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 8644a2f6095a..5cd06ab97b9a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -412,6 +412,34 @@ &pcie1_phy { }; &pm8998_gpio { + gpio-line-names = + "NC", + "NC", + "WLAN_SW_CTRL", + "NC", + "PM_GPIO5_BLUE_BT_LED", + "VOL_UP_N", + "NC", + "ADC_IN1", + "PM_GPIO9_YEL_WIFI_LED", + "CAM0_AVDD_EN", + "NC", + "CAM0_DVDD_EN", + "PM_GPIO13_GREEN_U4_LED", + "DIV_CLK2", + "NC", + "NC", + "NC", + "SMB_STAT", + "NC", + "NC", + "ADC_IN2", + "OPTION1", + "WCSS_PWR_REQ", + "PM845_GPIO24", + "OPTION2", + "PM845_SLB"; + vol_up_pin_a: vol-up-active { pins = "gpio6"; function = "normal"; From patchwork Wed Apr 8 13:09:59 2020 Content-Type: text/plain; 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Wed, 08 Apr 2020 06:10:54 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, leoyang.li@nxp.com, Anson.Huang@nxp.com, olof@lixom.net, leonard.crestez@nxp.com, geert+renesas@glider.be, marcin.juszkiewicz@linaro.org, valentin.schneider@arm.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain , Luca Weiss Cc: Robert Foss Subject: [PATCH v4 6/6] arm64: defconfig: Enable QCOM CAMCC, CAMSS and CCI drivers Date: Wed, 8 Apr 2020 15:09:59 +0200 Message-Id: <20200408130959.2717409-7-robert.foss@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200408130959.2717409-1-robert.foss@linaro.org> References: <20200408130959.2717409-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Build camera clock, isp and controller drivers as modules. Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v2: - Removed duplicated CONFIG_SDM_CAMCC_845 defconfig arch/arm64/configs/defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 24e534d85045..46ee13b6df27 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -410,6 +410,7 @@ CONFIG_I2C_MESON=y CONFIG_I2C_MV64XXX=y CONFIG_I2C_OWL=y CONFIG_I2C_PXA=y +CONFIG_I2C_QCOM_CCI=m CONFIG_I2C_QCOM_GENI=m CONFIG_I2C_QUP=y CONFIG_I2C_RK3X=y @@ -582,6 +583,7 @@ CONFIG_VIDEO_RENESAS_FDP1=m CONFIG_VIDEO_RENESAS_FCP=m CONFIG_VIDEO_RENESAS_VSP1=m CONFIG_SDR_PLATFORM_DRIVERS=y +CONFIG_VIDEO_QCOM_CAMSS=m CONFIG_VIDEO_RCAR_DRIF=m CONFIG_DRM=m CONFIG_DRM_I2C_NXP_TDA998X=m @@ -802,6 +804,7 @@ CONFIG_MSM_GCC_8994=y CONFIG_MSM_MMCC_8996=y CONFIG_MSM_GCC_8998=y CONFIG_QCS_GCC_404=y +CONFIG_SDM_CAMCC_845=m CONFIG_SDM_GCC_845=y CONFIG_SDM_GPUCC_845=y CONFIG_SDM_DISPCC_845=y