From patchwork Sun May 24 10:04:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 188992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 270E8C433E1 for ; Sun, 24 May 2020 10:05:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 05E7B2070A for ; Sun, 24 May 2020 10:05:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729465AbgEXKEz (ORCPT ); Sun, 24 May 2020 06:04:55 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:32231 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729389AbgEXKEz (ORCPT ); Sun, 24 May 2020 06:04:55 -0400 Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 24 May 2020 03:04:54 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg02-sd.qualcomm.com with ESMTP; 24 May 2020 03:04:50 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id 5BE49217E6; Sun, 24 May 2020 15:34:49 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V5 2/8] dt-bindings: clock: add ipq6018 a53 pll compatible Date: Sun, 24 May 2020 15:34:40 +0530 Message-Id: <1590314686-11749-3-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> References: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org cpus on ipq6018 are clocked by a53 pll, add device compatible for a53 pll found on ipq6018 devices. Signed-off-by: Sivaprakash Murugesan Reviewed-by: Rob Herring --- [V5] * Addressed Bjorn's review comment. now the a53 dt-binding represents ipq a53 pll as well. .../devicetree/bindings/clock/qcom,a53pll.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml index 20d2638..972db15 100644 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml @@ -16,6 +16,7 @@ description: properties: compatible: const: qcom,msm8916-a53pll + const: qcom,ipq6018-a53pll reg: maxItems: 1 @@ -23,6 +24,14 @@ properties: '#clock-cells': const: 0 + clocks: + items: + - description: board XO clock + + clock-names: + items: + - const: xo + required: - compatible - reg @@ -38,3 +47,12 @@ examples: reg = <0xb016000 0x40>; #clock-cells = <0>; }; + #Example 2 - A53 PLL found on IPQ6018 devices + - | + a53pll_ipq: clock@b116000 { + compatible = "qcom,ipq6018-a53pll"; + reg = <0x0b116000 0x40>; + #clock-cells = <0>; + clocks = <&xo>; + clock-names = "xo"; + }; From patchwork Sun May 24 10:04:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 188993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67C9DC433E3 for ; Sun, 24 May 2020 10:05:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4CF702075F for ; Sun, 24 May 2020 10:05:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387636AbgEXKE5 (ORCPT ); Sun, 24 May 2020 06:04:57 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:53590 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728774AbgEXKE4 (ORCPT ); Sun, 24 May 2020 06:04:56 -0400 Received: from unknown (HELO ironmsg02-sd.qualcomm.com) ([10.53.140.142]) by alexa-out-sd-02.qualcomm.com with ESMTP; 24 May 2020 03:04:55 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg02-sd.qualcomm.com with ESMTP; 24 May 2020 03:04:51 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id 6EB47217E7; Sun, 24 May 2020 15:34:49 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V5 3/8] clk: qcom: Add ipq apss pll driver Date: Sun, 24 May 2020 15:34:41 +0530 Message-Id: <1590314686-11749-4-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> References: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL. Add support for the apss pll found on ipq based devices which can support CPU frequencies above 1Ghz. Signed-off-by: Sivaprakash Murugesan --- drivers/clk/qcom/Kconfig | 8 ++++ drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/apss-ipq-pll.c | 97 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 106 insertions(+) create mode 100644 drivers/clk/qcom/apss-ipq-pll.c diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index 11ec6f4..e70aa01 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -89,6 +89,14 @@ config APQ_MMCC_8084 Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. +config IPQ_APSS_PLL + tristate "IPQ APSS PLL" + help + Support for APSS PLL on ipq devices. The APSS PLL is the main + clock that feeds the CPUs on ipq based devices. + Say Y if you want to support CPU frequency scaling on ipq based + devices. + config IPQ_GCC_4019 tristate "IPQ4019 Global Clock Controller" help diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 691efbf..b4a6ba1 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -19,6 +19,7 @@ clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o # Keep alphabetically sorted by config obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o +obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o obj-$(CONFIG_IPQ_GCC_6018) += gcc-ipq6018.o obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c new file mode 100644 index 0000000..aafdaa7 --- /dev/null +++ b/drivers/clk/qcom/apss-ipq-pll.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018, The Linux Foundation. All rights reserved. +#include +#include +#include + +#include "clk-alpha-pll.h" + +static const u8 ipq_pll_offsets[] = { + [PLL_OFF_L_VAL] = 0x08, + [PLL_OFF_ALPHA_VAL] = 0x10, + [PLL_OFF_USER_CTL] = 0x18, + [PLL_OFF_CONFIG_CTL] = 0x20, + [PLL_OFF_CONFIG_CTL_U] = 0x24, + [PLL_OFF_STATUS] = 0x28, + [PLL_OFF_TEST_CTL] = 0x30, + [PLL_OFF_TEST_CTL_U] = 0x34, +}; + +static struct clk_alpha_pll ipq_pll = { + .offset = 0x0, + .regs = ipq_pll_offsets, + .flags = SUPPORTS_DYNAMIC_UPDATE, + .clkr = { + .enable_reg = 0x0, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "a53pll", + .parent_data = &(const struct clk_parent_data) { + .fw_name = "xo", + }, + .num_parents = 1, + .ops = &clk_alpha_pll_huayra_ops, + }, + }, +}; + +static const struct alpha_pll_config ipq_pll_config = { + .l = 0x37, + .config_ctl_val = 0x04141200, + .config_ctl_hi_val = 0x0, + .early_output_mask = BIT(3), + .main_output_mask = BIT(0), +}; + +static const struct regmap_config ipq_pll_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = 0x40, + .fast_io = true, +}; + +static int apss_ipq_pll_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *regmap; + struct resource *res; + void __iomem *base; + int ret; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + regmap = devm_regmap_init_mmio(&pdev->dev, base, + &ipq_pll_regmap_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + clk_alpha_pll_configure(&ipq_pll, regmap, &ipq_pll_config); + + ret = devm_clk_register_regmap(dev, &ipq_pll.clkr); + if (ret) + return ret; + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + &ipq_pll.clkr.hw); +} + +static const struct of_device_id apss_ipq_pll_match_table[] = { + { .compatible = "qcom,ipq6018-a53pll" }, + { } +}; + +static struct platform_driver apss_ipq_pll_driver = { + .probe = apss_ipq_pll_probe, + .driver = { + .name = "qcom-ipq-apss-pll", + .of_match_table = apss_ipq_pll_match_table, + }, +}; +module_platform_driver(apss_ipq_pll_driver); + +MODULE_DESCRIPTION("Qualcomm technology Inc APSS ALPHA PLL Driver"); +MODULE_LICENSE("GPL v2"); From patchwork Sun May 24 10:04:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 188995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F13BDC433E1 for ; Sun, 24 May 2020 10:05:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D14C8207FB for ; Sun, 24 May 2020 10:05:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729294AbgEXKFE (ORCPT ); Sun, 24 May 2020 06:05:04 -0400 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]:53597 "EHLO alexa-out-sd-02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387614AbgEXKFA (ORCPT ); Sun, 24 May 2020 06:05:00 -0400 Received: from unknown (HELO ironmsg04-sd.qualcomm.com) ([10.53.140.144]) by alexa-out-sd-02.qualcomm.com with ESMTP; 24 May 2020 03:04:59 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg04-sd.qualcomm.com with ESMTP; 24 May 2020 03:04:55 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id BD956217FE; Sun, 24 May 2020 15:34:49 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V5 6/8] dt-bindings: mailbox: Add dt-bindings for ipq6018 apcs global block Date: Sun, 24 May 2020 15:34:44 +0530 Message-Id: <1590314686-11749-7-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> References: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dt-bindings for ipq6018 mailbox driver Reviewed-by: Rob Herring Signed-off-by: Sivaprakash Murugesan --- .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 12eff94..e05bff4 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -16,6 +16,7 @@ maintainers: properties: compatible: enum: + - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8996-apcs-hmss-global @@ -38,12 +39,12 @@ properties: const: 1 '#clock-cells': - const: 0 + enum: [ 0, 1 ] clock-names: items: - const: pll - - const: aux + - enum: [ aux, xo ] required: - compatible @@ -84,3 +85,15 @@ examples: clock-names = "pll", "aux"; #clock-cells = <0>; }; + + # Example apcs with ipq6018 + - | + #include "dt-bindings/clock/qcom,apss-ipq.h" + apcs_ipq: mailbox@b111000 { + compatible = "qcom,ipq6018-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + #clock-cells = <1>; + clocks = <&a53pll>, <&xo>; + clock-names = "pll", "xo"; + #mbox-cells = <1>; + }; From patchwork Sun May 24 10:04:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sivaprakash Murugesan X-Patchwork-Id: 188994 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNWANTED_LANGUAGE_BODY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A29DC433E5 for ; Sun, 24 May 2020 10:05:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 63166206DD for ; Sun, 24 May 2020 10:05:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729648AbgEXKFO (ORCPT ); Sun, 24 May 2020 06:05:14 -0400 Received: from alexa-out-sd-01.qualcomm.com ([199.106.114.38]:46282 "EHLO alexa-out-sd-01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387732AbgEXKFA (ORCPT ); Sun, 24 May 2020 06:05:00 -0400 Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-01.qualcomm.com with ESMTP; 24 May 2020 03:04:59 -0700 Received: from sivaprak-linux.qualcomm.com ([10.201.3.202]) by ironmsg05-sd.qualcomm.com with ESMTP; 24 May 2020 03:04:55 -0700 Received: by sivaprak-linux.qualcomm.com (Postfix, from userid 459349) id DB055217FF; Sun, 24 May 2020 15:34:49 +0530 (IST) From: Sivaprakash Murugesan To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sivaprakash Murugesan Subject: [PATCH V5 7/8] mailbox: qcom: Add ipq6018 apcs compatible Date: Sun, 24 May 2020 15:34:45 +0530 Message-Id: <1590314686-11749-8-git-send-email-sivaprak@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> References: <1590314686-11749-1-git-send-email-sivaprak@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Qualcomm ipq6018 has apcs block, add compatible for the same. Also, the apcs provides a clock controller functionality similar to msm8916 but the clock driver is different. Create a child platform device based on the apcs compatible for the clock controller functionality. Signed-off-by: Sivaprakash Murugesan --- [V5] * Addressed Bjorn's review comments drivers/mailbox/qcom-apcs-ipc-mailbox.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index eeebafd..db3f9518 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -45,6 +45,13 @@ static const struct mbox_chan_ops qcom_apcs_ipc_ops = { .send_data = qcom_apcs_ipc_send_data, }; +static const struct of_device_id apcs_clk_match_table[] = { + { .compatible = "qcom,ipq6018-apcs-apps-global", .data = "qcom,apss-ipq6018-clk", }, + { .compatible = "qcom,msm8916-apcs-kpss-global", .data = "qcom-apcs-msm8916-clk", }, + { .compatible = "qcom,qcs404-apcs-apps-global", .data = "qcom-apcs-msm8916-clk", }, + {} +}; + static int qcom_apcs_ipc_probe(struct platform_device *pdev) { struct qcom_apcs_ipc *apcs; @@ -54,11 +61,7 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) void __iomem *base; unsigned long i; int ret; - const struct of_device_id apcs_clk_match_table[] = { - { .compatible = "qcom,msm8916-apcs-kpss-global", }, - { .compatible = "qcom,qcs404-apcs-apps-global", }, - {} - }; + const struct of_device_id *clk_device; apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); if (!apcs) @@ -93,11 +96,12 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) return ret; } - if (of_match_device(apcs_clk_match_table, &pdev->dev)) { + clk_device = of_match_device(apcs_clk_match_table, &pdev->dev); + if (clk_device) { apcs->clk = platform_device_register_data(&pdev->dev, - "qcom-apcs-msm8916-clk", - PLATFORM_DEVID_NONE, - NULL, 0); + clk_device->data, + PLATFORM_DEVID_NONE, + NULL, 0); if (IS_ERR(apcs->clk)) dev_err(&pdev->dev, "failed to register APCS clk\n"); } @@ -126,6 +130,7 @@ static const struct of_device_id qcom_apcs_ipc_of_match[] = { { .compatible = "qcom,sc7180-apss-shared", .data = (void *)12 }, { .compatible = "qcom,sdm845-apss-shared", .data = (void *)12 }, { .compatible = "qcom,sm8150-apss-shared", .data = (void *)12 }, + { .compatible = "qcom,ipq6018-apcs-apps-global", .data = (void *)8 }, { .compatible = "qcom,ipq8074-apcs-apps-global", .data = (void *)8 }, {} };