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Fri, 30 May 2025 07:31:47 -0700 (PDT) Received: from iku.example.org ([2a06:5906:61b:2d00:bcab:7ec7:2377:13b0]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-450d7f8f194sm20107445e9.4.2025.05.30.07.31.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 May 2025 07:31:46 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Geert Uytterhoeven , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/6] dt-bindings: i2c: renesas,riic: Document RZ/T2H support Date: Fri, 30 May 2025 15:31:31 +0100 Message-ID: <20250530143135.366417-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Document support for the I2C Bus Interface (RIIC) found on the Renesas RZ/T2H (R9A09G077) SoC. The RIIC IP on this SoC is similar to that on the RZ/V2H(P) SoC but supports fewer interrupts, lacks FM+ support and does not require resets. Due to these differences, add a new compatible string `renesas,riic-r9a09g077` for the RZ/T2H SoC. Unlike earlier SoCs that use eight distinct interrupts, the RZ/T2H uses only four, including a combined error/event interrupt. Update the binding schema to reflect this interrupt layout and skip the `resets` property check, as it is not required on these SoCs. Signed-off-by: Lad Prabhakar Reviewed-by: Wolfram Sang --- .../devicetree/bindings/i2c/renesas,riic.yaml | 71 ++++++++++++++----- 1 file changed, 52 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml index bfcc400655dc..d2b11a702be0 100644 --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml @@ -29,32 +29,46 @@ properties: - renesas,riic-r9a09g056 # RZ/V2N - const: renesas,riic-r9a09g057 # RZ/V2H(P) - - const: renesas,riic-r9a09g057 # RZ/V2H(P) + - enum: + - renesas,riic-r9a09g057 # RZ/V2H(P) + - renesas,riic-r9a09g077 # RZ/T2H reg: maxItems: 1 interrupts: - items: - - description: Transmit End Interrupt - - description: Receive Data Full Interrupt - - description: Transmit Data Empty Interrupt - - description: Stop Condition Detection Interrupt - - description: Start Condition Detection Interrupt - - description: NACK Reception Interrupt - - description: Arbitration-Lost Interrupt - - description: Timeout Interrupt + oneOf: + - items: + - description: Transmit End Interrupt + - description: Receive Data Full Interrupt + - description: Transmit Data Empty Interrupt + - description: Stop Condition Detection Interrupt + - description: Start Condition Detection Interrupt + - description: NACK Reception Interrupt + - description: Arbitration-Lost Interrupt + - description: Timeout Interrupt + - items: + - description: Transmit End Interrupt + - description: Receive Data Full Interrupt + - description: Transmit Data Empty Interrupt + - description: Transmit error or event Interrupt interrupt-names: - items: - - const: tei - - const: ri - - const: ti - - const: spi - - const: sti - - const: naki - - const: ali - - const: tmoi + oneOf: + - items: + - const: tei + - const: ri + - const: ti + - const: spi + - const: sti + - const: naki + - const: ali + - const: tmoi + - items: + - const: tei + - const: ri + - const: ti + - const: eei clock-frequency: description: @@ -84,6 +98,25 @@ required: allOf: - $ref: /schemas/i2c/i2c-controller.yaml# + - if: + properties: + compatible: + contains: + const: renesas,riic-r9a09g077 + then: + properties: + interrupts: + maxItems: 4 + interrupt-names: + maxItems: 4 + resets: false + else: + properties: + interrupts: + minItems: 8 + interrupt-names: + minItems: 8 + - if: properties: compatible: From patchwork Fri May 30 14:31:33 2025 Content-Type: text/plain; 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Fri, 30 May 2025 07:31:51 -0700 (PDT) Received: from iku.example.org ([2a06:5906:61b:2d00:bcab:7ec7:2377:13b0]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-450d7f8f194sm20107445e9.4.2025.05.30.07.31.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 May 2025 07:31:49 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Geert Uytterhoeven , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 4/6] i2c: riic: Pass IRQ desc array as part of OF data Date: Fri, 30 May 2025 15:31:33 +0100 Message-ID: <20250530143135.366417-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar In preparation for adding support for Renesas RZ/T2H and RZ/N2H SoCs, which feature a combined error interrupt instead of individual error interrupts per condition, update the driver to support configurable IRQ layouts via OF data. Introduce a new `irqs` field and `num_irqs` count in `riic_of_data` to allow future SoCs to provide a custom IRQ layout. This patch is a non-functional change for existing SoCs and maintains compatibility with the current `riic_irqs` array. Signed-off-by: Lad Prabhakar Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang # on RZ/A1 --- drivers/i2c/busses/i2c-riic.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 23375f7fe3ad..4950b790cfe7 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -102,6 +102,8 @@ enum riic_reg_list { struct riic_of_data { const u8 *regs; + const struct riic_irq_desc *irqs; + u8 num_irqs; bool fast_mode_plus; }; @@ -520,21 +522,23 @@ static int riic_i2c_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(riic->rstc), "failed to acquire deasserted reset\n"); - for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { + riic->info = of_device_get_match_data(dev); + + for (i = 0; i < riic->info->num_irqs; i++) { + const struct riic_irq_desc *irq_desc; int irq; - irq = platform_get_irq(pdev, riic_irqs[i].res_num); + irq_desc = &riic->info->irqs[i]; + irq = platform_get_irq(pdev, irq_desc->res_num); if (irq < 0) return irq; - ret = devm_request_irq(dev, irq, riic_irqs[i].isr, - 0, riic_irqs[i].name, riic); + ret = devm_request_irq(dev, irq, irq_desc->isr, 0, irq_desc->name, riic); if (ret) return dev_err_probe(dev, ret, "failed to request irq %s\n", - riic_irqs[i].name); + irq_desc->name); } - riic->info = of_device_get_match_data(dev); adap = &riic->adapter; i2c_set_adapdata(adap, riic); @@ -607,10 +611,14 @@ static const u8 riic_rz_a_regs[RIIC_REG_END] = { static const struct riic_of_data riic_rz_a_info = { .regs = riic_rz_a_regs, .fast_mode_plus = true, + .irqs = riic_irqs, + .num_irqs = ARRAY_SIZE(riic_irqs), }; static const struct riic_of_data riic_rz_a1h_info = { .regs = riic_rz_a_regs, + .irqs = riic_irqs, + .num_irqs = ARRAY_SIZE(riic_irqs), }; static const u8 riic_rz_v2h_regs[RIIC_REG_END] = { @@ -631,6 +639,8 @@ static const u8 riic_rz_v2h_regs[RIIC_REG_END] = { static const struct riic_of_data riic_rz_v2h_info = { .regs = riic_rz_v2h_regs, .fast_mode_plus = true, + .irqs = riic_irqs, + .num_irqs = ARRAY_SIZE(riic_irqs), }; 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Fri, 30 May 2025 07:31:54 -0700 (PDT) Received: from iku.example.org ([2a06:5906:61b:2d00:bcab:7ec7:2377:13b0]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-450d7f8f194sm20107445e9.4.2025.05.30.07.31.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 May 2025 07:31:53 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Geert Uytterhoeven , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 6/6] i2c: riic: Add support for RZ/T2H SoC Date: Fri, 30 May 2025 15:31:35 +0100 Message-ID: <20250530143135.366417-7-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250530143135.366417-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Add support for the Renesas RZ/T2H (R9A09G077) SoC, which features a different interrupt layout for the RIIC controller. Unlike other SoCs with individual error interrupts, RZ/T2H uses a combined error interrupt (EEI). Introduce a new IRQ descriptor table for RZ/T2H, along with a custom ISR (`riic_eei_isr`) to handle STOP and NACK detection from the shared interrupt. Signed-off-by: Lad Prabhakar Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang # on RZ/A1 --- drivers/i2c/busses/i2c-riic.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index a4df00cb470c..1f9299f5effa 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -79,6 +79,7 @@ #define ICIER_SPIE BIT(3) #define ICSR2_NACKF BIT(4) +#define ICSR2_STOP BIT(3) #define ICBR_RESERVED GENMASK(7, 5) /* Should be 1 on writes */ @@ -326,6 +327,19 @@ static irqreturn_t riic_stop_isr(int irq, void *data) return IRQ_HANDLED; } +static irqreturn_t riic_eei_isr(int irq, void *data) +{ + u8 icsr2 = riic_readb(data, RIIC_ICSR2); + + if (icsr2 & ICSR2_NACKF) + return riic_tend_isr(irq, data); + + if (icsr2 & ICSR2_STOP) + return riic_stop_isr(irq, data); + + return IRQ_NONE; +} + static u32 riic_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; @@ -497,6 +511,13 @@ static const struct riic_irq_desc riic_irqs[] = { { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, }; +static const struct riic_irq_desc riic_rzt2h_irqs[] = { + { .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" }, + { .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" }, + { .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" }, + { .res_num = 3, .isr = riic_eei_isr, .name = "riic-eei" }, +}; + static int riic_i2c_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -643,6 +664,12 @@ static const struct riic_of_data riic_rz_v2h_info = { .num_irqs = ARRAY_SIZE(riic_irqs), }; +static const struct riic_of_data riic_rz_t2h_info = { + .regs = riic_rz_v2h_regs, + .irqs = riic_rzt2h_irqs, + .num_irqs = ARRAY_SIZE(riic_rzt2h_irqs), +}; + static int riic_i2c_suspend(struct device *dev) { struct riic_dev *riic = dev_get_drvdata(dev); @@ -695,6 +722,7 @@ static const struct dev_pm_ops riic_i2c_pm_ops = { static const struct of_device_id riic_i2c_dt_ids[] = { { .compatible = "renesas,riic-r7s72100", .data = &riic_rz_a1h_info, }, { .compatible = "renesas,riic-r9a09g057", .data = &riic_rz_v2h_info }, + { .compatible = "renesas,riic-r9a09g077", .data = &riic_rz_t2h_info }, { .compatible = "renesas,riic-rz", .data = &riic_rz_a_info }, { /* Sentinel */ } };