From patchwork Fri May 23 19:01:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Badal Nilawar X-Patchwork-Id: 891931 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A419329AB04; Fri, 23 May 2025 18:59:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748026799; cv=none; b=leMceu70JVr2YyhROqU1rqk52oUY71ICmHW3QNjFdkA576VD8l/DCvqdMXS9PFysIxuT4oNRWpTCnB1WgnsPe327/ffTcBGKqjtA/Zg5beIwRxYosXnFlDmuGgsPCyETU1oaY1+U+pMevKM+I1QM1UxdsrAmnUnHIsX2kFQtVV4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748026799; c=relaxed/simple; bh=sY0NnDSms1Xf1JCRlFpt0/e3+SFgBMlluoazWQTLkB0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ClT4cipKypThFVM/aVb0SOJHkV79if5HHf1Q0kpD9ympv/QVdnylm4lgh7PFY6EW2+ha910VgwDt/F64N1Bir6WFXoql4I7F2o523gLiUzsyDRZMaVY8JxGMXKNK8/SYCtyTFyrtzrqa/08zANQPejgoK+JAjaI52tA1rNa2buQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EEGra3BU; arc=none smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EEGra3BU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1748026798; x=1779562798; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sY0NnDSms1Xf1JCRlFpt0/e3+SFgBMlluoazWQTLkB0=; b=EEGra3BUdDgV4qvfcfRnmR0TW6WN/7CMBafGi8SzIImDnAbYsBC6L8xa T2LNdYZlWCI93chKm3iSgY9CKvFnBkzztdIZRG73O2QrPrVHtU19AmwGR bbvO6advFb+Q7LuZqAP6iaikzCimrVy8yE5M7Kzn1EewPlz8d31M7bo+6 wtdByGhQGnQO1/GBxC1jnazXgw0GPB7EvaZvTTuxMH23uQe54k/kzvEBs eUH/3qRfWSWPlIPMI7J4tK48ToyU5hTclHz1oMNnlq7Sa3fhRUqGLLmU/ PbUT8FfAz4/gVVph39BMhRrvtf3bjzYvGtvCjOZvoNwm+wBK0dAwkkA6+ A==; X-CSE-ConnectionGUID: zIDIFfiqQVSEoGsXvtoHhw== X-CSE-MsgGUID: P7FrwospSA+9Rs7+I/PJlQ== X-IronPort-AV: E=McAfee;i="6700,10204,11441"; a="61498425" X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="61498425" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 11:59:51 -0700 X-CSE-ConnectionGUID: 661m8WK6SrO5W5EEk1u8mQ== X-CSE-MsgGUID: MfyNjCaOTParsSvDwLoenA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="141758844" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 11:59:47 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 01/11] PCI/ACPI: Add D3cold Aux Power Limit_DSM method Date: Sat, 24 May 2025 00:31:45 +0530 Message-Id: <20250523190155.2623462-2-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Anshuman Gupta Implement _DSM method 0Ah according to PCI firmware specifications, section 4.6.10 Rev 3.3., to request auxilary power needed for the device when in D3Cold. Note that this implementation assumes only a single device below the Downstream Port will request for Aux Power Limit under a given Root Port because it does not track and aggregate requests from all child devices below the Downstream Port as required by Section 4.6.10 Rev 3.3. One possible mitigation would be only allowing only first PCIe Non-Bridge Endpoint Function 0 driver to call_DSM method 0Ah. V2(Bjorn/Rafael): - Call acpi_dsm_check() to find method 0Ah supported - Return retry interval to caller Signed-off-by: Varun Gupta Signed-off-by: Badal Nilawar Signed-off-by: Anshuman Gupta --- drivers/pci/pci-acpi.c | 87 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 8 ++++ 2 files changed, 95 insertions(+) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index af370628e583..76b19525535f 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1421,6 +1421,93 @@ static void pci_acpi_optimize_delay(struct pci_dev *pdev, ACPI_FREE(obj); } +/** + * pci_acpi_request_d3cold_aux_power - Request aux power while device is in D3Cold + * @dev: PCI device instance + * @requested_power: Requested auxiliary power in milliwatts + * @retry_interval: Retry interval returned by platform to retry auxiliary + * power request + * + * This function sends a request to the host BIOS via root port ACPI _DSM Function 0Ah + * for the auxiliary power needed by the PCI device when it is in D3Cold. + * It checks and evaluates the _DSM (Device Specific Method) to request the auxiliary + * power and handles the response accordingly. + * + * This function shall be only called by 1st non-bridge Endpoint driver + * on Function 0. For a Multi-Function Device, the driver for Function 0 is + * required to report an aggregate power requirement covering all + * functions contained within the device. + * + * Return: Returns 0 on success and errno on failure. + */ +int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power, + u32 *retry_interval) +{ + union acpi_object in_obj = { + .integer.type = ACPI_TYPE_INTEGER, + .integer.value = requested_power, + }; + + union acpi_object *out_obj; + acpi_handle handle; + int result, ret = -EINVAL; + + if (!dev) + return -EINVAL; + + handle = ACPI_HANDLE(&dev->dev); + if (!handle) + return -EINVAL; + + if (!acpi_check_dsm(handle, &pci_acpi_dsm_guid, 4, 1 << DSM_PCI_D3COLD_AUX_POWER_LIMIT)) { + pci_dbg(dev, "ACPI _DSM 0%Xh not supported\n", DSM_PCI_D3COLD_AUX_POWER_LIMIT); + return -ENODEV; + } + + out_obj = acpi_evaluate_dsm_typed(handle, &pci_acpi_dsm_guid, 4, + DSM_PCI_D3COLD_AUX_POWER_LIMIT, + &in_obj, ACPI_TYPE_INTEGER); + if (!out_obj) + return -EINVAL; + + result = out_obj->integer.value; + if (retry_interval) + *retry_interval = 0; + + switch (result) { + case 0x0: + pci_dbg(dev, "D3cold Aux Power %u mW request denied\n", + requested_power); + break; + case 0x1: + pci_info(dev, "D3cold Aux Power request granted: %u mW\n", + requested_power); + ret = 0; + break; + case 0x2: + pci_info(dev, "D3cold Aux Power: Main power won't be removed\n"); + ret = -EBUSY; + break; + default: + if (result >= 0x11 && result <= 0x1F) { + if (retry_interval) { + *retry_interval = result & 0xF; + pci_warn(dev, "D3cold Aux Power request needs retry interval: %u seconds\n", + *retry_interval); + ret = -EAGAIN; + } + } else { + pci_err(dev, "D3cold Aux Power: Reserved or unsupported response: 0x%x\n", + result); + } + break; + } + + ACPI_FREE(out_obj); + return ret; +} +EXPORT_SYMBOL_GPL(pci_acpi_request_d3cold_aux_power); + static void pci_acpi_set_external_facing(struct pci_dev *dev) { u8 val; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 078225b514d4..1705d03bfe26 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -121,6 +121,7 @@ extern const guid_t pci_acpi_dsm_guid; #define DSM_PCI_DEVICE_NAME 0x07 #define DSM_PCI_POWER_ON_RESET_DELAY 0x08 #define DSM_PCI_DEVICE_READINESS_DURATIONS 0x09 +#define DSM_PCI_D3COLD_AUX_POWER_LIMIT 0x0A #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); @@ -132,10 +133,17 @@ static inline void pci_acpi_remove_edr_notifier(struct pci_dev *pdev) { } int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_dev *)); void pci_acpi_clear_companion_lookup_hook(void); +int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power, + u32 *retry_interval); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } static inline void acpi_pci_remove_bus(struct pci_bus *bus) { } +static int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power, + u32 *retry_interval) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_ACPI */ #endif /* _PCI_ACPI_H_ */ From patchwork Fri May 23 19:01:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Badal Nilawar X-Patchwork-Id: 891930 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 603DC29B200; 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a="61498472" X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="61498472" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 11:59:59 -0700 X-CSE-ConnectionGUID: UviwiJiBQH6hdYJ00UcQKA== X-CSE-MsgGUID: QV17UTgbRRaIffwc524iIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="141758894" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 11:59:55 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 03/11] PCI/ACPI: Add PERST# Assertion Delay _DSM method Date: Sat, 24 May 2025 00:31:47 +0530 Message-Id: <20250523190155.2623462-4-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Anshuman Gupta Implement _DSM Method 0Bh as per PCI firmware specs section 4.6.11 Rev 3.3. Signed-off-by: Anshuman Gupta Signed-off-by: Badal Nilawar --- drivers/pci/pci-acpi.c | 57 ++++++++++++++++++++++++++++++++++++++++ include/linux/pci-acpi.h | 8 +++++- 2 files changed, 64 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 53ba67678c3d..678c48f72010 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1531,6 +1531,63 @@ int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power, } EXPORT_SYMBOL_GPL(pci_acpi_request_d3cold_aux_power); +/** + * pci_acpi_add_perst_assertion_delay - Request PERST# delay via ACPI DSM + * @dev: PCI device instance + * @delay_us: Requested delay_us + * + * This function sends a request to the host BIOS via ACPI _DSM to grant the + * required PERST# delay for the specified PCI device. It evaluates the _DSM + * to request the PERST# delay and handles the response accordingly. + * + * Return: returns 0 on success and errno on failure. + */ +int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us) +{ + union acpi_object in_obj = { + .integer.type = ACPI_TYPE_INTEGER, + .integer.value = delay_us, + }; + + union acpi_object *out_obj; + acpi_handle handle; + int result, ret = -EINVAL; + + if (!dev) + return -EINVAL; + + handle = ACPI_HANDLE(&dev->dev); + if (!handle) + return -EINVAL; + + if (!acpi_check_dsm(handle, &pci_acpi_dsm_guid, 4, 1 << DSM_PCI_PERST_ASSERTION_DELAY)) { + pci_dbg(dev, "ACPI _DSM 0%Xh not supported\n", DSM_PCI_PERST_ASSERTION_DELAY); + return -ENODEV; + } + + out_obj = acpi_evaluate_dsm_typed(handle, &pci_acpi_dsm_guid, 4, + DSM_PCI_PERST_ASSERTION_DELAY, + &in_obj, ACPI_TYPE_INTEGER); + if (!out_obj) + return -EINVAL; + + result = out_obj->integer.value; + + if (result == delay_us) { + pci_info(dev, "PERST# Assertion Delay set to %u microseconds\n", delay_us); + ret = 0; + } else if (result == 0) { + pci_warn(dev, "PERST# Assertion Delay request failed, no previous valid request\n"); + } else { + pci_warn(dev, "PERST# Assertion Delay request failed, Previous valid delay: %u microseconds\n", + result); + } + + ACPI_FREE(out_obj); + return ret; +} +EXPORT_SYMBOL_GPL(pci_acpi_add_perst_assertion_delay); + static void pci_acpi_set_external_facing(struct pci_dev *dev) { u8 val; diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 1705d03bfe26..889e469206e2 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -122,6 +122,7 @@ extern const guid_t pci_acpi_dsm_guid; #define DSM_PCI_POWER_ON_RESET_DELAY 0x08 #define DSM_PCI_DEVICE_READINESS_DURATIONS 0x09 #define DSM_PCI_D3COLD_AUX_POWER_LIMIT 0x0A +#define DSM_PCI_PERST_ASSERTION_DELAY 0x0B #ifdef CONFIG_PCIE_EDR void pci_acpi_add_edr_notifier(struct pci_dev *pdev); @@ -135,7 +136,7 @@ int pci_acpi_set_companion_lookup_hook(struct acpi_device *(*func)(struct pci_de void pci_acpi_clear_companion_lookup_hook(void); int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_power, u32 *retry_interval); - +int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us); #else /* CONFIG_ACPI */ static inline void acpi_pci_add_bus(struct pci_bus *bus) { } static inline void acpi_pci_remove_bus(struct pci_bus *bus) { } @@ -144,6 +145,11 @@ static int pci_acpi_request_d3cold_aux_power(struct pci_dev *dev, u32 requested_ { return -EOPNOTSUPP; } + +static int pci_acpi_add_perst_assertion_delay(struct pci_dev *dev, u32 delay_us) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_ACPI */ #endif /* _PCI_ACPI_H_ */ From patchwork Fri May 23 19:01:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Badal Nilawar X-Patchwork-Id: 891929 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D779E29B208; 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a="61498516" X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="61498516" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:06 -0700 X-CSE-ConnectionGUID: 5HK9La26SDSnlPEdLHQYYg== X-CSE-MsgGUID: WkCLMfuwQ5u1YVLMrwAFEA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="141758939" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:02 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 05/11] drm/xe/vrsr: Detect VRSR Capability Date: Sat, 24 May 2025 00:31:49 +0530 Message-Id: <20250523190155.2623462-6-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Anshuman Gupta Detect VRAM Self Refresh(vrsr) Capability. Reviewed-by: Rodrigo Vivi Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/regs/xe_regs.h | 3 +++ drivers/gpu/drm/xe/xe_device_types.h | 4 ++++ drivers/gpu/drm/xe/xe_pm.c | 26 ++++++++++++++++++++++++++ 3 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/xe/regs/xe_regs.h b/drivers/gpu/drm/xe/regs/xe_regs.h index 3abb17d2ca33..4db486fb310a 100644 --- a/drivers/gpu/drm/xe/regs/xe_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_regs.h @@ -53,6 +53,9 @@ #define MTL_MPE_FREQUENCY XE_REG(0x13802c) #define MTL_RPE_MASK REG_GENMASK(8, 0) +#define VRAM_SR_CAPABILITY XE_REG(0x138144) +#define VRAM_SR_SUPPORTED REG_BIT(0) + #define VF_CAP_REG XE_REG(0x1901f8, XE_REG_OPTION_VF) #define VF_CAP REG_BIT(0) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index e2749ed2a61f..3a15b3a252fd 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -512,6 +512,9 @@ struct xe_device { /** @d3cold.allowed: Indicates if d3cold is a valid device state */ bool allowed; + /** @d3cold.vrsr_capable: Indicates if d3cold VRAM Self Refresh is supported */ + bool vrsr_capable; + /** * @d3cold.vram_threshold: * @@ -522,6 +525,7 @@ struct xe_device { * Default threshold value is 300mb. */ u32 vram_threshold; + /** @d3cold.lock: protect vram_threshold */ struct mutex lock; } d3cold; diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 693866def183..c9395e62d21d 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -13,13 +13,16 @@ #include #include "display/xe_display.h" +#include "regs/xe_regs.h" #include "xe_bo.h" #include "xe_bo_evict.h" #include "xe_device.h" +#include "xe_force_wake.h" #include "xe_ggtt.h" #include "xe_gt.h" #include "xe_guc.h" #include "xe_irq.h" +#include "xe_mmio.h" #include "xe_pcode.h" #include "xe_pxp.h" #include "xe_trace.h" @@ -235,6 +238,28 @@ static bool xe_pm_pci_d3cold_capable(struct xe_device *xe) return true; } +static bool xe_pm_vrsr_capable(struct xe_device *xe) +{ + struct xe_mmio *mmio = xe_root_tile_mmio(xe); + unsigned int fw_ref; + struct xe_gt *gt; + u32 val; + + gt = xe_root_mmio_gt(xe); + + if (!xe->info.probe_display) + return false; + + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL); + if (!fw_ref) + return false; + + val = xe_mmio_read32(mmio, VRAM_SR_CAPABILITY); + xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); + + return val & VRAM_SR_SUPPORTED; +} + static void xe_pm_runtime_init(struct xe_device *xe) { struct device *dev = xe->drm.dev; @@ -349,6 +374,7 @@ int xe_pm_init(struct xe_device *xe) err = xe_pm_set_vram_threshold(xe, vram_threshold); if (err) goto err_unregister; + xe->d3cold.vrsr_capable = xe_pm_vrsr_capable(xe); } xe_pm_runtime_init(xe); From patchwork Fri May 23 19:01:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Badal Nilawar X-Patchwork-Id: 891928 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC4CE29AB04; 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a="61498564" X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="61498564" Received: from fmviesa010.fm.intel.com ([10.60.135.150]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:13 -0700 X-CSE-ConnectionGUID: OO2v4yrHSJ+Wn+zVD0ASAQ== X-CSE-MsgGUID: vYZkvnNxRzap15N2ZuqyVg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,309,1739865600"; d="scan'208";a="141758984" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:10 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 07/11] drm/xe/vrsr: Enable VRSR on default VGA boot device Date: Sat, 24 May 2025 00:31:51 +0530 Message-Id: <20250523190155.2623462-8-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The VRSR feature is to enhance the display screen refresh experience when the device exits from the D3Cold state. Therefore, apply the VRSR feature to the default VGA boot device and when a display is connected. Signed-off-by: Badal Nilawar Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/display/xe_display.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/xe/display/xe_display.h | 2 ++ drivers/gpu/drm/xe/xe_pm.c | 5 +++++ 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c index 20c3bcd953b7..b3da88b12b35 100644 --- a/drivers/gpu/drm/xe/display/xe_display.c +++ b/drivers/gpu/drm/xe/display/xe_display.c @@ -88,6 +88,28 @@ static void display_destroy(struct drm_device *dev, void *dummy) destroy_workqueue(xe->display.hotplug.dp_wq); } +bool xe_display_connected(struct xe_device *xe) +{ + struct drm_connector *list_connector; + struct drm_connector_list_iter iter; + bool ret = false; + + mutex_lock(&xe->drm.mode_config.mutex); + drm_connector_list_iter_begin(&xe->drm, &iter); + + drm_for_each_connector_iter(list_connector, &iter) { + if (list_connector->status == connector_status_connected) { + ret = true; + break; + } + } + + drm_connector_list_iter_end(&iter); + mutex_unlock(&xe->drm.mode_config.mutex); + + return ret; +} + /** * xe_display_create - create display struct * @xe: XE device instance diff --git a/drivers/gpu/drm/xe/display/xe_display.h b/drivers/gpu/drm/xe/display/xe_display.h index 46e14f8dee28..a432790d6d34 100644 --- a/drivers/gpu/drm/xe/display/xe_display.h +++ b/drivers/gpu/drm/xe/display/xe_display.h @@ -39,6 +39,7 @@ void xe_display_pm_resume(struct xe_device *xe); void xe_display_pm_runtime_suspend(struct xe_device *xe); void xe_display_pm_runtime_suspend_late(struct xe_device *xe); void xe_display_pm_runtime_resume(struct xe_device *xe); +bool xe_display_connected(struct xe_device *xe); #else @@ -71,5 +72,6 @@ static inline void xe_display_pm_runtime_suspend(struct xe_device *xe) {} static inline void xe_display_pm_runtime_suspend_late(struct xe_device *xe) {} static inline void xe_display_pm_runtime_resume(struct xe_device *xe) {} +static inline bool xe_display_connected(struct xe_device *xe) {} #endif /* CONFIG_DRM_XE_DISPLAY */ #endif /* _XE_DISPLAY_H_ */ diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index 278f2eeeaab6..c84b9b3f7371 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include @@ -310,6 +311,7 @@ static int pci_acpi_aux_power_setup(struct xe_device *xe) static void xe_pm_vrsr_init(struct xe_device *xe) { + struct pci_dev *pdev = to_pci_dev(xe->drm.dev); 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d="scan'208";a="141759049" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:17 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 09/11] drm/xe/pm: D3Cold target state Date: Sat, 24 May 2025 00:31:53 +0530 Message-Id: <20250523190155.2623462-10-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Anshuman Gupta Trade-off D3Cold target state based upon current vram usage. If vram usage is greater than vram_d3cold_threshold and GPU is VRSR capable target D3Cold state is D3Cold-VRSR otherwise target state is D3Cold-Off. Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/xe/xe_pm.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c index b86e95493cb5..1e061bfc3e52 100644 --- a/drivers/gpu/drm/xe/xe_pm.c +++ b/drivers/gpu/drm/xe/xe_pm.c @@ -113,6 +113,14 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe) &xe_pm_runtime_d3cold_map); } +static void xe_pm_suspend_prepare(struct xe_device *xe) +{ + if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) + xe_pm_d3cold_target_state_toggle(xe); + else + xe->d3cold.target_state = XE_D3COLD_OFF; +} + /** * xe_pm_suspend - Helper for System suspend, i.e. S0->S3 / S0->S2idle * @xe: xe device instance @@ -128,6 +136,8 @@ int xe_pm_suspend(struct xe_device *xe) drm_dbg(&xe->drm, "Suspending device\n"); trace_xe_pm_suspend(xe, __builtin_return_address(0)); + xe_pm_suspend_prepare(xe); + err = xe_pxp_pm_suspend(xe->pxp); if (err) goto err; @@ -948,10 +958,14 @@ void xe_pm_d3cold_target_state_toggle(struct xe_device *xe) if (total_vram_used_mb < xe->d3cold.vram_threshold) xe->d3cold.target_state = XE_D3COLD_OFF; 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d="scan'208";a="141759109" Received: from unknown (HELO bnilawar-desk2.iind.intel.com) ([10.190.239.41]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 May 2025 12:00:24 -0700 From: Badal Nilawar To: intel-xe@lists.freedesktop.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org Cc: anshuman.gupta@intel.com, rafael@kernel.org, lenb@kernel.org, bhelgaas@google.com, ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com, rodrigo.vivi@intel.com, varun.gupta@intel.com, ville.syrjala@linux.intel.com, uma.shankar@intel.com Subject: [PATCH v3 11/11] drm/xe/vrsr: Introduce a debugfs node named vrsr_capable Date: Sat, 24 May 2025 00:31:55 +0530 Message-Id: <20250523190155.2623462-12-badal.nilawar@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250523190155.2623462-1-badal.nilawar@intel.com> References: <20250523190155.2623462-1-badal.nilawar@intel.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a debugfs node named vrsr_capable to check if the device supports VRSR. Signed-off-by: Badal Nilawar --- drivers/gpu/drm/xe/xe_debugfs.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c index d83cd6ed3fa8..d969a8f6d430 100644 --- a/drivers/gpu/drm/xe/xe_debugfs.c +++ b/drivers/gpu/drm/xe/xe_debugfs.c @@ -226,6 +226,23 @@ static const struct file_operations atomic_svm_timeslice_ms_fops = { .write = atomic_svm_timeslice_ms_set, }; +static ssize_t vrsr_capable_show(struct file *f, char __user *ubuf, + size_t size, loff_t *pos) +{ + struct xe_device *xe = file_inode(f)->i_private; + char buf[32]; + int len = 0; + + len = scnprintf(buf, sizeof(buf), "%s\n", xe->d3cold.vrsr_capable ? "true" : "false"); + + return simple_read_from_buffer(ubuf, size, pos, buf, len); +} + +static const struct file_operations vrsr_capable_fops = { + .owner = THIS_MODULE, + .read = vrsr_capable_show, +}; + void xe_debugfs_register(struct xe_device *xe) { struct ttm_device *bdev = &xe->ttm; @@ -249,6 +266,9 @@ void xe_debugfs_register(struct xe_device *xe) debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe, &atomic_svm_timeslice_ms_fops); + debugfs_create_file("vrsr_capable", 0400, root, xe, + &vrsr_capable_fops); + for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) { man = ttm_manager_type(bdev, mem_type);