From patchwork Tue May 13 07:45:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 889791 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1257F1E5207 for ; Tue, 13 May 2025 07:45:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122340; cv=none; b=i8whwoHM6gU8614eSWY90914LPxCIn7R4Exyn2piaxaQFvPUzzfwSKVYe11UZxncDMfx/JMJKZCjxf8U+fvP93cP7i56soTNmNSH5O5fN1LMdiN8xMQ0xNtZhz6Taz293XO4oFZEwCHax0im2FF10U2Op+Vb+3eNayfldMACE+I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122340; c=relaxed/simple; bh=i7c13Gx7ImmVCJkOmWASB6MlRH5XUlUJFmNae3cYyt8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=P/cv69FMy6pjVC7Lr5zodI3v4AKCR+1LE/tkK4t0ZJmcOuWkk4xAqtWX633SA3aT+1ob/XiDYMVfsVIfiE0XcLfFvkppOk+lY6BP0dkdQElQZPNucy9meFrzJZrASueZiSqzLytiY29qDi8YkAeYWYV+63v8BY2I0hqQat2eLnA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Lo6R4Z4a; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Lo6R4Z4a" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=8PBpHzT0posY/8hYMZRUjLsaZmxxP91alDxR/meOvvM=; b=Lo6R4Z4aCiuwbMnwqFZfhaZOkD ynFukQ9OZvMHuOHo2l7GnC01nZS13biJJiFdjvVRWq6rJWNrC4bn7DLAb2J9oVPSmXfShSVAXKn3M 5yIcjkV3EMvSMhg6RltK8/ue6cO46rUO3e9sO0qYmkFtqAJ/l4Pfnrh1p95irSeJ1a7KYqZGfBdEF oQOT+d/DHBG+DHgsz+DPVmNg+dBsN9+SE4xrjtZvrzFkT0cKJE71fIdvzH+yqaC4hficWDn1SVLP6 wJAyZhBhOI16Pm3chM9SrMoLwhDh8fPFyuVjJ3ufuzehsVKg8EthQPYmGtcwXOZjqo5G1nF3AHvBX RpCWrPog==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uEkF0-007Tui-9E; Tue, 13 May 2025 09:45:24 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v3 01/10] dma-fence: Change signature of __dma_fence_is_later Date: Tue, 13 May 2025 08:45:04 +0100 Message-ID: <20250513074513.81727-2-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> References: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the goal of reducing the need for drivers to touch (and dereference) fence->ops, we change the prototype of __dma_fence_is_later() to take fence instead of fence->ops. Signed-off-by: Tvrtko Ursulin Reviewed-by: Christian König --- drivers/dma-buf/dma-fence-chain.c | 2 +- drivers/dma-buf/sw_sync.c | 2 +- drivers/gpu/drm/xe/xe_hw_fence.c | 2 +- drivers/gpu/drm/xe/xe_sched_job.c | 14 ++++++++------ include/linux/dma-fence.h | 9 ++++----- 5 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index 9663ba1bb6ac..90424f23fd73 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -252,7 +252,7 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, chain->prev_seqno = 0; /* Try to reuse the context of the previous chain node. */ - if (prev_chain && __dma_fence_is_later(seqno, prev->seqno, prev->ops)) { + if (prev_chain && __dma_fence_is_later(prev, seqno, prev->seqno)) { context = prev->context; chain->prev_seqno = prev->seqno; } else { diff --git a/drivers/dma-buf/sw_sync.c b/drivers/dma-buf/sw_sync.c index 4f27ee93a00c..3c20f1d31cf5 100644 --- a/drivers/dma-buf/sw_sync.c +++ b/drivers/dma-buf/sw_sync.c @@ -170,7 +170,7 @@ static bool timeline_fence_signaled(struct dma_fence *fence) { struct sync_timeline *parent = dma_fence_parent(fence); - return !__dma_fence_is_later(fence->seqno, parent->value, fence->ops); + return !__dma_fence_is_later(fence, fence->seqno, parent->value); } static void timeline_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c index 0b4f12be3692..03eb8c6d1616 100644 --- a/drivers/gpu/drm/xe/xe_hw_fence.c +++ b/drivers/gpu/drm/xe/xe_hw_fence.c @@ -165,7 +165,7 @@ static bool xe_hw_fence_signaled(struct dma_fence *dma_fence) u32 seqno = xe_map_rd(xe, &fence->seqno_map, 0, u32); return dma_fence->error || - !__dma_fence_is_later(dma_fence->seqno, seqno, dma_fence->ops); + !__dma_fence_is_later(dma_fence, dma_fence->seqno, seqno); } static bool xe_hw_fence_enable_signaling(struct dma_fence *dma_fence) diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c index 1905ca590965..f0a6ce610948 100644 --- a/drivers/gpu/drm/xe/xe_sched_job.c +++ b/drivers/gpu/drm/xe/xe_sched_job.c @@ -216,15 +216,17 @@ void xe_sched_job_set_error(struct xe_sched_job *job, int error) bool xe_sched_job_started(struct xe_sched_job *job) { + struct dma_fence *fence = dma_fence_chain_contained(job->fence); struct xe_lrc *lrc = job->q->lrc[0]; - return !__dma_fence_is_later(xe_sched_job_lrc_seqno(job), - xe_lrc_start_seqno(lrc), - dma_fence_chain_contained(job->fence)->ops); + return !__dma_fence_is_later(fence, + xe_sched_job_lrc_seqno(job), + xe_lrc_start_seqno(lrc)); } bool xe_sched_job_completed(struct xe_sched_job *job) { + struct dma_fence *fence = dma_fence_chain_contained(job->fence); struct xe_lrc *lrc = job->q->lrc[0]; /* @@ -232,9 +234,9 @@ bool xe_sched_job_completed(struct xe_sched_job *job) * parallel handshake is done. */ - return !__dma_fence_is_later(xe_sched_job_lrc_seqno(job), - xe_lrc_seqno(lrc), - dma_fence_chain_contained(job->fence)->ops); + return !__dma_fence_is_later(fence, + xe_sched_job_lrc_seqno(job), + xe_lrc_seqno(lrc)); } void xe_sched_job_arm(struct xe_sched_job *job) diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index b12776883d14..48b5202c531d 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -441,21 +441,20 @@ dma_fence_is_signaled(struct dma_fence *fence) /** * __dma_fence_is_later - return if f1 is chronologically later than f2 + * @fence: fence in whose context to do the comparison * @f1: the first fence's seqno * @f2: the second fence's seqno from the same context - * @ops: dma_fence_ops associated with the seqno * * Returns true if f1 is chronologically later than f2. Both fences must be * from the same context, since a seqno is not common across contexts. */ -static inline bool __dma_fence_is_later(u64 f1, u64 f2, - const struct dma_fence_ops *ops) +static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2) { /* This is for backward compatibility with drivers which can only handle * 32bit sequence numbers. Use a 64bit compare when the driver says to * do so. */ - if (ops->use_64bit_seqno) + if (fence->ops->use_64bit_seqno) return f1 > f2; return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; @@ -475,7 +474,7 @@ static inline bool dma_fence_is_later(struct dma_fence *f1, if (WARN_ON(f1->context != f2->context)) return false; - return __dma_fence_is_later(f1->seqno, f2->seqno, f1->ops); + return __dma_fence_is_later(f1, f1->seqno, f2->seqno); } /** From patchwork Tue May 13 07:45:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 889792 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 618CA1BC4E for ; Tue, 13 May 2025 07:45:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122337; cv=none; b=U/t3GTG6Wh5YTRIeGF9D3IO1E1AZ/hwPWGctaJdgj71O0HCACYd63T4EbMcqQ5t/4xNQoxucOjv58LKMXBSHTq/ZOPat5VjzolWrlwfsF6bs2PV/myzfFoeEoDAVIFG6DCMucLyyFj+nMPc4cZv877XMQLaJcGcVZMO5YcO9IBk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122337; c=relaxed/simple; bh=PXOjBC1zcpHu3MBNW0360uz2LAFqMOEV96e6x/7EfJs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=PJ4CME2FL0oK8UX4Q/UHNhzX/r03eh/FB6Z4ck5Iv+G4pEzWiw8S0eQ5hcJDAaO14ha0yNvUCSKiZv0Kj/WVP+HGIt+euTV0nzcfRpom57O103qgrekeMlnoqocikHzLnTp5NUFdtViq6HmTDIc6fdgK4pausAQSMk0O9ughS/Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=mi8ofs/0; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="mi8ofs/0" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=YqG3F1nwnJqHSQab4xMnAquojdAEH0nS8rKHczAwQco=; b=mi8ofs/0oA6a/2IDKfOGeIgfOE AXNEOp05GsCNpnbznaQCu4MncCLqTAqa+kWYl4S4DzOzdMTMoq7BzEQEu414gK/oooD0sF7DcDEeN ZZ22O7p06wbd10Bl1NZ6Cc0uiWmYs2P91eCLewUUc9KWiQlYykPUvyhAhEzbnWqNiO5DhyKzJwWJQ fxTYRBdbtTajDtATx5fbH2WpNoZvmQTxsmZjPzq8A4IJolbt6CUFVu3P7DF1czLJNIA38Ax3ZgWlW ztMjP5O9BDJ8EmD7dmZzoSy0BMORojlB7V+OvnKni92BeJjlBzvzWxKPNmSOqF8595tNOA6tkzTfd ql7oBy4g==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uEkF1-007Tuo-1p; Tue, 13 May 2025 09:45:25 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v3 02/10] dma-fence: Use a flag for 64-bit seqnos Date: Tue, 13 May 2025 08:45:05 +0100 Message-ID: <20250513074513.81727-3-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> References: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 With the goal of reducing the need for drivers to touch (and dereference) fence->ops, we move the 64-bit seqnos flag from struct dma_fence_ops to the fence->flags. Drivers which were setting this flag are changed to use new dma_fence_init64() instead of dma_fence_init(). Signed-off-by: Tvrtko Ursulin Reviewed-by: Christian König --- drivers/dma-buf/dma-fence-chain.c | 5 ++--- drivers/dma-buf/dma-fence.c | 9 +++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c | 5 ++--- include/linux/dma-fence.h | 14 +++++--------- 4 files changed, 18 insertions(+), 15 deletions(-) diff --git a/drivers/dma-buf/dma-fence-chain.c b/drivers/dma-buf/dma-fence-chain.c index 90424f23fd73..a8a90acf4f34 100644 --- a/drivers/dma-buf/dma-fence-chain.c +++ b/drivers/dma-buf/dma-fence-chain.c @@ -218,7 +218,6 @@ static void dma_fence_chain_set_deadline(struct dma_fence *fence, } const struct dma_fence_ops dma_fence_chain_ops = { - .use_64bit_seqno = true, .get_driver_name = dma_fence_chain_get_driver_name, .get_timeline_name = dma_fence_chain_get_timeline_name, .enable_signaling = dma_fence_chain_enable_signaling, @@ -262,8 +261,8 @@ void dma_fence_chain_init(struct dma_fence_chain *chain, seqno = max(prev->seqno, seqno); } - dma_fence_init(&chain->base, &dma_fence_chain_ops, - &chain->lock, context, seqno); + dma_fence_init64(&chain->base, &dma_fence_chain_ops, &chain->lock, + context, seqno); /* * Chaining dma_fence_chain container together is only allowed through diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c index f0cdd3e99d36..33661658f684 100644 --- a/drivers/dma-buf/dma-fence.c +++ b/drivers/dma-buf/dma-fence.c @@ -1023,3 +1023,12 @@ dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, trace_dma_fence_init(fence); } EXPORT_SYMBOL(dma_fence_init); + +void +dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, + spinlock_t *lock, u64 context, u64 seqno) +{ + dma_fence_init(fence, ops, lock, context, seqno); + __set_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags); +} +EXPORT_SYMBOL(dma_fence_init64); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c index 51cddfa3f1e8..5d26797356a3 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_tlb_fence.c @@ -71,7 +71,6 @@ static void amdgpu_tlb_fence_work(struct work_struct *work) } static const struct dma_fence_ops amdgpu_tlb_fence_ops = { - .use_64bit_seqno = true, .get_driver_name = amdgpu_tlb_fence_get_driver_name, .get_timeline_name = amdgpu_tlb_fence_get_timeline_name }; @@ -101,8 +100,8 @@ void amdgpu_vm_tlb_fence_create(struct amdgpu_device *adev, struct amdgpu_vm *vm INIT_WORK(&f->work, amdgpu_tlb_fence_work); spin_lock_init(&f->lock); - dma_fence_init(&f->base, &amdgpu_tlb_fence_ops, &f->lock, - vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); + dma_fence_init64(&f->base, &amdgpu_tlb_fence_ops, &f->lock, + vm->tlb_fence_context, atomic64_read(&vm->tlb_seq)); /* TODO: We probably need a separate wq here */ dma_fence_get(&f->base); diff --git a/include/linux/dma-fence.h b/include/linux/dma-fence.h index 48b5202c531d..a34a0dcdc446 100644 --- a/include/linux/dma-fence.h +++ b/include/linux/dma-fence.h @@ -97,6 +97,7 @@ struct dma_fence { }; enum dma_fence_flag_bits { + DMA_FENCE_FLAG_SEQNO64_BIT, DMA_FENCE_FLAG_SIGNALED_BIT, DMA_FENCE_FLAG_TIMESTAMP_BIT, DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, @@ -124,14 +125,6 @@ struct dma_fence_cb { * */ struct dma_fence_ops { - /** - * @use_64bit_seqno: - * - * True if this dma_fence implementation uses 64bit seqno, false - * otherwise. - */ - bool use_64bit_seqno; - /** * @get_driver_name: * @@ -262,6 +255,9 @@ struct dma_fence_ops { void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops, spinlock_t *lock, u64 context, u64 seqno); +void dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops, + spinlock_t *lock, u64 context, u64 seqno); + void dma_fence_release(struct kref *kref); void dma_fence_free(struct dma_fence *fence); void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq); @@ -454,7 +450,7 @@ static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2) * 32bit sequence numbers. Use a 64bit compare when the driver says to * do so. */ - if (fence->ops->use_64bit_seqno) + if (test_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags)) return f1 > f2; return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0; From patchwork Tue May 13 07:45:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 889790 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 681E61EB19F for ; Tue, 13 May 2025 07:45:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122341; cv=none; b=HRPDBjIGPLlngnyH9ODMDCUUHCQ0JG8tPnvWCcEUJfsSKDwZoR+7wvfKqywiL+zmY83AnGCeLCPSM5sU4wfy9k2xZoOFWgjL/xRUbCWbOYEKslWbQFuncxqVZYOxu/KqHiKQOj6yFqLJD68PcHYuXzJws7CLRq5j3K5QH0iqESA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122341; c=relaxed/simple; bh=lsDa0KVNC0AZcujajX3hqhZcO7pA3Rsdh7URxFTaYdA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gpcbAMjcs7B3uwmPl42RirhYc3SA4aIfjDDnALKmwrHOigJ6EzaezraLFY3nAe1pPpgLtf9Z6o4d2a8uGXGHFLWxJKGb+51x2mWlwUUY1BdwQNLbBvDLKm9C+iwzbM/BUJtQkSYWpRTCUKFyv6K5e9M4xjsG0T6ZgtC83OJ6TU8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=jyLjX5f+; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="jyLjX5f+" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=g3rpD6n1YiYsI0Pm9IK2h3p3UtZO2J250rvvrG+r9rE=; b=jyLjX5f+0VaKLSd9zC9LrxnnHv yDxhEqNjfK+h2bEotOgixVX15lFw7f9lbhP3U3voY8ntjAFeMZfyTlFEIhfITeztplmmorDLzuMDL 8yyY/P21Il2Zbl8l0xtHnDajejSQauj8mexTZaeW/44etGLg10rHw/MMhGaBveF35O9zwtdPocGbA hSDu8l5JMnrME45E900iclYKR+d/8NNKaH6IKHSDLJ9lB57z2JW1eNcpfiwe1XAPuQdbQJFfCKwNg G6+JVxmBVbBPPWcpXP3PrEMnGlhPwY/cKW7dy3DsN3UzdufaB0Yagp2Cu7PzgZ/rdTfyA9GmjP531 FFKoiWqQ==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uEkF2-007Tv5-Ij; Tue, 13 May 2025 09:45:27 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v3 04/10] sync_file: Use dma-fence driver and timeline name helpers Date: Tue, 13 May 2025 08:45:07 +0100 Message-ID: <20250513074513.81727-5-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> References: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Access the dma-fence internals via the previously added helpers. Signed-off-by: Tvrtko Ursulin Reviewed-by: Christian König --- drivers/dma-buf/sync_file.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma-buf/sync_file.c b/drivers/dma-buf/sync_file.c index d9b1c1b2a72b..212df4b849fe 100644 --- a/drivers/dma-buf/sync_file.c +++ b/drivers/dma-buf/sync_file.c @@ -137,8 +137,8 @@ char *sync_file_get_name(struct sync_file *sync_file, char *buf, int len) struct dma_fence *fence = sync_file->fence; snprintf(buf, len, "%s-%s%llu-%lld", - fence->ops->get_driver_name(fence), - fence->ops->get_timeline_name(fence), + dma_fence_driver_name(fence), + dma_fence_timeline_name(fence), fence->context, fence->seqno); } @@ -262,9 +262,9 @@ static long sync_file_ioctl_merge(struct sync_file *sync_file, static int sync_fill_fence_info(struct dma_fence *fence, struct sync_fence_info *info) { - strscpy(info->obj_name, fence->ops->get_timeline_name(fence), + strscpy(info->obj_name, dma_fence_timeline_name(fence), sizeof(info->obj_name)); - strscpy(info->driver_name, fence->ops->get_driver_name(fence), + strscpy(info->driver_name, dma_fence_driver_name(fence), sizeof(info->driver_name)); info->status = dma_fence_get_status(fence); From patchwork Tue May 13 07:45:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 889788 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBD0F1F1517 for ; Tue, 13 May 2025 07:45:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122343; cv=none; b=TNW2r3sC6FWua4J0o410nYXTYgr6VSEmJvbqYF+EPizuGf0LyZfh/kjWCqCpVW/BGHTv9PTzTklQAxzP0zh5vU1vKOjL8NNRjrr8M/r4d6Y0RboBwdiYZVsRaXbvJRuOLk4Wgf3PLhSq7qGcpR6fCfJItl9nB4/xNPdwSg1HMLw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122343; c=relaxed/simple; bh=om63Rj+R4gSyT6O3FS3qSaAOAYSa9SNs354UxS993r0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Arc38Jq37EyTCTLFgvqHd3h6K0JfwEWhWIT4IDsCa3GO71LxIiFEfPM7N9RBnItPqVf53wtUWZIbg+iSpnu2gHwLqd6Sk/yToVZN6t84NnNyWyvTkPx1K/yr3TEelS09hsbrsJZXddt0E6jj45LliwdNRt5/RSZuB3O914tCUzE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com; spf=pass smtp.mailfrom=igalia.com; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b=Lk8UdvGz; arc=none smtp.client-ip=213.97.179.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=igalia.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=igalia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=igalia.com header.i=@igalia.com header.b="Lk8UdvGz" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=WxXAf4KUqwU8dybGJiNaAxYGwYm+8UhaEKMKuKOvWBw=; b=Lk8UdvGzVdQ4msCWgOJGrWd3IU GmxtQf+9yl3vDiuDO4gVQZRT/sJaeuKtDBa+AgEydVkekzzFcekTozsVblM+cp2qEXGNe7ItRIjfU +N62pwziUo0VUIXs8z3jBnOSsCH4IejFFPUbt4bx7CIwdVC4DIiCwpRY05j7DYNHTnnW/hqZP7e+c jiC9WgNimT596rvq6eqsMTWH/vmDGevhNuHRtOH5xhKfvfdGXo5+TLyWlznhZ6C1GYklB4j+DD8rM 1qy92wDzeoMCxsHMnU9+uxpT9mZyY9TjOe/nMeFivgUs652hNvbSfRP87ADUjkViPjXjxt/aOKKHh 5vbGPuhQ==; Received: from [81.79.92.254] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1uEkF4-007TvO-2n; Tue, 13 May 2025 09:45:28 +0200 From: Tvrtko Ursulin To: dri-devel@lists.freedesktop.org Cc: Rob Clark , Sumit Semwal , Gustavo Padovan , =?utf-8?q?Christian_K=C3=B6nig?= , Matthew Brost , Lucas De Marchi , Rodrigo Vivi , amd-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, kernel-dev@igalia.com, Tvrtko Ursulin Subject: [RFC v3 06/10] drm/i915: Use dma-fence driver and timeline name helpers Date: Tue, 13 May 2025 08:45:09 +0100 Message-ID: <20250513074513.81727-7-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> References: <20250513074513.81727-1-tvrtko.ursulin@igalia.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Access the dma-fence internals via the previously added helpers. Signed-off-by: Tvrtko Ursulin Reviewed-by: Christian König --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 4 ++-- drivers/gpu/drm/i915/i915_request.c | 2 +- drivers/gpu/drm/i915/i915_sw_fence.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c index d1a382dfaa1d..ae3557ed6c1e 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c @@ -252,8 +252,8 @@ void intel_gt_watchdog_work(struct work_struct *work) struct dma_fence *f = &rq->fence; pr_notice("Fence expiration time out i915-%s:%s:%llx!\n", - f->ops->get_driver_name(f), - f->ops->get_timeline_name(f), + dma_fence_driver_name(f), + dma_fence_timeline_name(f), f->seqno); i915_request_cancel(rq, -EINTR); } diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index c3d27eadc0a7..4874c4f1e4ab 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -2184,7 +2184,7 @@ void i915_request_show(struct drm_printer *m, const char *prefix, int indent) { - const char *name = rq->fence.ops->get_timeline_name((struct dma_fence *)&rq->fence); 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Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 2 ++ drivers/gpu/drm/i915/i915_request.c | 5 +++-- drivers/gpu/drm/i915/i915_sw_fence.c | 2 ++ 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c index ae3557ed6c1e..11fca24c8b5b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c @@ -251,10 +251,12 @@ void intel_gt_watchdog_work(struct work_struct *work) if (!i915_request_completed(rq)) { struct dma_fence *f = &rq->fence; + dma_fence_access_begin(); pr_notice("Fence expiration time out i915-%s:%s:%llx!\n", dma_fence_driver_name(f), dma_fence_timeline_name(f), f->seqno); + dma_fence_access_end(); i915_request_cancel(rq, -EINTR); } i915_request_put(rq); diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c index 4874c4f1e4ab..8008b7767641 100644 --- a/drivers/gpu/drm/i915/i915_request.c +++ b/drivers/gpu/drm/i915/i915_request.c @@ -2184,7 +2184,6 @@ void i915_request_show(struct drm_printer *m, const char *prefix, int indent) { - const char *name = dma_fence_timeline_name((struct dma_fence *)&rq->fence); char buf[80] = ""; int x = 0; @@ -2220,6 +2219,7 @@ void i915_request_show(struct drm_printer *m, x = print_sched_attr(&rq->sched.attr, buf, x, sizeof(buf)); + dma_fence_access_begin(); drm_printf(m, "%s%.*s%c %llx:%lld%s%s %s @ %dms: %s\n", prefix, indent, " ", queue_status(rq), @@ -2228,7 +2228,8 @@ void i915_request_show(struct drm_printer *m, fence_status(rq), buf, jiffies_to_msecs(jiffies - rq->emitted_jiffies), - name); + dma_fence_timeline_name((struct dma_fence *)&rq->fence)); + dma_fence_access_end(); } static bool engine_match_ring(struct intel_engine_cs *engine, struct i915_request *rq) diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c index e51ca7e50a4e..e7bdc1165b90 100644 --- a/drivers/gpu/drm/i915/i915_sw_fence.c +++ b/drivers/gpu/drm/i915/i915_sw_fence.c @@ -434,11 +434,13 @@ static void timer_i915_sw_fence_wake(struct timer_list *t) if (!fence) return; + dma_fence_access_begin(); pr_notice("Asynchronous wait on fence %s:%s:%llx timed out (hint:%ps)\n", dma_fence_driver_name(cb->dma), dma_fence_timeline_name(cb->dma), cb->dma->seqno, i915_sw_fence_debug_hint(fence)); + dma_fence_access_end(); i915_sw_fence_set_error_once(fence, -ETIMEDOUT); i915_sw_fence_complete(fence); From patchwork Tue May 13 07:45:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tvrtko Ursulin X-Patchwork-Id: 889789 Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBD8D1F1518 for ; Tue, 13 May 2025 07:45:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.97.179.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747122342; cv=none; b=DSoh2fYSc2L6sCKMU1VX2oDylChINqijcHb9EvtRsFUVU1Aei8ow1xDsNZ86RwlyNIg+lXA2YrYPJeXmq3XczJlPWvU0kXOdSwW8YPt3BykzBT3JxeIahM3pItE5BASCAhsuGVkSfs69O/auSbFVMsHlLHzKlCy9BTvF9TGfy2M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Most notably the timeline name can get freed if userspace closes the associated submit queue. At the same time the fence could have been exported to a third party (for example a sync_fence fd) which will then cause an use- after-free on subsequent access. To make this safe we need to make the driver compliant with the newly documented dma-fence rules. Driver has to ensure a RCU grace period between signalling a fence and freeing any data pointed to by said fence. For the timeline name we simply make the queue be freed via kfree_rcu and for the shared lock associated with multiple queues we add a RCU grace period before freeing the per GT structure holding the lock. Signed-off-by: Tvrtko Ursulin Reviewed-by: Matthew Brost --- drivers/gpu/drm/xe/xe_guc_exec_queue_types.h | 2 ++ drivers/gpu/drm/xe/xe_guc_submit.c | 7 ++++++- drivers/gpu/drm/xe/xe_hw_fence.c | 3 +++ 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h index 4c39f01e4f52..a3f421e2adc0 100644 --- a/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h +++ b/drivers/gpu/drm/xe/xe_guc_exec_queue_types.h @@ -20,6 +20,8 @@ struct xe_exec_queue; struct xe_guc_exec_queue { /** @q: Backpointer to parent xe_exec_queue */ struct xe_exec_queue *q; + /** @rcu: For safe freeing of exported dma fences */ + struct rcu_head rcu; /** @sched: GPU scheduler for this xe_exec_queue */ struct xe_gpu_scheduler sched; /** @entity: Scheduler entity for this xe_exec_queue */ diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c index fb125f940de8..879a4474bf51 100644 --- a/drivers/gpu/drm/xe/xe_guc_submit.c +++ b/drivers/gpu/drm/xe/xe_guc_submit.c @@ -1291,7 +1291,11 @@ static void __guc_exec_queue_fini_async(struct work_struct *w) xe_sched_entity_fini(&ge->entity); xe_sched_fini(&ge->sched); - kfree(ge); + /* + * RCU free due sched being exported via DRM scheduler fences + * (timeline name). + */ + kfree_rcu(ge, rcu); xe_exec_queue_fini(q); xe_pm_runtime_put(guc_to_xe(guc)); } @@ -1474,6 +1478,7 @@ static int guc_exec_queue_init(struct xe_exec_queue *q) q->guc = ge; ge->q = q; + init_rcu_head(&ge->rcu); init_waitqueue_head(&ge->suspend_wait); for (i = 0; i < MAX_STATIC_MSG_TYPE; ++i) diff --git a/drivers/gpu/drm/xe/xe_hw_fence.c b/drivers/gpu/drm/xe/xe_hw_fence.c index 03eb8c6d1616..b2a0c46dfcd4 100644 --- a/drivers/gpu/drm/xe/xe_hw_fence.c +++ b/drivers/gpu/drm/xe/xe_hw_fence.c @@ -100,6 +100,9 @@ void xe_hw_fence_irq_finish(struct xe_hw_fence_irq *irq) spin_unlock_irqrestore(&irq->lock, flags); dma_fence_end_signalling(tmp); } + + /* Safe release of the irq->lock used in dma_fence_init. */ + synchronize_rcu(); } void xe_hw_fence_irq_run(struct xe_hw_fence_irq *irq)