From patchwork Tue Apr 29 05:49:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 886153 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7164D17C21B; Tue, 29 Apr 2025 05:49:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; cv=none; b=VXHh204bSpVEu9cQszb2i0h3+EsvC4TPGz6f637Efav6GwtEFROVhhhLiARDKMkeCFKIzCglAuKQV9/7G6OO1W8W17VeOrV98Ulf1+7qmhPJ37EJjhlb+V/LjzhjvXP8fXM2C1mpBH6CFQLWV86ya8DFBhsjySDMC5Y0G94qgw0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; c=relaxed/simple; bh=wTHla6lUkJhpBWGS88wEwpkLEaR75vDhNRcey4lS0wg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rkG5zIGeD/mVY99Wf2EjOyzDwlST/+rKYxQgkdq++nTQV7KeQmjLsO+Um9TOMSe+mya76D2A3Xi2P/FhpOCe6kIY29So5vV8a2YlqCXCzZvlMg5gZFS1waW1haOBDHFBSIE1s92wnn2DUN9W2/S1AUrak3SQCFKGtfPb1XXyDQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=m/7IowXR; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="m/7IowXR" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53SNrr8I014932; Tue, 29 Apr 2025 05:49:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=2mvYhY4cXE3 pGemUoOJ2q++sYW/b2dkSXtsse3LCD7U=; b=m/7IowXR4Fir/Uk2yXXGI+5xT0/ RDxYbIcXKtGwT0xPBHl7+Qvno3vcipleDmpYIkldZGVe38SzFhDo2U3hvfTSjCdd tAhzukSS1gVBE180zmBNgLjBVst+nN32aImPP0ciSarv1TJBJ3vn82nEY2GgMC5g KsjMCOOlweBZ6UjBkemvVhIzzPPOG4nCFF5IfU7LZVuedzwShIOPWZHWxNltwGfj o53R1nBUXqrZFzu5ewId0fQ8N/YPbtzzmjnZVsxvpkCy9ZwdJWOD1eQCZkhzz4zM jJwswQH2q8Xg1S5XKu2L/XKONXMnwF1rrL5XIjFvSMrRhSSaB9Qv+/gxDVA== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 468rnn29ty-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:15 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 53T5nChs030270; Tue, 29 Apr 2025 05:49:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 468rjmfqun-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:12 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 53T5nBt0030234; Tue, 29 Apr 2025 05:49:11 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 53T5nBs9030226 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:11 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id 9F2EB50C; Tue, 29 Apr 2025 11:19:10 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, kernel@oss.qualcomm.com, Wasim Nazir Subject: [PATCH v6 1/4] dt-bindings: arm: qcom: Add bindings for QCS9075 SOC based board Date: Tue, 29 Apr 2025 11:19:01 +0530 Message-ID: <20250429054906.113317-2-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250429054906.113317-1-quic_wasimn@quicinc.com> References: <20250429054906.113317-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: chqzamUCceNv8Nk5GfBMlkENHwd32MCB X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI5MDA0MiBTYWx0ZWRfXwAefaWZ0jlqe 4L3qYpANnarr3/q4GnGuiILDV5asdtM+lyNYb/4bgiGa/c7oAUOsDSOlFx+2L/yymZN+6Ak9i09 GtuiW9ZFesV6aOETFFN9nIs6Haco/2RAWDOHcdN+SUtp2hItX0TQJO3+Al/PcrLj+QeZ4LOXeEc OC7ngxHHkWiKcV2NsJA/0gQ74tjKfzq2C1F9Wt7R3EVZvvJ3oXt9CoBEjvhinUrYKOgD6+vNeU6 uGU668mcWBOvXE3Z9PFpnsL2OgrewSRv3yk2Up4qWgvo32YGPWg5PmYQoQpC/+viwyZp+lL5ukk Wge0JtaeKgoqWpmOzwTPuyIyOTQWNFXidEn/i8dMMy+w/oifNGvgvjaLpPD/NrHOhfe4tgNwwDD HX26fzxZoyYmCa0PpdNxxwTpjqxTsv5IicQA1YpcBg5qwisCOXyTk0o0rksrdhMjYoU40q8f X-Proofpoint-GUID: chqzamUCceNv8Nk5GfBMlkENHwd32MCB X-Authority-Analysis: v=2.4 cv=V9990fni c=1 sm=1 tr=0 ts=6810685b cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=GSGDit3c0nHYkW1XmsAA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-29_01,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 adultscore=0 mlxlogscore=999 impostorscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 phishscore=0 mlxscore=0 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504290042 QCS9075 is compatible Industrial-IOT grade variant of SA8775p SOC. Unlike QCS9100, it doesn't have safety monitoring feature of Safety-Island(SAIL) subsystem, which affects thermal management. QCS9075M SOM is based on QCS9075 SOC and also it has PMICs, DDR along with memory-map updates. qcs9075-iq-9075-evk board is based on QCS9075M SOM. Signed-off-by: Wasim Nazir --- Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.49.0 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 08c329b1e919..713d7b471883 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -58,6 +58,7 @@ description: | qcs8550 qcm2290 qcm6490 + qcs9075 qcs9100 qdu1000 qrb2210 @@ -960,6 +961,13 @@ properties: - qcom,sa8775p-ride-r3 - const: qcom,sa8775p + - items: + - enum: + - qcom,qcs9075-iq-9075-evk + - const: qcom,qcs9075-som + - const: qcom,qcs9075 + - const: qcom,sa8775p + - items: - enum: - qcom,qcs9100-ride From patchwork Tue Apr 29 05:49:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 885809 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98B4B224234; Tue, 29 Apr 2025 05:49:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905761; cv=none; b=FDDXf2QyMOYMxvuckjVaw/AREF0Fbu/g0bQNYm+YH0b4oXa/2LT/aPh1st3TOlq5RGFV9mwpt4wwS+YH2BPd0BGfvOoKWQ85hLlMK55/Pmy/Hz7CRQ52Tp1QHRsttwiKCln1nJcWIbUujBdWeVWlFf+drYSnxebe1lZDXFRI7ns= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905761; c=relaxed/simple; bh=SswjTdVKRZs/uqbLCZQWHPmidH+Str/D1eRC+QCmXng=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sP/Sq+/sohbfjBM76qZZe42yVoqWjXszhwzFuO1NOqEjVO+3GwhprfDiipOjDQCrIC3ZhQPQVQ5o13BMlF7bu3KICVo48/pPbgMOYUlI5+sBJOESzANN8hRlXy8Ezf88wkNJIbGYt7eLt5m8tsDVKNNkKJV2kyeZ5jgbOvzDE8A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=hF8Z2geO; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="hF8Z2geO" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53SNq4Ta006066; Tue, 29 Apr 2025 05:49:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=aKl+A/8W90P KmDu+S/PyuZNxJRiWYney4ecXPD5+XhA=; b=hF8Z2geOSIZ+2fA+qS5jj6xXgio GExTSB0T0eA3Nlq9HSB+6yO+y9jTWmiqjQ8OLuljjaC+DcH14A6XPY6jd9l167pD LcFUyGPmSvlGvK8oLdoQ/hU6wCxaKUotE5WxV9yTTwxQkBEG2SYzW2kglWqvES3g 1rpfxrza2xeUl0CqWeKgOq9NpbajH7CXycSvGa1MD8kmhDy5MbloCytwKIMq0fvC +cgFIGVe2cbFSkKANczn+Lx57k6eHfUYpp/Zz/kp9y2Wc7QkEAKpA0kgLUFAcjdD lsl6nrltUGNN6T9g1+gGMc8JHlDVcukYvrU9xU0ducDHpOaDwc+jO+H8Dhg== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 468ptmkcgm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:15 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 53T5nC1G030271; Tue, 29 Apr 2025 05:49:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 468rjmfquq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:12 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 53T5nBuB030233; Tue, 29 Apr 2025 05:49:11 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 53T5nBTd030224 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:11 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id A23EE5AE; Tue, 29 Apr 2025 11:19:10 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, kernel@oss.qualcomm.com, Pratyush Brahma , Prakash Gupta , Wasim Nazir Subject: [PATCH v6 2/4] arm64: dts: qcom: iq9: Introduce new memory map for qcs9100/qcs9075 Date: Tue, 29 Apr 2025 11:19:02 +0530 Message-ID: <20250429054906.113317-3-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250429054906.113317-1-quic_wasimn@quicinc.com> References: <20250429054906.113317-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: GFVZX4N0say1WpJapm0XIADSzdWuEhex X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI5MDA0MiBTYWx0ZWRfXzdjadg55Emcn R5/oP2sAtNrk4TGQyY3mpnNYu7fFTivAMr39Y7jCQUmnazG9AzOXVaGk5qe1VBEyuoX64kXq75J 8rxUvYs3bl+gGXPZ/7aspO9W6g/6k1+1JJbnWj5PejcgEO06b9kj86txu6X0eEaH+2oiNbpqqQO 0oH7Y8n2LgvvTYMojEYDXRgYsxZU56324NMyMYF2RQIlUFKT8r7AZHTg2t59ZNqfMdTrzp1Oq3C 2HAiHbp8P5QHX+/qiQn5+L8yV70+2K7unVsKVV2RPSuEXvR+1OAl23A74Yk7fGL7b7K6oDh+xsp tS+Gzjmf4eLiTOd4AQEHIM2wAguK3bMuUtj/uIDuBnkQXTuGAOkmVDj3rLjMiO4PL1eXVgEpsSW KsJP7WbsgV83sHxJFR0F/z+XpQKOqm4m4o/iwBBbqh/zyTKPW3wTJL6C10zuH8K9chWPD+5j X-Proofpoint-GUID: GFVZX4N0say1WpJapm0XIADSzdWuEhex X-Authority-Analysis: v=2.4 cv=DKWP4zNb c=1 sm=1 tr=0 ts=6810685b cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=6-hPHUfSg4vTJukFU5oA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-29_01,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 clxscore=1015 priorityscore=1501 impostorscore=0 mlxscore=0 bulkscore=0 malwarescore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504290042 From: Pratyush Brahma SA8775P has a memory map which caters to the auto specific requirements. QCS9100 & QCS9075 are its IOT variants (with marketing name as IQ9) which inherit the memory map of SA8775P require a slightly different memory map as compared to SA8775P auto parts. This new memory map is applicable for all the IoT boards which inherit the initial SA8775P memory map. This is not applicable for non-IoT boards. Some new carveouts (viz. gunyah_md and a few pil dtb carveouts) have been introduced as part of firmware updates for IoT. The size and base address have been updated for video PIL carveout compared to SA8775P since it is being brought up for the first time on IoT boards. The base addresses of the rest of the PIL carveouts have been updated to accommodate the change in size of video since PIL regions are relocatable and their functionality is not impacted due to this change. The size of trusted apps carveout has also been reduced since it is sufficient to meet IoT requirements. Also, audio_mdf_mem & tz_ffi_mem carveout and its corresponding scm reference has been removed as these are not required for IoT parts. Incorporate these changes in the updated memory map. Signed-off-by: Pratyush Brahma Signed-off-by: Prakash Gupta Signed-off-by: Wasim Nazir --- .../boot/dts/qcom/iq9-reserved-memory.dtsi | 108 ++++++++++++++++++ 1 file changed, 108 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi -- 2.49.0 diff --git a/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi new file mode 100644 index 000000000000..d5fb608b9462 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/delete-node/ &pil_adsp_mem; +/delete-node/ &pil_gdsp0_mem; +/delete-node/ &pil_gdsp1_mem; +/delete-node/ &pil_cdsp0_mem; +/delete-node/ &pil_gpu_mem; +/delete-node/ &pil_cdsp1_mem; +/delete-node/ &pil_cvp_mem; +/delete-node/ &pil_video_mem; +/delete-node/ &audio_mdf_mem; +/delete-node/ &trusted_apps_mem; +/delete-node/ &hyptz_reserved_mem; +/delete-node/ &tz_ffi_mem; + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gunyah_md_mem: gunyah-md@91a80000 { + reg = <0x0 0x91a80000 0x0 0x80000>; + no-map; + }; + + pil_adsp_mem: pil-adsp@95900000 { + reg = <0x0 0x95900000 0x0 0x1e00000>; + no-map; + }; + + q6_adsp_dtb_mem: q6-adsp-dtb@97700000 { + reg = <0x0 0x97700000 0x0 0x80000>; + no-map; + }; + + q6_gdsp0_dtb_mem: q6-gdsp0-dtb@97780000 { + reg = <0x0 0x97780000 0x0 0x80000>; + no-map; + }; + + pil_gdsp0_mem: pil-gdsp0@97800000 { + reg = <0x0 0x97800000 0x0 0x1e00000>; + no-map; + }; + + pil_gdsp1_mem: pil-gdsp1@99600000 { + reg = <0x0 0x99600000 0x0 0x1e00000>; + no-map; + }; + + q6_gdsp1_dtb_mem: q6-gdsp1-dtb@9b400000 { + reg = <0x0 0x9b400000 0x0 0x80000>; + no-map; + }; + + q6_cdsp0_dtb_mem: q6-cdsp0-dtb@9b480000 { + reg = <0x0 0x9b480000 0x0 0x80000>; + no-map; + }; + + pil_cdsp0_mem: pil-cdsp0@9b500000 { + reg = <0x0 0x9b500000 0x0 0x1e00000>; + no-map; + }; + + pil_gpu_mem: pil-gpu@9d300000 { + reg = <0x0 0x9d300000 0x0 0x2000>; + no-map; + }; + + q6_cdsp1_dtb_mem: q6-cdsp1-dtb@9d380000 { + reg = <0x0 0x9d380000 0x0 0x80000>; + no-map; + }; + + pil_cdsp1_mem: pil-cdsp1@9d400000 { + reg = <0x0 0x9d400000 0x0 0x1e00000>; + no-map; + }; + + pil_cvp_mem: pil-cvp@9f200000 { + reg = <0x0 0x9f200000 0x0 0x700000>; + no-map; + }; + + pil_video_mem: pil-video@9f900000 { + reg = <0x0 0x9f900000 0x0 0x1000000>; + no-map; + }; + + trusted_apps_mem: trusted-apps@d1900000 { + reg = <0x0 0xd1900000 0x0 0x1c00000>; + no-map; + }; + }; + + firmware { + scm { + /delete-property/ memory-region; + }; + }; +}; + From patchwork Tue Apr 29 05:49:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 885810 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E177520C488; Tue, 29 Apr 2025 05:49:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; cv=none; b=GPgk7RcslaWr7e4V/DuSZCTv2fyyd8EfzymxTUKXsOzBsDMU6nVXeu6wXjicFBPCCazO19h5sftEtFVm9X5drZVOM1XyWkNsNXCrvPHIj8lQ5INfeoIwp/iBoQspPB1k00ueht2RNcMaOl1SgWZZKKKhemypgJj+bzAVDaUSwB0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; c=relaxed/simple; bh=shSs3GrIhAh52LOXxB6T6NNrgfqY5gq6SHH9xWcHRHw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KgbyoeCWBzA1FeM9n3JP0j5FH/P74nQL+icBWHr0zb0H59Hc5nnoIIAKXgsBvBS35UAs9pWdqre4/l4OAp3hyZWeBOlw0SOHaP6OZvjT7Jr3TJ7PM8nHZKiJ0yLaIWuOQApy17hG2GmghjKaYp1SXyic7ku5vCrsNwltXkGL8ZQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=oKQF+1tL; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="oKQF+1tL" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53SNqQQk001925; Tue, 29 Apr 2025 05:49:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=shSs3GrIhAh 52LOXxB6T6NNrgfqY5gq6SHH9xWcHRHw=; b=oKQF+1tLNRnpCJfWDxQyrPl2oZ1 bkhkVxHnvYju4vm4R3HS5KjgbJ7QcNLYrc1tNwj+O2wdVPEU0o/xzcoow41T0/dl wIS0Q2u+ifLNsJY4qxoYRaZFUHh9SzlmsBBkXJqKg7/V1YHkr1zyOJ2FxN8VipnL MylPnVQC9rCSkpvd+VlSijLP+JIb1KqY7RsK7pEt2qpNJL2YAx3BUNBS9qdTERXW EDl/Z6PtbzNtUTsX4eOQMoK1N3s9KiWZxY+U5gsdMfIcOFl3gcbO2eYExsYsHZGl IzBa2Ui0gUq1CtwEbc1Z51tQoUfDYoaBn7s/tZBlobznOpapw31j5GXPL1w== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 468qq5jhbq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:15 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 53T5nCht030270; Tue, 29 Apr 2025 05:49:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 468rjmfqup-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:12 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 53T5nB72030236; Tue, 29 Apr 2025 05:49:11 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 53T5nBBp030225 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:11 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id A63625AF; Tue, 29 Apr 2025 11:19:10 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, kernel@oss.qualcomm.com, Wasim Nazir Subject: [PATCH v6 3/4] arm64: dts: qcom: qcs9075: Introduce QCS9075M SOM Date: Tue, 29 Apr 2025 11:19:03 +0530 Message-ID: <20250429054906.113317-4-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250429054906.113317-1-quic_wasimn@quicinc.com> References: <20250429054906.113317-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: P1uca9_zonl3PPFElk0jG6Ek6VjW8LU- X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI5MDA0MiBTYWx0ZWRfX4Kq9feizszMs 84wMcC7/UevHujQ0sFI2OjPY5oh0nk3mqKKKjivoNe4ybEDBQtGU5wvhB/S8977qij40X33s8YI 3M5D1FZpmUsHf8al/CD8YnSW4jtlaWALqexfs/rLU9invWRQJ8VkUTL5bxyBOBF89x6JL/tLFhc LjlK+rx16/HXKYqHgrssYRIocqxeS+n3lmNDk8MlHn3d/VEgojX9y9BM8A8i0ThRCHK913uGnbN bYKYL4wc9NdzcZiKH4xIoNnQF1xvngAoAA+NI8bn2Cs83cXo/1t2JXsEHsUgbi59RPSZw+SdPIR iC1CnaoCAIlbT5yCdLaCI2+8D8zkDMkQ5kS+WkQBw1CuPRRi6UrEQvrPuLcYNaHp5Q+pbqi3EM0 gRws8P19fbK2ZEq18iFaQJVDkDF97JGi/hpl/gUmdULI5gxiAuXREA4yJxcM9VL/9GvrzflU X-Authority-Analysis: v=2.4 cv=QP1oRhLL c=1 sm=1 tr=0 ts=6810685b cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=wRu9zdmjipw6Plw-N58A:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: P1uca9_zonl3PPFElk0jG6Ek6VjW8LU- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-29_01,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=782 lowpriorityscore=0 adultscore=3 mlxscore=0 bulkscore=0 phishscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504290042 QCS9075 is an IoT variant of SA8775P SOC, most notably without safety monitoring feature of Safety Island(SAIL) subsystem. qcs9075-som.dtsi specifies QCS9075 based SOM having SOC, PMICs, Memory-map updates. qcs9075-iq-9075-evk board is based on QCS9075M SOM. Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/qcs9075-som.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-som.dtsi -- 2.49.0 diff --git a/arch/arm64/boot/dts/qcom/qcs9075-som.dtsi b/arch/arm64/boot/dts/qcom/qcs9075-som.dtsi new file mode 100644 index 000000000000..552e40c95e06 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-som.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "sa8775p.dtsi" +#include "iq9-reserved-memory.dtsi" +#include "sa8775p-pmics.dtsi" From patchwork Tue Apr 29 05:49:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wasim Nazir X-Patchwork-Id: 886152 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E17161922F4; Tue, 29 Apr 2025 05:49:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; cv=none; b=pE6BDySYdKqBtoSuSE+hGPWMlckOAldxUbD7yYXs1mcyjAVInMavv069hhm2vj57HopPQC94qXrBzTiK1GRYfIogwxktgrOl9m98BRNKhiZK6VS4c/wIVxVfWOTKW03HugFEuwGN+f/P+eSO3qXELDQfBTRw4gcy75s4hZ7i7pc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745905760; c=relaxed/simple; bh=ctOWVregGwEG4Mr056ZykboOVNc8RTcPDJiJth048sw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mq7g7BCkz9Q0WDDDRD38wPh7WiRHRnSesZHDpSwIK541NIqskQjk1AA6EcflzbH4Q+kyHuZeEikHmpMXs7AWJzkGhT5QrKBa4j/7Qwo/J3NYEKdXOZR4YXCvss2c4E2fCvw0aUU0PqZJHYhNvt/sDKX8zdPvpRKdIFQf4Gp5h9Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=qualcomm.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=lSXpUzt+; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="lSXpUzt+" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 53SNq2XJ017905; Tue, 29 Apr 2025 05:49:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=fGQo1quZIhA 7GfvlHJm12SrM4bocVnva+SPNWRF5I9g=; b=lSXpUzt+6vGUWJnAb2Kxzh15WNd X5C5RlNyxxp48LUas2HeCom1k3MefPr0ZAlAzbsP1qV63LD9m6RQN0UttnSBWZw5 GwnZnyG020C0MbKo6PgiJOcHTlOcRx2eCo7yYsENtf/6uFNjKe84xyqqHFP4XhRc J5gwm62DyC4i/1E/GY/j1AZZVr+EXsAMOyIQEntjP9YeJHIcFza5v9AFuu3ha9sy 0+8vVr6byxdwDlDOkfpqJ3sWi4DPWFjyzfLANZ0yGpyLJmBaGAnZXXy/x5h5pXZ0 RFWyCLBylEqhIetyCnf/vSLmjlVInQfCfMIwtNhKhPq7qVxCqY7URTtipkQ== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 468qq5jhbp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:15 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 53T5nCBK030272; Tue, 29 Apr 2025 05:49:12 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 468rjmfqur-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:12 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 53T5nBDD030235; Tue, 29 Apr 2025 05:49:11 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-wasimn-hyd.qualcomm.com [10.147.246.180]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTPS id 53T5nBJR030227 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 29 Apr 2025 05:49:11 +0000 Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3944840) id AA4CC5B0; Tue, 29 Apr 2025 11:19:10 +0530 (+0530) From: Wasim Nazir To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com, kernel@oss.qualcomm.com, Wasim Nazir Subject: [PATCH v6 4/4] arm64: dts: qcom: Add support for qcs9075 IQ-9075-EVK Date: Tue, 29 Apr 2025 11:19:04 +0530 Message-ID: <20250429054906.113317-5-quic_wasimn@quicinc.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250429054906.113317-1-quic_wasimn@quicinc.com> References: <20250429054906.113317-1-quic_wasimn@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zqReqXxeHOJSD_l2H3-WH0XSiVLmfgjx X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI5MDA0MiBTYWx0ZWRfX0IYgi2pjTP/F /kqdzn9kPLTGncpCorxO+ZY6GAL84JiiVstUErQLUVkOj26wt/z5b0HE3adg7AtVxMl1+0m4faG Av7uCJ7u8Q/a+xhV1cCOCiEk2piInxDeiR/H+5m69ePklnRRGz/tzM9VAlRHAj1bawILBT3bszd 5e3nQ1fGQ6Sa920GvxOLLl6+vDhDAXL0BZIQtGsraKki1c7Vv1ImOMv+oaih5mV+RAVvTDVuXlE F/RBB65bZWciRBY8P94/xLAX3q5/NadjTowJ5ZwNVbrAYgoaaJxnw53an/PpUg2Guucv9Txju5X bRGjRdyYQHj0N03MdGTWNXYj82CQwymvmwl+6Gp1pEKnDabZ4ypPUqpgwgLxKqV2nDEnKAyXIzP z0dWQDNZttD29kkWSF9XfrxSYduFXl7N2FF0/RuNxykoSond+S1XAmZypH//gHKSEZNXvNoa X-Authority-Analysis: v=2.4 cv=QP1oRhLL c=1 sm=1 tr=0 ts=6810685b cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=ctKxQ8g-j2yoPrACdqAA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-GUID: zqReqXxeHOJSD_l2H3-WH0XSiVLmfgjx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-29_01,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 lowpriorityscore=0 adultscore=0 mlxscore=0 bulkscore=0 phishscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504290042 Add initial device tree support for IQ-9075-EVK board, based on Qualcomm's QCS9075M SOM. QCS9075M SOM is based on QCS9075 SOC. Basic changes are supported for boot to shell. Signed-off-by: Wasim Nazir --- arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/qcs9075-iq-9075-evk.dts | 268 ++++++++++++++++++ 2 files changed, 269 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts -- 2.49.0 diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index adb4d026bcc4..6cca965d86e0 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -122,6 +122,7 @@ qcs6490-rb3gen2-vision-mezzanine-dtbs := qcs6490-rb3gen2.dtb qcs6490-rb3gen2-vis dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2-vision-mezzanine.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-iq-9075-evk.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts new file mode 100644 index 000000000000..eadc59739a4b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-iq-9075-evk.dts @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include +#include + +#include "qcs9075-som.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IQ 9075 EVK"; + compatible = "qcom,qcs9075-iq-9075-evk", "qcom,qcs9075-som", "qcom,qcs9075", "qcom,sa8775p"; + + aliases { + serial0 = &uart10; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_s4a: smps4 { + regulator-name = "vreg_s4a"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1816000>; + regulator-initial-mode = ; + }; + + vreg_s5a: smps5 { + regulator-name = "vreg_s5a"; + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1996000>; + regulator-initial-mode = ; + }; + + vreg_s9a: smps9 { + regulator-name = "vreg_s9a"; + regulator-min-microvolt = <535000>; + regulator-max-microvolt = <1120000>; + regulator-initial-mode = ; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <788000>; + regulator-max-microvolt = <1050000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <870000>; + regulator-max-microvolt = <970000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <720000>; + regulator-max-microvolt = <950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3544000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <1140000>; + regulator-max-microvolt = <1260000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1100000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l3c: ldo3 { + regulator-name = "vreg_l3c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l5c: ldo5 { + regulator-name = "vreg_l5c"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l6c: ldo6 { + regulator-name = "vreg_l6c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <1980000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1620000>; + regulator-max-microvolt = <2000000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <2700000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; + + regulators-2 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "e"; + + vreg_s4e: smps4 { + regulator-name = "vreg_s4e"; + regulator-min-microvolt = <970000>; + regulator-max-microvolt = <1520000>; + regulator-initial-mode = ; + }; + + vreg_s7e: smps7 { + regulator-name = "vreg_s7e"; + regulator-min-microvolt = <1010000>; + regulator-max-microvolt = <1170000>; + regulator-initial-mode = ; + }; + + vreg_s9e: smps9 { + regulator-name = "vreg_s9e"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <570000>; + regulator-initial-mode = ; + }; + + vreg_l6e: ldo6 { + regulator-name = "vreg_l6e"; + regulator-min-microvolt = <1280000>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + + vreg_l8e: ldo8 { + regulator-name = "vreg_l8e"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1950000>; + regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = ; + }; + }; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32768>; +}; + +&tlmm { + qup_uart10_default: qup-uart10-state { + pins = "gpio46", "gpio47"; + function = "qup1_se3"; + }; +}; + +&uart10 { + compatible = "qcom,geni-debug-uart"; + pinctrl-0 = <&qup_uart10_default>; + pinctrl-names = "default"; + status = "okay"; +}; + +&xo_board_clk { + clock-frequency = <38400000>; +};