From patchwork Wed Apr 16 13:43:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 881772 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A0D71FF1DA; Wed, 16 Apr 2025 13:44:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744811062; cv=none; b=TKnhdA27/NP2nvjXJLGa7IQxWiq88RWMDDdhPL0Bbg08I8tqOLKKyKiT1VG+kJFoSMWzn5hjRu21yGQvjbs4R6TtMlEdPhEmLy8qQOYDSnbd7cI7mBvpVMzuGlGMoWTytJ0kfO/RwZDcrFPnPW0DjElBP7BAR+4XvtzkzIFIwxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744811062; c=relaxed/simple; bh=llhbpgSWI+xUYrKnvFoHYfdLjRKqCYZ9cBfBE8mukT0=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=okG/I0GMpmxyuI2GWY9zoG0+9AqbZxDp7aCNlesd4JWWxw6iOU4870fY9UBTBJgaPFwtFHtNvqfT0vyO1d45ON8SgQX/I29MbnzddDisvsh8D40BekzwM2O6k1iA2l0zWTTyC03OU1nUskam3t6huZc9zV8i+l75GbqQrHyb8AE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gMUIM62A; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gMUIM62A" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8BA0C4CEE2; Wed, 16 Apr 2025 13:44:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1744811062; bh=llhbpgSWI+xUYrKnvFoHYfdLjRKqCYZ9cBfBE8mukT0=; h=From:To:Cc:Subject:Date:From; b=gMUIM62A5bs+x1Dbr4SWdFRhY4UZhj4cMJ66VmYwEwz54JfQLupunypzlLoiXkd4Y wpLrZFELfnikVzkZLQBb8/HEqXNY+0zjqKKdgO9NdfV6hSWsuOc4G58eBUpgW6JJcL jVwkzlzTnTNuxANTaLnKWusVkdPNUJMMwvnuRE0m0fsG7gNeUcYh6Fxc6scfKN90eK 67JIpcuOiKQJJ3sHLxjATo4QYwECjDBH1AghIKfa6JgsRkaXj1znUfcCyrKojnAgMU 09N5lv/a2uSnWQbRQ1QR4Jfzbw81ipsX+DXq9R+inHk5QunQfFcxRD1fpiewN2GBTe EWmdk8w2qX8Zw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1u533r-000000001zg-45M3; Wed, 16 Apr 2025 15:44:20 +0200 From: Johan Hovold To: "Rafael J. Wysocki" , Viresh Kumar Cc: "Rob Herring (Arm)" , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH] cpufreq: fix compile-test defaults Date: Wed, 16 Apr 2025 15:43:31 +0200 Message-ID: <20250416134331.7604-1-johan+linaro@kernel.org> X-Mailer: git-send-email 2.49.0 Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Commit 3f66425a4fc8 ("cpufreq: Enable COMPILE_TEST on Arm drivers") enabled compile testing of most Arm CPUFreq drivers but left the existing default values unchanged so that many drivers are enabled by default whenever COMPILE_TEST is selected. This specifically results in the S3C64XX CPUFreq driver being enabled and initialised during boot of non-S3C64XX platforms with the following error logged: cpufreq: Unable to obtain ARMCLK: -2 Fix the default values for drivers that can be compile tested and that should be enabled by default when not compile testing. Fixes: 3f66425a4fc8 ("cpufreq: Enable COMPILE_TEST on Arm drivers") Cc: stable@vger.kernel.org # 6.12 Cc: Rob Herring (Arm) Signed-off-by: Johan Hovold --- drivers/cpufreq/Kconfig.arm | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index 4f9cb943d945..0d46402e3094 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -76,7 +76,7 @@ config ARM_VEXPRESS_SPC_CPUFREQ config ARM_BRCMSTB_AVS_CPUFREQ tristate "Broadcom STB AVS CPUfreq driver" depends on (ARCH_BRCMSTB && !ARM_SCMI_CPUFREQ) || COMPILE_TEST - default y + default y if ARCH_BRCMSTB && !ARM_SCMI_CPUFREQ help Some Broadcom STB SoCs use a co-processor running proprietary firmware ("AVS") to handle voltage and frequency scaling. This driver provides @@ -88,7 +88,7 @@ config ARM_HIGHBANK_CPUFREQ tristate "Calxeda Highbank-based" depends on ARCH_HIGHBANK || COMPILE_TEST depends on CPUFREQ_DT && REGULATOR && PL320_MBOX - default m + default m if ARCH_HIGHBANK help This adds the CPUFreq driver for Calxeda Highbank SoC based boards. @@ -133,7 +133,7 @@ config ARM_MEDIATEK_CPUFREQ config ARM_MEDIATEK_CPUFREQ_HW tristate "MediaTek CPUFreq HW driver" depends on ARCH_MEDIATEK || COMPILE_TEST - default m + default m if ARCH_MEDIATEK help Support for the CPUFreq HW driver. Some MediaTek chipsets have a HW engine to offload the steps @@ -181,7 +181,7 @@ config ARM_RASPBERRYPI_CPUFREQ config ARM_S3C64XX_CPUFREQ bool "Samsung S3C64XX" depends on CPU_S3C6410 || COMPILE_TEST - default y + default CPU_S3C6410 help This adds the CPUFreq driver for Samsung S3C6410 SoC. @@ -190,7 +190,7 @@ config ARM_S3C64XX_CPUFREQ config ARM_S5PV210_CPUFREQ bool "Samsung S5PV210 and S5PC110" depends on CPU_S5PV210 || COMPILE_TEST - default y + default CPU_S5PV210 help This adds the CPUFreq driver for Samsung S5PV210 and S5PC110 SoCs. @@ -214,7 +214,7 @@ config ARM_SCMI_CPUFREQ config ARM_SPEAR_CPUFREQ bool "SPEAr CPUFreq support" depends on PLAT_SPEAR || COMPILE_TEST - default y + default PLAT_SPEAR help This adds the CPUFreq driver support for SPEAr SOCs. @@ -233,7 +233,7 @@ config ARM_TEGRA20_CPUFREQ tristate "Tegra20/30 CPUFreq support" depends on ARCH_TEGRA || COMPILE_TEST depends on CPUFREQ_DT - default y + default ARCH_TEGRA help This adds the CPUFreq driver support for Tegra20/30 SOCs. @@ -241,7 +241,7 @@ config ARM_TEGRA124_CPUFREQ bool "Tegra124 CPUFreq support" depends on ARCH_TEGRA || COMPILE_TEST depends on CPUFREQ_DT - default y + default ARCH_TEGRA help This adds the CPUFreq driver support for Tegra124 SOCs. @@ -256,14 +256,14 @@ config ARM_TEGRA194_CPUFREQ tristate "Tegra194 CPUFreq support" depends on ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC || (64BIT && COMPILE_TEST) depends on TEGRA_BPMP - default y + default ARCH_TEGRA_194_SOC || ARCH_TEGRA_234_SOC help This adds CPU frequency driver support for Tegra194 SOCs. config ARM_TI_CPUFREQ bool "Texas Instruments CPUFreq support" depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST - default y + default ARCH_OMAP2PLUS || ARCH_K3 help This driver enables valid OPPs on the running platform based on values contained within the SoC in use. Enable this in order to