From patchwork Sun Apr 6 18:57:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878981 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65F4E1624F7 for ; Sun, 6 Apr 2025 18:58:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965905; cv=none; b=nz1OO+H41q8ucVJqMhYpFw5C3A3IRgTvqL9bjxOkwnKQ9QDnQyFawGPuXyneQ9EE8i4K07Ga7CX5FpSeThAX3a+Ec+2bVxmtIAz/j/RdtaKE2AvCkmF64UbzMb/P068VJHsZNhuZ9sO4DqFmIBpW33SrxmIHEA1kAT6apT1/b+E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965905; c=relaxed/simple; bh=dzAU8ZSgmVx7zBKYso3Uq7kjJjeeUuijfoYlmwJazAk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=JKPHc6Gez+TWqOXocMlsx6aIdPRXPY0vaMTHR6KoXZ9+4nThOVkaWobTztqt1L8CVhK7c9Y8tq5nWkTiqPu4MA58wtHYqhrxK09jhLde3P01rgbmuxtyhWahHj+MmxBPlaVW/DM1kN57ko0EkUIC52KupjAfdOawKbwP5muYChY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Q+qowhqB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Q+qowhqB" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5113FC4CEEA; Sun, 6 Apr 2025 18:58:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965905; bh=dzAU8ZSgmVx7zBKYso3Uq7kjJjeeUuijfoYlmwJazAk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=Q+qowhqBi4uHb59yfXbq/HzxiJPTPNWGpCFWca04WspgqFZmQM2HeRROMmpu6HMJA L0HKbC69Q/UVjwlbpw4AgBS5/55h/FTmQdDvdgNj4SybSSgBye04VGvCjG7JOXqV/Y CQqd89S9f/seZb8D9mEuhF/JXF/3HNiGC9G04bPUe/oXYuJyZ3iXqciGgcHsHWJV94 Fwb9/WfQwuuERXILr3NKBOvD4nUZwwB7u/1gS5NT3CGan7KhotncDDw9ypbMtulYwI CHhTdRJjHwlV+CEHoB34fBfDY9Nm8Bl7Z0r399UahKbrbQMJ0qhVaQYbSvGKxAeWsd j9bKh1VYNmJZQ== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown , Artem Bityutskiy Subject: [PATCH 01/10] tools/power turbostat: Clustered Uncore MHz counters should honor show/hide options Date: Sun, 6 Apr 2025 14:57:10 -0400 Message-ID: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250406185820.765991-1-lenb@kernel.org> References: <20250406185820.765991-1-lenb@kernel.org> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown The clustered uncore frequency counters, UMHz*.* should honor the --show and --hide options. All non-specified counters should be implicityly hidden. But when --show was used, UMHz*.* showed up anyway: $ sudo turbostat -q -S --show Busy% Busy%  UMHz0.0  UMHz1.0  UMHz2.0  UMHz3.0  UMHz4.0 Indeed, there was no string that can be used to explicitly show or hide clustered uncore counters. Even through they are dynamically probed and added, group the clustered UMHz*.* counters with the legacy built-in-counter "UncMHz" for show/hide. turbostat --show Busy% does not show UMHz*.*. turbostat --show UncMHz shows either UncMHz or UMHz*.*, if present turbostat --hide UncMHz hides either UncMHz or UMHz*.*, if present Reported-by: Artem Bityutskiy Signed-off-by: Len Brown Tested-by: Artem Bityutskiy --- tools/power/x86/turbostat/turbostat.8 | 1 + tools/power/x86/turbostat/turbostat.c | 13 ++++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index 99bf905ade81..ed258f248152 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -199,6 +199,7 @@ The system configuration dump (if --quiet is not used) is followed by statistics \fBUncMHz\fP per-package uncore MHz, instantaneous sample. .PP \fBUMHz1.0\fP per-package uncore MHz for domain=1 and fabric_cluster=0, instantaneous sample. System summary is the average of all packages. +For the "--show" and "--hide" options, use "UncMHz" to operate on all UMHz*.* as a group. .SH TOO MUCH INFORMATION EXAMPLE By default, turbostat dumps all possible information -- a system configuration header, followed by columns for all counters. This is ideal for remote debugging, use the "--out" option to save everything to a text file, and get that file to the expert helping you debug. diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 8d5011a0bf60..5eef95956c2f 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -6703,7 +6703,18 @@ static void probe_intel_uncore_frequency_cluster(void) sprintf(path, "%s/current_freq_khz", path_base); sprintf(name_buf, "UMHz%d.%d", domain_id, cluster_id); - add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0, package_id); + /* + * Once add_couter() is called, that counter is always read + * and reported -- So it is effectively (enabled & present). + * Only call add_counter() here if legacy BIC_UNCORE_MHZ (UncMHz) + * is (enabled). Since we are in this routine, we + * know we will not probe and set (present) the legacy counter. + * + * This allows "--show/--hide UncMHz" to be effective for + * the clustered MHz counters, as a group. + */ + if BIC_IS_ENABLED(BIC_UNCORE_MHZ) + add_counter(0, path, name_buf, 0, SCOPE_PACKAGE, COUNTER_K2M, FORMAT_AVERAGE, 0, package_id); if (quiet) continue; From patchwork Sun Apr 6 18:57:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878688 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A477B1A3035 for ; Sun, 6 Apr 2025 18:58:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965906; cv=none; b=dyqXWIZ29mQqPQhNFvEd6Cv1WgWjom9mLlTrhDAbpYIBI6sp0W1D7adt2+CAQlykVRMm6Pocnxq33AnoRbv65O4WTk1g1cxuH77pW6Z15NvPtsjggtMW/3rMaQ4QOr1lG/RA2zCwIx0dm3viBZaDBfrtNpR473uy3Kb2IehY6gc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965906; c=relaxed/simple; bh=xC+50Bwa9nQ8jnzIJOkSmSePr2jjZfw86Dl/KsSW67E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sP6ei4IYFW+5L5ziWkGffH7Qdy2okGfpqNWwj1+QyeY1E1Zwqxm/NWaNsOvPTRGfCZs4N8uMi8Qpk6IwvFV8NSk+ZGbgTPwYiAv9rn4fsTrMKRNUO/tXq2mSDbesHRGtae0R/A7FQ5D5aUSWA8JpTX5sBs5ncs2+rbE8G1DWPH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PqASQ9SQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PqASQ9SQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 96DF9C4CEE3; Sun, 6 Apr 2025 18:58:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965906; bh=xC+50Bwa9nQ8jnzIJOkSmSePr2jjZfw86Dl/KsSW67E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=PqASQ9SQ5btxrbBIfGg+0BTmPbPy3c0v+iDNExaD20JoBUfIFbZnYPE5I9gegNqZk zJF3ypBr1aozrtHyeKKN37YwhQT9B1piIy4xX+EzPE6f2rTrfykqjL3YM+Mr5enk7E ozCU8y/ToWsfkDaHMr70l2YZY4TwISHmkZLVyuhG288FF2OjTFu53SXVRC1JBi7LLM WQ9ZcI2hIakwC1jr2UrmYJHRkkKafaPU6WXdoazjMeO3e2FfUSiVqtkLjQpRR80/rN w7iCzP5arJ5lJhhT2iq5f4+9F4VazwseIFd9uXEO3a+fToWKg8woJT4cnqOwRsV3kj cdz9HIhhXN5ww== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Artem Bityutskiy , Len Brown Subject: [PATCH 02/10] tools/power turbostat: Allow Zero return value for some RAPL registers Date: Sun, 6 Apr 2025 14:57:11 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui turbostat aborted with below messages on a dual-package system, turbostat: turbostat.c:3744: rapl_counter_accumulate: Assertion `dst->unit == src->unit' failed. Aborted This is because 1. the MSR_DRAM_PERF_STATUS returns Zero for one package, and non-Zero for another package 2. probe_msr() treats Zero return value as a failure so this feature is enabled on one package, and disabled for another package. 3. turbostat aborts because the feature is invalid on some package Unlike the RAPL energy counter registers, MSR_DRAM_PERF_STATUS can return Zero value, and this should not be treated as a failure. Fix the problem by allowing Zero return value for RAPL registers other than the energy counters. Fixes: 7c6fee25bdf5 ("tools/power turbostat: Check for non-zero value when MSR probing") Reported-by: Artem Bityutskiy Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 5eef95956c2f..d26008f37a2c 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -2211,7 +2211,7 @@ int get_msr(int cpu, off_t offset, unsigned long long *msr) return 0; } -int probe_msr(int cpu, off_t offset) +int probe_rapl_msr(int cpu, off_t offset, int index) { ssize_t retval; unsigned long long value; @@ -2220,13 +2220,22 @@ int probe_msr(int cpu, off_t offset) retval = pread(get_msr_fd(cpu), &value, sizeof(value), offset); - /* - * Expect MSRs to accumulate some non-zero value since the system was powered on. - * Treat zero as a read failure. - */ - if (retval != sizeof(value) || value == 0) + /* if the read failed, the probe fails */ + if (retval != sizeof(value)) return 1; + /* If an Energy Status Counter MSR returns 0, the probe fails */ + switch (index) { + case RAPL_RCI_INDEX_ENERGY_PKG: + case RAPL_RCI_INDEX_ENERGY_CORES: + case RAPL_RCI_INDEX_DRAM: + case RAPL_RCI_INDEX_GFX: + case RAPL_RCI_INDEX_ENERGY_PLATFORM: + if (value == 0) + return 1; + } + + /* PKG,DRAM_PERF_STATUS MSRs, can return any value */ return 0; } @@ -7907,7 +7916,7 @@ void rapl_perf_init(void) rci->flags[cai->rci_index] = cai->flags; /* Use MSR for this counter */ - } else if (!no_msr && cai->msr && probe_msr(cpu, cai->msr) == 0) { + } else if (!no_msr && cai->msr && probe_rapl_msr(cpu, cai->msr, cai->rci_index) == 0) { rci->source[cai->rci_index] = COUNTER_SOURCE_MSR; rci->msr[cai->rci_index] = cai->msr; rci->msr_mask[cai->rci_index] = cai->msr_mask; @@ -8045,7 +8054,7 @@ void msr_perf_init_(void) cai->present = true; /* User MSR for this counter */ - } else if (!no_msr && cai->msr && probe_msr(cpu, cai->msr) == 0) { + } else if (!no_msr && cai->msr && probe_rapl_msr(cpu, cai->msr, cai->rci_index) == 0) { cci->source[cai->rci_index] = COUNTER_SOURCE_MSR; cci->msr[cai->rci_index] = cai->msr; cci->msr_mask[cai->rci_index] = cai->msr_mask; @@ -8159,7 +8168,7 @@ void cstate_perf_init_(bool soft_c1) /* User MSR for this counter */ } else if (!no_msr && cai->msr && pkg_cstate_limit >= cai->pkg_cstate_limit - && probe_msr(cpu, cai->msr) == 0) { + && probe_rapl_msr(cpu, cai->msr, cai->rci_index) == 0) { cci->source[cai->rci_index] = COUNTER_SOURCE_MSR; cci->msr[cai->rci_index] = cai->msr; } From patchwork Sun Apr 6 18:57:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878980 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CBB2D1A3035 for ; Sun, 6 Apr 2025 18:58:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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Sun, 6 Apr 2025 18:58:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965907; bh=wBO/5+umzeemOp0ZULiDGgLQSXqdzNYBKrRf86ilEK4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=YNrVMoXYlRWzqnktyKopiMBZ+fkoHYmLAbAzedNn91GoiUJFiVUQqa3uPXwVkOLeN 2EVg4heru8rSo21HPYaosD9IW2L2OZR3hcUpU0zIorpCVhiA3Oii2w7kKAqZjPb36m ModOAqqvtXJK1BcNY4nAc2pSXRlN5THL2/uVRuniFjN5lt5jU6bq2Fh85d064B3TeY uopYA2mtOLj/P4EicRRlzHKlnKmZV/cg63F2yfzAltTvK6X1z3bOHECKAtWM3XcJmm BiEX0EipJfzfjDh2kBvikb+LI6q3kBu3vgUCxa35q1kyH8CvgG0ajL2qLE2YUqW/9+ JI32ncf9eq/Fw== From: Len Brown To: linux-pm@vger.kernel.org Cc: Artem Bityutskiy , Len Brown Subject: [PATCH 03/10] tools/power turbostat: Fix names matching Date: Sun, 6 Apr 2025 14:57:12 -0400 Message-ID: <5132681dcd96b2a8c357b6e5d93e9876924bb80b.1743965272.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Artem Bityutskiy Fix the 'find_msrp_by_name()' function which returns incorrect matches for cases like this: s1 = "C1-"; find_msrp_by_name(head, s1); Inside 'find_msrp_by_name()': ... s2 = "C1" if !(strcnmp(s1, s2, len(s2))) // Incorrect match! return mp; Full strings should be match istead. Switch to 'strcmp()' to fix the problem. Signed-off-by: Artem Bityutskiy Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index d26008f37a2c..d3af2bf307e1 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -9612,7 +9612,7 @@ struct msr_counter *find_msrp_by_name(struct msr_counter *head, char *name) for (mp = head; mp; mp = mp->next) { if (debug) fprintf(stderr, "%s: %s %s\n", __func__, name, mp->name); - if (!strncmp(name, mp->name, strlen(mp->name))) + if (!strcmp(name, mp->name)) return mp; } return NULL; From patchwork Sun Apr 6 18:57:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878687 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 96CB51A5BAA for ; Sun, 6 Apr 2025 18:58:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965908; cv=none; b=siDrQTeFUKDo8IJ9v5Oc/tsWExZO7aQomVEboisuqfIBtZANlUjR6BilBIO0OBN5kh91IoQlQvjYi1fOg+PR27kwHSt6Vh8MjFUIwf593O5fom8lW6yAJ/IPitcsLNzouiPOP8arThVkpREzT2YslfygSSxmMYRx+yXh5fQEhmk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965908; c=relaxed/simple; bh=SrTQ4lnExfcVBAPUvpG0KoCK7k3TVe7FjaH/+OBRulw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FS+5muY5cojxmBDPmPbH36KVJQ7pyCTRPPWvdbBidUF9iB8h+2WNLLqR2T0TLZT+zQzjb7lE9EKxP1MbAIRwR30yh1gh4Bc8+tdJRNu/LsP9FxsfcUyojcr7ieQqcbl4BRTKbhhwgU/imMSj4/VaRh0uzvpsMgx6f94s5H9iAEg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nPoCD9OO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nPoCD9OO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9299EC4CEE3; Sun, 6 Apr 2025 18:58:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965908; bh=SrTQ4lnExfcVBAPUvpG0KoCK7k3TVe7FjaH/+OBRulw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=nPoCD9OOWhZtB2snMMnr8ye/QdWm4rqkYkWZ6BuwET13CGsMUSZ4LE0fBXoceYjk/ BKveyMdc0UzB+JgiO2IOeYBbcVhd/Sy/MrIxzkEL0oEpKUDufxQDcyNX23VfFsDfJs rHvbDg5ADGmw1TRSruTAgpqQv+iRPX1Td3L3uwupS8Mv0it/juwb7xY+mEihzXHicN 6PH9HxPs6vTvltCPWjD590lkX5SFPOCN2jxv5H+C7eDo9i/lHf98/sIvM1Olfaaz79 oUkUj9WgybmvBob1tE0MBftzTGnDtziArbIwQ6Ii20F1XBJUpYyS9ERRnLWltQdzk8 ZQ7PBJhdfw2og== From: Len Brown To: linux-pm@vger.kernel.org Cc: Artem Bityutskiy , Len Brown Subject: [PATCH 04/10] tools/power turbostat: Add idle governor statistics reporting Date: Sun, 6 Apr 2025 14:57:13 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Artem Bityutskiy The idle governor provides the following per-idle state sysfs files: * above - Indicates overshoots, where a more shallow state should have been requested (if avaliale and enabled). * below - Indicates undershoots, where a deeper state should have been requested (if available and enabled). These files offer valuable insights into how effectively the Linux kernel idle governor selects idle states for a given workload. This commit adds support for these files in turbostat. Expose the contents of these files with the following naming convention: * C1: The number of times the C1 state was requested (existing counter). * C1+: The number of times the idle governor selected C1, but a deeper idle state should have been selected instead. * C1-: The number of times the idle governor selected C1, but a shallower idle state should have been selected instead. Signed-off-by: Artem Bityutskiy Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.8 | 4 +++ tools/power/x86/turbostat/turbostat.c | 48 ++++++++++++++++++++++----- 2 files changed, 44 insertions(+), 8 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index ed258f248152..52d727e29ea7 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -160,6 +160,10 @@ The system configuration dump (if --quiet is not used) is followed by statistics .PP \fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measurement interval. The system summary line shows the sum for all CPUs. These are C-state names as exported in /sys/devices/system/cpu/cpu*/cpuidle/state*/name. While their names are generic, their attributes are processor specific. They the system description section of output shows what MWAIT sub-states they are mapped to on each system. .PP +\fBC1+, C2+, C3+...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a deeper idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/below file. +.PP +\fBC1-, C2-, C3-...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a shallower idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/above file. +.PP \fBC1%, C2%, C3%\fP The residency percentage that Linux requested C1, C2, C3.... The system summary is the average of all CPUs in the system. Note that these are software, reflecting what was requested. The hardware counters reflect what was actually achieved. .PP \fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states. These numbers are from hardware residency counters. diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index d3af2bf307e1..f29e47fe4249 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -10265,6 +10265,7 @@ void probe_sysfs(void) char name_buf[16]; FILE *input; int state; + int min_state = 1024, max_state = 0; char *sp; for (state = 10; state >= 0; --state) { @@ -10296,6 +10297,11 @@ void probe_sysfs(void) continue; add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC, FORMAT_PERCENT, SYSFS_PERCPU, 0); + + if (state > max_state) + max_state = state; + if (state < min_state) + min_state = state; } for (state = 10; state >= 0; --state) { @@ -10306,26 +10312,52 @@ void probe_sysfs(void) continue; if (!fgets(name_buf, sizeof(name_buf), input)) err(1, "%s: failed to read file", path); - /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */ - sp = strchr(name_buf, '-'); - if (!sp) - sp = strchrnul(name_buf, '\n'); - *sp = '\0'; fclose(input); remove_underbar(name_buf); - sprintf(path, "cpuidle/state%d/usage", state); - if (!DO_BIC(BIC_sysfs) && !is_deferred_add(name_buf)) continue; if (is_deferred_skip(name_buf)) continue; + /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */ + sp = strchr(name_buf, '-'); + if (!sp) + sp = strchrnul(name_buf, '\n'); + + /* + * The 'below' sysfs file always contains 0 for the deepest state (largest index), + * do not add it. + */ + if (state != max_state) { + /* + * Add 'C1+' for C1, and so on. The 'below' sysfs file always contains 0 for + * the last state, so do not add it. + */ + + *sp = '+'; + *(sp + 1) = '\0'; + sprintf(path, "cpuidle/state%d/below", state); + add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS, FORMAT_DELTA, SYSFS_PERCPU, 0); + } + + *sp = '\0'; + sprintf(path, "cpuidle/state%d/usage", state); add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS, FORMAT_DELTA, SYSFS_PERCPU, 0); - } + /* + * The 'above' sysfs file always contains 0 for the shallowest state (smallest + * index), do not add it. + */ + if (state != min_state) { + *sp = '-'; + *(sp + 1) = '\0'; + sprintf(path, "cpuidle/state%d/above", state); + add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS, FORMAT_DELTA, SYSFS_PERCPU, 0); + } + } } /* From patchwork Sun Apr 6 18:57:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878979 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7783E1A5BAA for ; Sun, 6 Apr 2025 18:58:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965909; cv=none; b=YeuEBYLGM4vuk7stYWSlKS+/FZaqAEQq2jv4Hkbo6frU9ibhojbZP5qe+lxIqhBjg8PJVxFsErBZoCrbhHcRjKN3cy3+kqoOo1Ql3CzOd5uWTip86X7UE0j0zmxC7abuDAwMzJXlYbFROOfuu1BYbakvbPYukvfI5groWa/g1n8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965909; c=relaxed/simple; bh=6dxvlMJtzHBprvASZggI+VYGDRBseTStoDal0K69vZw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=i3+NmzzLqpsCVVvm+mVVmnOl5n0VArrELfgIvYhubL5/bIzV4bX/NC+Dt/WsJ1RTMZUqPL4hcSG4XhfmQt1jilw5wKJTVjDb8jlJA7TLaMav5p9hJ0cBYAIiZANFTZT2cFO+PMlnzJwEfK6/oUiQV5aqCOH7TpiedJ3TjcHc/C0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HNFEbdRE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HNFEbdRE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D34EC4CEEA; Sun, 6 Apr 2025 18:58:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965909; bh=6dxvlMJtzHBprvASZggI+VYGDRBseTStoDal0K69vZw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=HNFEbdRE31Yzl9Zb0BqTfy5J92yZ1B8DLm+82Zlv+fzRBSJRRo1E40pUBD01tWXIs vCb0EcgQiCUgarGDINbXK9DLoowPmNIL/DNH+9s5F+mbSFDEJzBRQ9ZKAuYz+UwsCK TPk6fKwke2CNUTXM/JA2fENtSEMA/qcyULj8ADJeJ9TBB6Qd6CAfgsxq/jXQM9Jeq4 VNQP5ionfF7XQ9W99bbSx6qnno+/QjSnywjv+cFwXa3ECj2AMxaiynfQP2pyubOHAE TwAGdUun0oS9b3pVgJWW1M/5m9tP/DTwyk+XUdHrLxil5uEAHycqlFYpO1weDFc3tL up/taYZ3x0AoA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Justin Ernst , Len Brown Subject: [PATCH 05/10] tools/power turbostat: Increase CPU_SUBSET_MAXCPUS to 8192 Date: Sun, 6 Apr 2025 14:57:14 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Justin Ernst On systems with >= 1024 cpus (in my case 1152), turbostat fails with the error output: "turbostat: /sys/fs/cgroup/cpuset.cpus.effective: cpu str malformat 0-1151" A similar error appears with the use of turbostat --cpu when the inputted cpu range contains a cpu number >= 1024: # turbostat -c 1100-1151 "--cpu 1100-1151" malformed ... Both errors are caused by parse_cpu_str() reaching its limit of CPU_SUBSET_MAXCPUS. It's a good idea to limit the maximum cpu number being parsed, but 1024 is too low. For a small increase in compute and allocated memory, increasing CPU_SUBSET_MAXCPUS brings support for parsing cpu numbers >= 1024. Increase CPU_SUBSET_MAXCPUS to 8192, a common setting for CONFIG_NR_CPUS on x86_64. Signed-off-by: Justin Ernst Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index f29e47fe4249..218aca958923 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -1121,7 +1121,7 @@ void probe_platform_features(unsigned int family, unsigned int model) int backwards_count; char *progname; -#define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */ +#define CPU_SUBSET_MAXCPUS 8192 /* need to use before probe... */ cpu_set_t *cpu_present_set, *cpu_possible_set, *cpu_effective_set, *cpu_allowed_set, *cpu_affinity_set, *cpu_subset; size_t cpu_present_setsize, cpu_possible_setsize, cpu_effective_setsize, cpu_allowed_setsize, cpu_affinity_setsize, cpu_subset_size; #define MAX_ADDED_THREAD_COUNTERS 24 From patchwork Sun Apr 6 18:57:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878686 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACFB11A08B1 for ; Sun, 6 Apr 2025 18:58:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965910; cv=none; b=PLVzX9zifPsSXA78WEowJIDHOOM/X0ofLIwFjeeV6OX+YLEcCyrHxJ7lWt2CeZmc1Hh/xrfgGhhcpnEK6KpQl+Wg6nGFCFzkDoHsLAxSAhfAdfCiH8svaPZgzxrT1DEz778BaVA8lkD48ncIjpELYRmCCLKUD3nxzhZZslo0h4g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965910; c=relaxed/simple; bh=MESxv7015TB2C6nWfpmPu2AjsvIBZINelF1XBMnV2fM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RxNjpxRsGgBfqUT0OgUOdvo9EbgJcZjm9BJE8jEeEhXgKUYF8zjhNOa4Dvleap33l0u8EwB+Cw/w5LNCW7O+bXaDg0VCTr/hna/GJFR9oMsdLmMXtoDm+iFgn6n2gaLtAjj4LkPM3yi7gt8sCAGEYcACOQxeKoGKQ7MmlbrpMtU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Jmco9d/K; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Jmco9d/K" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4836AC4CEE3; Sun, 6 Apr 2025 18:58:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965910; bh=MESxv7015TB2C6nWfpmPu2AjsvIBZINelF1XBMnV2fM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=Jmco9d/KmOkNnzcFfBYfSBxWvHoNrrLyamuum4FBfaq2PiFUPhy6b7+oVfq1sBUfL Kn6yl5xE3aNWCxPCAMgT29LSfQS1SGB5TuTlYt9QBTzvehVAZwlYfeo586VysN8nSL wxTcEK3Uz92Iog+Co8c5RwNvCIr99RIkJ9DnBOYFBVWk/y7fzcfSX42UygVS+pW2aq 0sQHIEY+2+YiAePkFAcEdYfx0wxC6JB1NGUMQ/MtUWv3hzqq1ALNdUdZv38jaijmxF bq8ppI2B+3FGG4ypSSbIid0miFqarZt/aIlxj2LikBobYkhRXEXzxG0zXlQbHpW30H nhHNZgROX92SA== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown , Arjan van de Ven , Chen Yu Subject: [PATCH 06/10] tools/power turbostat: report CoreThr per measurement interval Date: Sun, 6 Apr 2025 14:57:15 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown The CoreThr column displays total thermal throttling events since boot time. Change it to report events during the measurement interval. This is more useful for showing a user the current conditions. Total events since boot time are still available to the user via /sys/devices/system/cpu/cpu*/thermal_throttle/* Document CoreThr on turbostat.8 Fixes: eae97e053fe30 ("turbostat: Support thermal throttle count print") Reported-by: Arjan van de Ven Signed-off-by: Len Brown Cc: Chen Yu --- tools/power/x86/turbostat/turbostat.8 | 2 ++ tools/power/x86/turbostat/turbostat.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index 52d727e29ea7..144565151e1e 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -172,6 +172,8 @@ The system configuration dump (if --quiet is not used) is followed by statistics .PP \fBPkgTmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor. .PP +\fBCoreThr\fP Core Thermal Throttling events during the measurement interval. Note that events since boot can be find in /sys/devices/system/cpu/cpu*/thermal_throttle/* +.PP \fBGFX%rc6\fP The percentage of time the GPU is in the "render C6" state, rc6, during the measurement interval. From /sys/class/drm/card0/power/rc6_residency_ms or /sys/class/drm/card0/gt/gt0/rc6_residency_ms or /sys/class/drm/card0/device/tile0/gtN/gtidle/idle_residency_ms depending on the graphics driver being used. .PP \fBGFXMHz\fP Instantaneous snapshot of what sysfs presents at the end of the measurement interval. From /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz or /sys/class/drm/card0/gt_cur_freq_mhz or /sys/class/drm/card0/gt/gt0/rps_cur_freq_mhz or /sys/class/drm/card0/device/tile0/gtN/freq0/cur_freq depending on the graphics driver being used. diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 218aca958923..70e17d4ad9b6 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -3485,7 +3485,7 @@ void delta_core(struct core_data *new, struct core_data *old) old->c6 = new->c6 - old->c6; old->c7 = new->c7 - old->c7; old->core_temp_c = new->core_temp_c; - old->core_throt_cnt = new->core_throt_cnt; + old->core_throt_cnt = new->core_throt_cnt - old->core_throt_cnt; old->mc6_us = new->mc6_us - old->mc6_us; DELTA_WRAP32(new->core_energy.raw_value, old->core_energy.raw_value); From patchwork Sun Apr 6 18:57:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878978 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE30B1A8409 for ; Sun, 6 Apr 2025 18:58:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965911; cv=none; b=fX+zDc3TAZ6zeg5lmzpuWkUhZdWZbVEE11MKcfHvXxz7XpyHswcHue8QvkAxh9mgHiYkqEpCDKLW7fzVHnozqDx3upBicVtpngVMeFf+QPSow83iTmSIR95KU1A9t3LhRBqe6GVF2onSCUoJhsOcesPJTVYQ2pUjPAdrKaSp/j0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965911; c=relaxed/simple; bh=yhc+OVt4LkWAucBB9PRBBBzCOtPpxvS4irABHPVOOUU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fIT8bnErfkDwDKvzDkkXkYElYNi0R/Bz4HShH/WTtAxHk94paMfDzl4gm/56hPe22qMibAGfLoKjltemrv6ykKUW5Hec9GCuhq23xoY6Mhn2U0xDmKtb+KiadaaQyk74CsLUqiOVPifykN8iX1lHsmtJPfZh+Ethy75Bs4tjHrI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Lwgg59pn; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Lwgg59pn" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 74C00C4CEE7; Sun, 6 Apr 2025 18:58:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965910; bh=yhc+OVt4LkWAucBB9PRBBBzCOtPpxvS4irABHPVOOUU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=Lwgg59pn+4zx3JybQ15IuUFiqrvtop8Tsuz501opfd336wxIaqbgW9K1OnzlANDmF Z7j+D7BjZx1s0OaCO+Fq0GfI7UmSYRmSubuvJ5H2ngP5Rntpqms/W1uL3vQB1+7mOJ dCfPTDf2VF0T6C0V2hv0moflmZoVWVH/Pn+Em2BIAKVSRSGgdnS46hwsXVlXQf1+gf 8bF4/GUV2q+PSs1QopUt7gB87ZLsSrO5xC4W5MTUIyyHhSGG9xO3evY0Hjl+vNFk7z zFV/EbByiyLKW54T1RzRZemKlLKIFMwNROyXpC7WtE/WMI+XIdv6RJ9R9pURpKO+7B KzrQZ2nG9+q/g== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown Subject: [PATCH 07/10] tools/power turbostat: Document GNR UncMHz domain convention Date: Sun, 6 Apr 2025 14:57:16 -0400 Message-ID: <3ae8508663372b93c5556a887e96ed0ca5df0711.1743965272.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown Document that on Intel Granite Rapids Systems, Uncore domains 0-2 are CPU domains, and uncore domains 3-4 are IO domains. Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.8 | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index 144565151e1e..e86493880c16 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -205,6 +205,7 @@ The system configuration dump (if --quiet is not used) is followed by statistics \fBUncMHz\fP per-package uncore MHz, instantaneous sample. .PP \fBUMHz1.0\fP per-package uncore MHz for domain=1 and fabric_cluster=0, instantaneous sample. System summary is the average of all packages. +Intel Granite Rapids systems use domains 0-2 for CPUs, and 3-4 for IO, with cluster always 0. For the "--show" and "--hide" options, use "UncMHz" to operate on all UMHz*.* as a group. .SH TOO MUCH INFORMATION EXAMPLE By default, turbostat dumps all possible information -- a system configuration header, followed by columns for all counters. From patchwork Sun Apr 6 18:57:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878685 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 571461A2C0B for ; Sun, 6 Apr 2025 18:58:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965912; cv=none; b=cbHerPNf1Asa/6dWhLhDLymvn3VH7+17h8iL4ebKm7TjMw+JT4dyTeAW3pr/XmFMC/3eAVtvP28xBx0f4PnmTqvkboL6O8Fg3uL9xAQVEeNuON9eOM4EKzOVrK04ztdT9PcSFANUfwQEbdrlwwg5f3q2EwNwQU9bigOOl8abfuo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965912; c=relaxed/simple; bh=17AI1he28sTOXWCZfEVtnNpkF0FtQMKiPHMrcyzxPzc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U2sQgVuS5YXUTfjLdrQ2FPwGTuUkgcNEPak3dJEvKaimpTPsXQsNIbZqqhpgHwMqBKyUrvW0/F78rcVCocbcfrJzLfLQy+s1edRPLAMQNSHHsI0dHtBaRMeWE2cJKKVMCkvxbG/YYRETCtZKNDniC8qSzDM/n9e2N/tq4Zlc3EQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FkUGmTC3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FkUGmTC3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 24B8BC4CEEA; Sun, 6 Apr 2025 18:58:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965911; bh=17AI1he28sTOXWCZfEVtnNpkF0FtQMKiPHMrcyzxPzc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=FkUGmTC3CkChIyL7nfasFWruyD6m37kqpO+G2Vpoa8SyQRC7nr6a18aeEbgXK1jTj ruI2ijVEdXLqhd3I3u7f5h+yrh1bOe1FNslIN0pq8k4AAfTxUbT7lV9dx0jFHNzUvn gVJSVM6XK0MPfW9/UrV93CG5fP4fGRi2H4x21upXyIHeE9+6PJWYHgWNznxMwKFxCX f6LU3F3MwXm5GYNUkSFieu89lrXbV0+eNMR+tPnfFe78+ntitCLPLhCBNF56Qmi6NG WP0qALFMsOgHaZFzPCf7nj7+YHlns5q9R4LfCa/e/jrugvxqKYahtAG2FWnXzrSnZ1 zQ8ASHmCBD5BQ== From: Len Brown To: linux-pm@vger.kernel.org Cc: Zhang Rui , Len Brown Subject: [PATCH 08/10] tools/power turbostat: Restore GFX sysfs fflush() call Date: Sun, 6 Apr 2025 14:57:17 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Zhang Rui Do fflush() to discard the buffered data, before each read of the graphics sysfs knobs. Fixes: ba99a4fc8c24 ("tools/power turbostat: Remove unnecessary fflush() call") Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index 70e17d4ad9b6..c9a34c16c7a8 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -6039,6 +6039,7 @@ int snapshot_graphics(int idx) int retval; rewind(gfx_info[idx].fp); + fflush(gfx_info[idx].fp); switch (idx) { case GFX_rc6: From patchwork Sun Apr 6 18:57:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878977 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD80F1A8F9E for ; Sun, 6 Apr 2025 18:58:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965912; cv=none; b=dDZKiFlzA60/QosBa59YbAXcv2jyZYLAr80iKLrOjx450oBuEiNeiP6qTyR2grxmJwxjzCkkOXx22KM84rHfsx4NEZhCbzjzZSQTsjbiiv7Uj8QzdC3A0XqSjqyVJwwuHHAcpeDBiaMcCAin/MvHmGOs87RpOk2Z2NA9yZ9GiwU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965912; c=relaxed/simple; bh=OzC/HdfftBnvfrUQOID09G7YqUNwp6J582o5d/B05ms=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Q3yWFOczrAEl5vG6Z1MMN0uJOL7j/dE/SpxKsjinEl212QglslOtw3iei1IPb0zlSU74PLH6woX1TM51DO/K72Z9Ev272oql2zm5/ragVFmFPUj7YKtso0LLbQSrwhll0TWEmhFvgrxGEbtEjpXOD/64xDr5A8rR0QviKAQqwaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Xlj1pESg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Xlj1pESg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1D6F9C4CEE3; Sun, 6 Apr 2025 18:58:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965912; bh=OzC/HdfftBnvfrUQOID09G7YqUNwp6J582o5d/B05ms=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=Xlj1pESgK0JpRSTHxZdO5gTPORvdMNCUhD8B4wmTFM/2pMfoK0icTb6CPpjRaHVvt Rwrm49M73CaxWKmDKihf+M2zjNIXRta0HLf6SG0P0+qMlo2GjtZlm2a1NqDkCxY3Jn I7M0E6jaZng5gf2dXbZ3fUrCKCPpk8fcxgHTiIb25KSnYbs9MfSzuL6KMh/jSpGWuj cuncNPGuzSrbb7nrychQTk5OdSGhw+8m35LQFm7UnBsQQTE6QsnZvw+59e2K4cPuAS LoCb6ev91Gbva/c40Fcy/7UEImeesdvc7qATiCZWldTa+1p6KqclKOb7TqhhzJTBld 0ZZonMUAhBD+A== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown Subject: [PATCH 09/10] tools/power turbostat: re-factor sysfs code Date: Sun, 6 Apr 2025 14:57:18 -0400 Message-ID: <994633894f208a0151baaee1688ab3c431912553.1743965272.git.len.brown@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown Probe cpuidle "sysfs" residency and counts separately, since soon we will make one disabled on, and the other disabled off. Clarify that some BIC (build-in-counters) are actually "groups". since we're about to re-name some of those groups. no functional change. Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.c | 31 ++++++++++++++++++--------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index c9a34c16c7a8..df0391bedcde 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -273,10 +273,10 @@ struct msr_counter bic[] = { #define BIC_NMI (1ULL << 61) #define BIC_CPU_c1e (1ULL << 62) -#define BIC_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die) -#define BIC_THERMAL_PWR (BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__ | BIC_SysWatt) -#define BIC_FREQUENCY (BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz | BIC_SAMMHz | BIC_SAMACTMHz | BIC_UNCORE_MHZ) -#define BIC_IDLE (BIC_Busy | BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX | BIC_SAM_mc6 | BIC_Diec6) +#define BIC_GROUP_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die) +#define BIC_GROUP_THERMAL_PWR (BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__ | BIC_SysWatt) +#define BIC_GROUP_FREQUENCY (BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz | BIC_SAMMHz | BIC_SAMACTMHz | BIC_UNCORE_MHZ) +#define BIC_GROUP_IDLE (BIC_Busy | BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX | BIC_SAM_mc6 | BIC_Diec6) #define BIC_OTHER (BIC_IRQ | BIC_NMI | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC) #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC) @@ -2354,16 +2354,16 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) retval |= ~0; break; } else if (!strcmp(name_list, "topology")) { - retval |= BIC_TOPOLOGY; + retval |= BIC_GROUP_TOPOLOGY; break; } else if (!strcmp(name_list, "power")) { - retval |= BIC_THERMAL_PWR; + retval |= BIC_GROUP_THERMAL_PWR; break; } else if (!strcmp(name_list, "idle")) { - retval |= BIC_IDLE; + retval |= BIC_GROUP_IDLE; break; } else if (!strcmp(name_list, "frequency")) { - retval |= BIC_FREQUENCY; + retval |= BIC_GROUP_FREQUENCY; break; } else if (!strcmp(name_list, "other")) { retval |= BIC_OTHER; @@ -10260,7 +10260,7 @@ int is_deferred_skip(char *name) return 0; } -void probe_sysfs(void) +void probe_cpuidle_residency(void) { char path[64]; char name_buf[16]; @@ -10304,6 +10304,16 @@ void probe_sysfs(void) if (state < min_state) min_state = state; } +} + +void probe_cpuidle_counts(void) +{ + char path[64]; + char name_buf[16]; + FILE *input; + int state; + int min_state = 1024, max_state = 0; + char *sp; for (state = 10; state >= 0; --state) { @@ -10602,7 +10612,8 @@ int main(int argc, char **argv) print_bootcmd(); } - probe_sysfs(); + probe_cpuidle_residency(); + probe_cpuidle_counts(); if (!getuid()) set_rlimit(); From patchwork Sun Apr 6 18:57:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Len Brown X-Patchwork-Id: 878684 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46FA61A9B5B for ; Sun, 6 Apr 2025 18:58:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965913; cv=none; b=LdKtWfXH7qcm4HdIkq/znjYAz7c1zSVDh2mUYwPOyMJZMSKOTNClH4fIYnksjNiuz9CMzIbhDlohORH60ZmEJytT6Gv3meqNWLBN6vgfnW2OPsHxfHRhuW+tse2lPFN+tYUf0mKSDNiZXg7ID7rMqmjYpL0FiJCGSnc0/aO9y5k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743965913; c=relaxed/simple; bh=3e0FlyM0W2Z2jhqUPcjwaLhkDQi2aqZtdh5W6JoljNc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=boeqd+79KdIasZwn+aAyY2H9DJwB8mW/AeIZKH/5z4fxbUc74O3Xn/i6CZwD9fSwip+UEpqD/mCGQKe8bpcOWfRaLNWJUCwzAk6ll9gTPwyGg5vQ45KIO9uPjxsnt9RHRPb9mKID/PjnqMtirkbTlc6VMlkaenRylszjdxv+8Ew= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NOCepBxi; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NOCepBxi" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B64D3C4CEE7; Sun, 6 Apr 2025 18:58:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743965913; bh=3e0FlyM0W2Z2jhqUPcjwaLhkDQi2aqZtdh5W6JoljNc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:Reply-To:From; b=NOCepBxiOqmy7Xr2BXa4+Tl7Jf2rmpXrIo6AnRmq515oFupSQDVBkTiJFYEw3f9kq WJjinrzMZ6TKPnxYUt5Rs6hfDAIgC9s9P6nJTebMIz3XhBbPVe5cvkXFZLCW2AZKPB aReguf8GjIyaxMB4LpVBCcQ2C8FjrZc1a3W8ltSysFoJ35w6qcIz6Uau5bF0rZd7uJ znqN6oEHMEBRQAq52YfPLGAOeslhDK7B7bwMYLVm9aRi17pK+vaz7OTfuQz2Am5aJB aMIcp2x72zfc1mqW1VweBeZWVmltc666aDsPbq+vHD5xno3epEW3xElwgLQcD40CTI eI+bAwD9NINog== From: Len Brown To: linux-pm@vger.kernel.org Cc: Len Brown Subject: [PATCH 10/10] tools/power turbostat: disable "cpuidle" invocation counters, by default Date: Sun, 6 Apr 2025 14:57:19 -0400 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> References: <1c7c7388e6c31f46b26a884d80b45efbad8237b2.1743965272.git.len.brown@intel.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Reply-To: Len Brown Organization: Intel Open Source Technology Center From: Len Brown Create "pct_idle" counter group, the sofware notion of residency so it can now be singled out, independent of other counter groups. Create "cpuidle" group, the cpuidle invocation counts. Disable "cpuidle", by default. Create "swidle" = "cpuidle" + "pct_idle". Undocument "sysfs", the old name for "swidle", but keep it working for backwards compatibilty. Create "hwidle", all the HW idle counters Modify "idle", enabled by default "idle" = "hwidle" + "pct_idle" (and now excludes "cpuidle") Signed-off-by: Len Brown --- tools/power/x86/turbostat/turbostat.8 | 12 +++++----- tools/power/x86/turbostat/turbostat.c | 34 +++++++++++++++++++++------ 2 files changed, 33 insertions(+), 13 deletions(-) diff --git a/tools/power/x86/turbostat/turbostat.8 b/tools/power/x86/turbostat/turbostat.8 index e86493880c16..b74ed916057e 100644 --- a/tools/power/x86/turbostat/turbostat.8 +++ b/tools/power/x86/turbostat/turbostat.8 @@ -100,7 +100,7 @@ The column name "all" can be used to enable all disabled-by-default built-in cou .PP \fB--show column\fP show only the specified built-in columns. May be invoked multiple times, or with a comma-separated list of column names. .PP -\fB--show CATEGORY --hide CATEGORY\fP Show and hide also accept a single CATEGORY of columns: "all", "topology", "idle", "frequency", "power", "sysfs", "other". +\fB--show CATEGORY --hide CATEGORY\fP Show and hide also accept a single CATEGORY of columns: "all", "topology", "idle", "frequency", "power", "cpuidle", "hwidle", "swidle", "other". "idle" (enabled by default), includes "hwidle" and "idle_pct". "cpuidle" (default disabled) includes cpuidle software invocation counters. "swidle" includes "cpuidle" plus "idle_pct". "hwidle" includes only hardware based idle residency counters. Older versions of turbostat used the term "sysfs" for what is now "swidle". .PP \fB--Dump\fP displays the raw counter values. .PP @@ -158,15 +158,15 @@ The system configuration dump (if --quiet is not used) is followed by statistics .PP \fBSMI\fP The number of System Management Interrupts serviced CPU during the measurement interval. While this counter is actually per-CPU, SMI are triggered on all processors, so the number should be the same for all CPUs. .PP -\fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measurement interval. The system summary line shows the sum for all CPUs. These are C-state names as exported in /sys/devices/system/cpu/cpu*/cpuidle/state*/name. While their names are generic, their attributes are processor specific. They the system description section of output shows what MWAIT sub-states they are mapped to on each system. +\fBC1, C2, C3...\fP The number times Linux requested the C1, C2, C3 idle state during the measurement interval. The system summary line shows the sum for all CPUs. These are C-state names as exported in /sys/devices/system/cpu/cpu*/cpuidle/state*/name. While their names are generic, their attributes are processor specific. They the system description section of output shows what MWAIT sub-states they are mapped to on each system. These counters are in the "cpuidle" group, which is disabled, by default. .PP -\fBC1+, C2+, C3+...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a deeper idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/below file. +\fBC1+, C2+, C3+...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a deeper idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/below file. These counters are in the "cpuidle" group, which is disabled, by default. .PP -\fBC1-, C2-, C3-...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a shallower idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/above file. +\fBC1-, C2-, C3-...\fP The idle governor idle state misprediction statistics. Inidcates the number times Linux requested the C1, C2, C3 idle state during the measurement interval, but should have requested a shallower idle state (if it exists and enabled). These statistics come from the /sys/devices/system/cpu/cpu*/cpuidle/state*/above file. These counters are in the "cpuidle" group, which is disabled, by default. .PP -\fBC1%, C2%, C3%\fP The residency percentage that Linux requested C1, C2, C3.... The system summary is the average of all CPUs in the system. Note that these are software, reflecting what was requested. The hardware counters reflect what was actually achieved. +\fBC1%, C2%, C3%\fP The residency percentage that Linux requested C1, C2, C3.... The system summary is the average of all CPUs in the system. Note that these are software, reflecting what was requested. The hardware counters reflect what was actually achieved. These counters are in the "pct_idle" group, which is enabled by default. .PP -\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states. These numbers are from hardware residency counters. +\fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states. These numbers are from hardware residency counters and are in the "hwidle" group, which is enabled, by default. .PP \fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor. .PP diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index df0391bedcde..ab184f95cdaf 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -153,7 +153,7 @@ struct msr_counter bic[] = { { 0x0, "TSC_MHz", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "IRQ", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "SMI", NULL, 32, 0, FORMAT_DELTA, NULL, 0 }, - { 0x0, "sysfs", NULL, 0, 0, 0, NULL, 0 }, + { 0x0, "cpuidle", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "CPU%c1", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "CPU%c3", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "CPU%c6", NULL, 0, 0, 0, NULL, 0 }, @@ -206,6 +206,7 @@ struct msr_counter bic[] = { { 0x0, "Sys_J", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "NMI", NULL, 0, 0, 0, NULL, 0 }, { 0x0, "CPU%c1e", NULL, 0, 0, 0, NULL, 0 }, + { 0x0, "pct_idle", NULL, 0, 0, 0, NULL, 0 }, }; #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter)) @@ -219,7 +220,7 @@ struct msr_counter bic[] = { #define BIC_TSC_MHz (1ULL << 7) #define BIC_IRQ (1ULL << 8) #define BIC_SMI (1ULL << 9) -#define BIC_sysfs (1ULL << 10) +#define BIC_cpuidle (1ULL << 10) #define BIC_CPU_c1 (1ULL << 11) #define BIC_CPU_c3 (1ULL << 12) #define BIC_CPU_c6 (1ULL << 13) @@ -272,17 +273,20 @@ struct msr_counter bic[] = { #define BIC_Sys_J (1ULL << 60) #define BIC_NMI (1ULL << 61) #define BIC_CPU_c1e (1ULL << 62) +#define BIC_pct_idle (1ULL << 63) #define BIC_GROUP_TOPOLOGY (BIC_Package | BIC_Node | BIC_CoreCnt | BIC_PkgCnt | BIC_Core | BIC_CPU | BIC_Die) #define BIC_GROUP_THERMAL_PWR (BIC_CoreTmp | BIC_PkgTmp | BIC_PkgWatt | BIC_CorWatt | BIC_GFXWatt | BIC_RAMWatt | BIC_PKG__ | BIC_RAM__ | BIC_SysWatt) #define BIC_GROUP_FREQUENCY (BIC_Avg_MHz | BIC_Busy | BIC_Bzy_MHz | BIC_TSC_MHz | BIC_GFXMHz | BIC_GFXACTMHz | BIC_SAMMHz | BIC_SAMACTMHz | BIC_UNCORE_MHZ) -#define BIC_GROUP_IDLE (BIC_Busy | BIC_sysfs | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX | BIC_SAM_mc6 | BIC_Diec6) +#define BIC_GROUP_HW_IDLE (BIC_Busy | BIC_CPU_c1 | BIC_CPU_c3 | BIC_CPU_c6 | BIC_CPU_c7 | BIC_GFX_rc6 | BIC_Pkgpc2 | BIC_Pkgpc3 | BIC_Pkgpc6 | BIC_Pkgpc7 | BIC_Pkgpc8 | BIC_Pkgpc9 | BIC_Pkgpc10 | BIC_CPU_LPI | BIC_SYS_LPI | BIC_Mod_c6 | BIC_Totl_c0 | BIC_Any_c0 | BIC_GFX_c0 | BIC_CPUGFX | BIC_SAM_mc6 | BIC_Diec6) +#define BIC_GROUP_SW_IDLE (BIC_Busy | BIC_cpuidle | BIC_pct_idle ) +#define BIC_GROUP_IDLE (BIC_GROUP_HW_IDLE | BIC_pct_idle) #define BIC_OTHER (BIC_IRQ | BIC_NMI | BIC_SMI | BIC_ThreadC | BIC_CoreTmp | BIC_IPC) -#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC) +#define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD | BIC_APIC | BIC_X2APIC | BIC_cpuidle) unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT); -unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC; +unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_cpuidle | BIC_pct_idle | BIC_APIC | BIC_X2APIC; #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME) #define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME) @@ -2362,6 +2366,15 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) } else if (!strcmp(name_list, "idle")) { retval |= BIC_GROUP_IDLE; break; + } else if (!strcmp(name_list, "swidle")) { + retval |= BIC_GROUP_SW_IDLE; + break; + } else if (!strcmp(name_list, "sysfs")) { /* legacy compatibility */ + retval |= BIC_GROUP_SW_IDLE; + break; + } else if (!strcmp(name_list, "hwidle")) { + retval |= BIC_GROUP_HW_IDLE; + break; } else if (!strcmp(name_list, "frequency")) { retval |= BIC_GROUP_FREQUENCY; break; @@ -2372,6 +2385,7 @@ unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode) } if (i == MAX_BIC) { + fprintf(stderr, "deferred %s\n", name_list); if (mode == SHOW_LIST) { deferred_add_names[deferred_add_index++] = name_list; if (deferred_add_index >= MAX_DEFERRED) { @@ -10269,6 +10283,9 @@ void probe_cpuidle_residency(void) int min_state = 1024, max_state = 0; char *sp; + if (!DO_BIC(BIC_pct_idle)) + return; + for (state = 10; state >= 0; --state) { sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", base_cpu, state); @@ -10291,7 +10308,7 @@ void probe_cpuidle_residency(void) sprintf(path, "cpuidle/state%d/time", state); - if (!DO_BIC(BIC_sysfs) && !is_deferred_add(name_buf)) + if (!DO_BIC(BIC_pct_idle) && !is_deferred_add(name_buf)) continue; if (is_deferred_skip(name_buf)) @@ -10315,6 +10332,9 @@ void probe_cpuidle_counts(void) int min_state = 1024, max_state = 0; char *sp; + if (!DO_BIC(BIC_cpuidle)) + return; + for (state = 10; state >= 0; --state) { sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name", base_cpu, state); @@ -10327,7 +10347,7 @@ void probe_cpuidle_counts(void) remove_underbar(name_buf); - if (!DO_BIC(BIC_sysfs) && !is_deferred_add(name_buf)) + if (!DO_BIC(BIC_cpuidle) && !is_deferred_add(name_buf)) continue; if (is_deferred_skip(name_buf))