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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1660bcesm24437595e9.10.2025.04.03.08.18.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:18:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao , Pierrick Bouvier , Richard Henderson Subject: [PATCH-for-10.0 v2 01/14] tests/functional/test_aarch64_rme_virt: fix sporadic failure Date: Thu, 3 Apr 2025 17:18:16 +0200 Message-ID: <20250403151829.44858-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier This test was randomly failing on our CI, and on dev machines, especially with QEMU debug builds. >From the information collected, it's related to an implementation choice in edk2 QEMU virt support. The workaround is to disable KASLR, to avoid accessing protected memory. Note: this is *not* needed for the similar test_aarch64_rme_sbsaref. More information is available on the associated GitLab issue. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2823 Signed-off-by: Pierrick Bouvier Reviewed-by: Alex Bennée Reviewed-by: Richard Henderson Message-ID: <20250328183816.2687925-1-pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- tests/functional/test_aarch64_rme_virt.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/functional/test_aarch64_rme_virt.py b/tests/functional/test_aarch64_rme_virt.py index f4ad4d33d58..a1abf584f0e 100755 --- a/tests/functional/test_aarch64_rme_virt.py +++ b/tests/functional/test_aarch64_rme_virt.py @@ -87,7 +87,9 @@ def test_aarch64_rme_virt(self): self.vm.add_args('-fsdev', f'local,security_model=none,path={rme_stack},id=shr0') self.vm.add_args('-device', 'virtio-net-pci,netdev=net0') self.vm.add_args('-netdev', 'user,id=net0') - self.vm.add_args('-append', 'root=/dev/vda') + # We need to add nokaslr to avoid triggering this sporadic bug: + # https://gitlab.com/qemu-project/qemu/-/issues/2823 + self.vm.add_args('-append', 'root=/dev/vda nokaslr') self.vm.launch() # Wait for host VM boot to complete. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a732asm2084187f8f.30.2025.04.03.08.18.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:18:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0 v2 02/14] tests/functional: Add a decorator for skipping tests on particular OS Date: Thu, 3 Apr 2025 17:18:17 +0200 Message-ID: <20250403151829.44858-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since tests might be failing on some operating systems, introduce the skipIfOperatingSystem() decorator. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- tests/functional/qemu_test/__init__.py | 2 +- tests/functional/qemu_test/decorators.py | 15 ++++++++++++++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/tests/functional/qemu_test/__init__.py b/tests/functional/qemu_test/__init__.py index 45f7befa374..af41c2c6a22 100644 --- a/tests/functional/qemu_test/__init__.py +++ b/tests/functional/qemu_test/__init__.py @@ -15,6 +15,6 @@ from .linuxkernel import LinuxKernelTest from .decorators import skipIfMissingCommands, skipIfNotMachine, \ skipFlakyTest, skipUntrustedTest, skipBigDataTest, skipSlowTest, \ - skipIfMissingImports + skipIfMissingImports, skipIfOperatingSystem from .archive import archive_extract from .uncompress import uncompress diff --git a/tests/functional/qemu_test/decorators.py b/tests/functional/qemu_test/decorators.py index 1651eb739a7..b6a1d41c55c 100644 --- a/tests/functional/qemu_test/decorators.py +++ b/tests/functional/qemu_test/decorators.py @@ -5,7 +5,7 @@ import importlib import os import platform -from unittest import skipUnless +from unittest import skipIf, skipUnless from .cmd import which @@ -26,6 +26,19 @@ def skipIfMissingCommands(*args): return skipUnless(has_cmds, 'required command(s) "%s" not installed' % ", ".join(args)) +''' +Decorator to skip execution of a test if the current +host operating system does not match one of the permitted +ones. +Example + + @skipIfOperatingSystem("Linux", "Darwin") +''' +def skipIfOperatingSystem(*args): + return skipIf(platform.system() in args, + 'not running on one of the required OS(s) "%s"' % + ", ".join(args)) + ''' Decorator to skip execution of a test if the current host machine does not match one of the permitted From patchwork Thu Apr 3 15:18:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877926 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3320478wrs; Thu, 3 Apr 2025 08:20:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCV1gv3ssuXS6ndV+QEXt5Rpc0Cxw7BeZjp3kFheVPyCocFVZEGi8wMgrmJTZQxZ4ZQtvufRUw==@linaro.org X-Google-Smtp-Source: AGHT+IFu0z96V+fLwMxqAOcR6lH6CeSzbEvVtZarjK4X2DyqEIBeMACJwbjbtEFBdJv0N4RzBUAS X-Received: by 2002:a05:6214:2487:b0:6e8:ee44:ce9f with SMTP id 6a1803df08f44-6ef02c14425mr116753496d6.20.1743693615308; Thu, 03 Apr 2025 08:20:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693615; cv=none; d=google.com; s=arc-20240605; b=iinnf4QLj6i/5/GgZPbUeI5fJY7D4LNuSbLUE6cL7dkE5gLjiv41uit/egJYSKP05C oceids1u2BpTpKr6TjGTOFsiJnqchApiG+Qk1Q6pTT1dWsb7FBKdENbi9oYl3vVvns+P JY1mPnyPstBymgO6OiQGgjtqpmlnev1Dk8goQ923u6r4rt1+QK5cCaE4fyiEPp4dPawk AcrpaqVG2BLEJarO/D1yNomHYvH5nSQWBEQvK7MSdjdO607xU3E3eAsDQymmEq0rCWeZ caXBQPyxvJLFeiqGT5bZWHkLyF1jWemdZVxsIqcFSMqQJCH5obOAWb3FV7vkSpiC7VeK zozw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=SL1deZbZrQCTs4masaMY+2Uy3IE2KzJVlJp7tx88rA0=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=BuZOVNHO+b1vzPs7COjgRXpqNROK4xbJxBCNLfESzGZId3M/SFK6C3PhNXLLPCv5TE Bh1ea2TqV/0kah+vWjRuJAXIyw9hxECNtdmBL5l8wD856cPy+CYODoRws5S7htSuN3I6 v9qPl43+tq5145aqKWw7pSsMCRTCZuXn9RjsJxaPoadpB+gZniG613jJul3wKLGAXwN+ qCwqCNmotEnXlVix8zSYGEQs0vzCgmOrb7TRwS2bxRsNLCRHR8ncqF52pVDpRsyOQ5y4 +W7tSe8t8tsDUWbFWvd0MF0SloejnyKcKuTX+n8aXN1l/f7IIpjHi2fHrq1qTYVD7FRX q7aQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yXlY0Jzg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec34a92desm20988475e9.14.2025.04.03.08.18.50 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:18:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0 v2 03/14] tests/functional: Skip aarch64_replay test on macOS Date: Thu, 3 Apr 2025 17:18:18 +0200 Message-ID: <20250403151829.44858-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org As of v10.0.0-rc2 this test is still failing on macos: $ make check-functional-aarch64 V=1 ... ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion failed: (replay_mutex_locked()) Bail out! ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion failed: (replay_mutex_locked()) This is tracked as https://gitlab.com/qemu-project/qemu/-/issues/2907 Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson --- tests/functional/test_aarch64_replay.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/functional/test_aarch64_replay.py b/tests/functional/test_aarch64_replay.py index 04cde433bcf..029fef3cbf8 100755 --- a/tests/functional/test_aarch64_replay.py +++ b/tests/functional/test_aarch64_replay.py @@ -5,7 +5,7 @@ # # SPDX-License-Identifier: GPL-2.0-or-later -from qemu_test import Asset +from qemu_test import Asset, skipIfOperatingSystem from replay_kernel import ReplayKernelBase @@ -16,6 +16,8 @@ class Aarch64Replay(ReplayKernelBase): 'releases/29/Everything/aarch64/os/images/pxeboot/vmlinuz'), '7e1430b81c26bdd0da025eeb8fbd77b5dc961da4364af26e771bd39f379cbbf7') + # Failing on Darwin: https://gitlab.com/qemu-project/qemu/-/issues/2907 + @skipIfOperatingSystem('Darwin') def test_aarch64_virt(self): self.set_machine('virt') self.cpu = 'cortex-a53' From patchwork Thu Apr 3 15:18:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877930 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3321752wrs; Thu, 3 Apr 2025 08:22:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXaE75aNRGlrzRiVt0B9TQusfEFQjHw+5YZerwsSccI8Y8OLdJi2B+7eb644KsullT8SSx1Kw==@linaro.org X-Google-Smtp-Source: AGHT+IG1jEqd8Snq85Lvw1BbdUBjUhxqYAMNFnhOTltFwDxP6kHN10IrGBlp3sxzetxtnerZmISp X-Received: by 2002:a05:620a:4001:b0:7c3:cccd:92ec with SMTP id af79cd13be357-7c76c90259emr596320185a.0.1743693756386; Thu, 03 Apr 2025 08:22:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693756; cv=none; d=google.com; s=arc-20240605; b=Cw0MshS79DdnDgydsN8WtXkDNhLD96qK0lfygv2GsP5TaZbZwsHo8k6xIMkJZV3Qpc fIKK0YDhcbyn+i7MjGVtaUECXA1UXq3VGo+iEDyUQfqwkxYJLnHBYwbRz2cWzXr/9sY4 N+qsb5bhW7E3Jfk75nPoBF5HE1/VCbCT3UGvKgB0ScVb78Ai3BxtsUNQ5Vlbqee4iPkg M9CRHXiMOjH+tWLioaAVFR/PU5gpwJpv5DEDVwHnrt3HKj9KHGms2eonWvyF51W01oqB p+/sdmu1y3lQDgI+Ocqu2ERdEo5KBbifjXu8pNDHg7DnevDKfJD9yA2ictdR+ZmP+RlZ lxDA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=OqdN6r/Pg42mUAWw+XorRCy8KmUUThhdk/vE08EOf5w=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=aGQNMJvRA+ssaFYg6Jd/jd4CYnySdk2Tj/197dWzbbzgaqfbUSFamLooLgSmjEGaGL fontbc+oZyly8PEvkqu1B5xOT7Z9R/uNX6hWbFOIsDOk6MU1FiRjaay4NyuTD0aTUr5/ kagmbPhhvWlZct+f9qWXDmhvpWc0XC8ar7Tc3jEHy031rz1auTcpOLFbMowCON3VjdJP KJGEAVhaUgaeaqTHVUDQos+U96loK8hGfFV+Kt96Shyu5VmZ1r7JBqugp0ckEXJ5yUsh PUeXA4ZBod5Dm5mZWa9p93LZZc7mm0qY2TxUxD9Z1QtU0agb7k+MsgEXmD8Qu+ePWdE2 tW9w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=A8uWizwi; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec34bbd9csm21247865e9.20.2025.04.03.08.18.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:18:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0 v2 04/14] tests/qtest: Skip Aarch64 VMapple machine Date: Thu, 3 Apr 2025 17:18:19 +0200 Message-ID: <20250403151829.44858-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org First, the VMapple machine only works with the ARM 'host' CPU type, which isn't accepted for QTest: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Second, the QTest framework expects machines to be createable without specifying optional arguments, however the VMapple machine requires few of them: $ qemu-system-aarch64 -M vmapple -accel qtest qemu-system-aarch64: No firmware specified $ qemu-system-aarch64 -M vmapple -accel qtest -bios /dev/null qemu-system-aarch64: No AUX device. Please specify one as pflash drive. Restrict this machine with QTest so we can at least run check-qtest, otherwise we get: $ make check-qtest-aarch64 qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF Broken pipe ../tests/qtest/libqtest.c:199: kill_qemu() tried to terminate QEMU process but encountered exit status 1 (expected 0) ... 7/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/test-hmp ERROR 24.71s killed by signal 6 SIGABRT 2/26 qemu:qtest+qtest-aarch64 / qtest-aarch64/qom-test ERROR 71.23s killed by signal 6 SIGABRT Suggested-by: Fabiano Rosas Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth --- tests/qtest/libqtest.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c index 2750067861e..fad307d125a 100644 --- a/tests/qtest/libqtest.c +++ b/tests/qtest/libqtest.c @@ -1788,6 +1788,7 @@ void qtest_cb_for_every_machine(void (*cb)(const char *machine), if (!strncmp("xenfv", machines[i].name, 5) || g_str_equal("xenpv", machines[i].name) || g_str_equal("xenpvh", machines[i].name) || + g_str_equal("vmapple", machines[i].name) || g_str_equal("nitro-enclave", machines[i].name)) { continue; } From patchwork Thu Apr 3 15:18:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877925 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3320236wrs; Thu, 3 Apr 2025 08:19:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX/OxvT+hJvIamhlm5nd9I/5TDPcA+j+oYCNDug4jtz219URJYRWH5CMQ/LA6tD/+XqRIeEqw==@linaro.org X-Google-Smtp-Source: AGHT+IEuqEQc3ooK0Nh7fvBhZr9w9zkDgJKb1bOp8UmImq4t53BeFJKKFODwS28KbqUQFM2cUG74 X-Received: by 2002:a05:620a:280d:b0:7c5:cd94:adc with SMTP id af79cd13be357-7c76df6a417mr439854085a.21.1743693591887; Thu, 03 Apr 2025 08:19:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693591; cv=none; d=google.com; s=arc-20240605; b=OW4MGtN6fwRLZytuHhlwGnKtyCS3er1DTxHT0JZQAu4kc44+tX+8/k3kpd4iYVKJai bmCbsfCT8TzRN00ZBshRlIkkyC+D3QHZ01IRoK62bL2rczGki1ooIVNOVljsIyxojOtz GpLzrNQOqxtG/jtUA+WcFj7RLbAZbHtqh+tmvioSC2M05CAtfZIAQMV3p+zvH8MKN4GJ PhkyFOY7TUgGe66nLZP9pmNhT8gz14PxJgRYK98ioU8sD5qXt1jJCKyiLKOqFF46Ogib DkGU4046z43u8DHJC1SPMHf0QfE6DGv3y1S2RiqzoijjxoAQvXSO+KOQTzE+fmVmmhnQ FoWw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=tqcs/vjgWLBfW1Dulxq85k2YfPnbkRu1MyFMZFId7I0=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=AcBSLZZigA3ewuGcFV89HfzQR3gZkQeB6AI1op3Aez1vlucxVGkALSjMVtmAisIySH Cn6TPoQcv1zTSMed6Hih9wUvaPbV41xDcoTX9uSkwjnHzhhfyW0Pka8De+l3Jk+vEay1 PTbNyJy/+MHlNGiv4S3yKkjS0BhnmsAq66ziYDiY4Zim0+zZRBh7ZCbxHmoPVc7LwZkV mVJr3uHoqe/guNnmDyjQTM4By46ZjWp5g88NFqc6+/byFziL7PEaOY2dayonEjIciSfn dJL1buJz/OKQYFls37S7Zo3Sfe94UBM+4TAfbpu32ffFcBTaYjDwKM3DPVg9JcErdHuK dxjA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=neEa2zC9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301b69c4sm2040603f8f.43.2025.04.03.08.19.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0 v2 05/14] hw/arm: Do not build VMapple machine by default Date: Thu, 3 Apr 2025 17:18:20 +0200 Message-ID: <20250403151829.44858-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Unfortunately as of v10.0.0-rc2 the VMapple machine is unusable: $ qemu-system-aarch64 -M vmapple [...] *** Terminating app due to uncaught exception 'NSInvalidArgumentException', reason: '-[PGIOSurfaceHostDeviceDescriptor setMapMemory:]: unrecognized selector sent to instance 0x600001ede820' *** First throw call stack: ( 0 CoreFoundation 0x000000019c759df0 __exceptionPreprocess + 176 1 libobjc.A.dylib 0x000000019c21eb60 objc_exception_throw + 88 2 CoreFoundation 0x000000019c816ce0 -[NSObject(NSObject) __retain_OA] + 0 3 CoreFoundation 0x000000019c6c7efc ___forwarding___ + 1500 4 CoreFoundation 0x000000019c6c7860 _CF_forwarding_prep_0 + 96 5 qemu-system-aarch64 0x000000010486dbd0 apple_gfx_mmio_realize + 200 6 qemu-system-aarch64 0x0000000104e6ab5c device_set_realized + 352 7 qemu-system-aarch64 0x0000000104e7250c property_set_bool + 100 8 qemu-system-aarch64 0x0000000104e7023c object_property_set + 136 9 qemu-system-aarch64 0x0000000104e74870 object_property_set_qobject + 60 10 qemu-system-aarch64 0x0000000104e70748 object_property_set_bool + 60 11 qemu-system-aarch64 0x0000000104e69bd8 qdev_realize_and_unref + 20 12 qemu-system-aarch64 0x0000000104e258e0 mach_vmapple_init + 1728 13 qemu-system-aarch64 0x000000010481b0ac machine_run_board_init + 1892 14 qemu-system-aarch64 0x0000000104a4def8 qmp_x_exit_preconfig + 260 15 qemu-system-aarch64 0x0000000104a51ba8 qemu_init + 14460 16 qemu-system-aarch64 0x0000000104f7cef8 main + 36 17 dyld 0x000000019c25eb4c start + 6000 ) libc++abi: terminating due to uncaught exception of type NSException Abort trap: 6 Disable the machine so it isn't built by default. This is tracked as https://gitlab.com/qemu-project/qemu/-/issues/2913 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- configs/devices/aarch64-softmmu/default.mak | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/devices/aarch64-softmmu/default.mak b/configs/devices/aarch64-softmmu/default.mak index 93f4022ad62..ad8028cfd48 100644 --- a/configs/devices/aarch64-softmmu/default.mak +++ b/configs/devices/aarch64-softmmu/default.mak @@ -9,3 +9,4 @@ include ../arm-softmmu/default.mak # CONFIG_XLNX_VERSAL=n # CONFIG_SBSA_REF=n # CONFIG_NPCM8XX=n +CONFIG_VMAPPLE=n From patchwork Thu Apr 3 15:18:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877931 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3321808wrs; Thu, 3 Apr 2025 08:22:42 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUyTAcAB0wbRTiAXYJAx+8lDrQyqZYx2/q9W7GfEZG/k5HKShyZE4NMbp3JCGzsPBkuTCGoBw==@linaro.org X-Google-Smtp-Source: AGHT+IFuASF3gRE+D3Nn37cweV5q11Of1+81JDWIkYStJeL/IY9cDUZhmNcSM4PYTz5ZvSSVt4b/ X-Received: by 2002:a05:620a:d93:b0:7c5:4b6a:d862 with SMTP id af79cd13be357-7c76f2b15admr240179185a.33.1743693762107; Thu, 03 Apr 2025 08:22:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693762; cv=none; d=google.com; s=arc-20240605; b=hgV4jPnFluSX2WYVUmm7mOhT0c1j0jPSFa1R8owOTWJa7hhNhf3l/ttwvJGY4H9kt0 wyfHAN+/VWDb9/xUHpuxJDPFKum1PaDfYvJ6b8GwvmXLLFPUBWjCtnlfTjU/Wg0piyes wT8KKkXwSWWsEi0v1CIibDCHVfbUUzMrQPKx8clXflnNh8USjy/IMKKTwEbxizyidyV7 7ZrGpy/p1KTtS5Ol9Ql6VqC606GxK1nrXDvyItPk76utG5FiTWpr/qYtThq6PFDDRNZz dWL4B0EP/HSrJYCh4YnDLRAyuCxwLS0racBkkoFa3yvxGaBVqSajfKSzyKvv84ap1Phw xhvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CGlb1wEFZdltIP7kYy/1AJxZQ0OAvinfht2Hxi3HH+0=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=ZnlvhTH2Zm9KAt+kxTIU9q5vi7YHNiOK9OrD7/b6L+TQZHGxKn7AwsYGHGg7dPx8kc 4Zgo1HzWhfqR8TZmazIs1u/z/kSL2jX0q9o/o4pkrHskfj+7ZuMpwdQLAfWOql15NfGJ evX6KPJ0VQYMimlcHq2RrpONgLfHNZg49hB55OIWX2rNcaufMqW3hXVeO9fBC0SLIvTE NwhYwF4fDjq0+bNfbFls+TCFDL1eOlFkgsAHGmgLCTJqrTrEdofshifzYh7Tpdgbyjrr oWZKG1vqrRZgjKEC0Fta6DGxh6VeyTk+nVMdkS6sDDzVVukKSngEeKaZ3gGDpRnIjdwu Uh4g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JkAeApmb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30226e9asm2092670f8f.94.2025.04.03.08.19.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 06/14] hw/arm/virt: Remove pointless VirtMachineState::tcg_its field Date: Thu, 3 Apr 2025 17:18:21 +0200 Message-ID: <20250403151829.44858-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org VirtMachineState::tcg_its has the same value of VirtMachineClass::no_tcg_its. Directly use the latter, removing the former. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/virt.h | 1 - hw/arm/virt.c | 13 +++++-------- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index c8e94e6aedc..17c160429ea 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -150,7 +150,6 @@ struct VirtMachineState { bool highmem_mmio; bool highmem_redists; bool its; - bool tcg_its; bool virt; bool ras; bool mte; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a96452f17a4..c0748cbb95a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -710,11 +710,12 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms) static void create_its(VirtMachineState *vms) { + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); const char *itsclass = its_class_name(); DeviceState *dev; if (!strcmp(itsclass, "arm-gicv3-its")) { - if (!vms->tcg_its) { + if (!vmc->no_tcg_its) { itsclass = NULL; } } @@ -831,7 +832,9 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem) redist_region_count); if (!kvm_irqchip_in_kernel()) { - if (vms->tcg_its) { + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); + + if (vmc->no_tcg_its) { object_property_set_link(OBJECT(vms->gic), "sysmem", OBJECT(mem), &error_fatal); qdev_prop_set_bit(vms->gic, "has-lpi", true); @@ -3357,12 +3360,6 @@ static void virt_instance_init(Object *obj) } else { /* Default allows ITS instantiation */ vms->its = true; - - if (vmc->no_tcg_its) { - vms->tcg_its = false; - } else { - vms->tcg_its = true; - } } /* Default disallows iommu instantiation */ From patchwork Thu Apr 3 15:18:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877928 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3320935wrs; Thu, 3 Apr 2025 08:21:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWqtWnlIbfhreb+zb9OmCeIpCpx3g2F3+Mxk6o89K59yWZuWaDdZ/XiF0nUOpp2kvb9quFjtw==@linaro.org X-Google-Smtp-Source: AGHT+IFUn9FS6KQ66HX3JYoNHUyccrUI3idJNj9MFxesGeZw4mrvnlhoLesMjFUIQAeGP23KGjEU X-Received: by 2002:a05:620a:4446:b0:7c5:5801:ea9a with SMTP id af79cd13be357-7c6862e7997mr2769868885a.11.1743693664561; Thu, 03 Apr 2025 08:21:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693664; cv=none; d=google.com; s=arc-20240605; b=h2bwYEA9sdvJurac6sBVq8zJgiq+fbW0uQX7YIg7E3sdYLdjmQ+Bgl9mwix9TQnthI n367GZ8rClSU7HRQt6IkhUJVsM9skGJoxZozng2wHvLl66t8A5+2BxFqyrR/RZLYKGlp 0vcE/+WXeWb1NtduUSmnHIEaAWRu12AWox1G7OwsJszoQ0FVdKDwEfBsDItm1DbaRJVU Yxw7CW5jwUaxGvGtKibXU3lC5slBcuxal7ZMeBBA4cNl8JsQGF871+eaApdDfn4nKyAz DWa4UEWJK7VJb/nG1+JlceIRhsP3oetvkyz54XSemtT9EB79EydK584OQsXqAdFCbH5H t4hQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TkNWzS/5Q0X1wok5s6TRzd+7v9TwGIUutsDTBjTDsAk=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=ZRcpWGyZbxoD2WJaYTVjQh+6U1lnf5/JNR1hvpo1Kp52XV59853k6uGkxC5yl5h2e8 iqayjCqn8tdx+bwterPl/BDV9OwP453aaAf71S+oG0UMld8b0123Wtma7Kosbo8hUU5z GMbQlgELEYyBelfVhBbOzfZcDoJrxTENZxmInCcpL0kMmuPZj4/U/Pjr2M7IFnkB35th UhFiOXi+SksL+KDyisD/ObnWxCAqfo0xbEEY3224V4icr1+mbggZMB/xp4bEJvnwUl34 EmVo9pWWoMQsmj0NIFJIqYoXW3qER9nx1J/8Hz4538a2N5KLoyQJeS3speVft1FrQ1EN lj3w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=koCTxZ3d; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301a7225sm2065828f8f.26.2025.04.03.08.19.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 07/14] hw/intc/gicv3_its: Do not check its_class_name() for NULL Date: Thu, 3 Apr 2025 17:18:22 +0200 Message-ID: <20250403151829.44858-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since commit cc5e719e2c8 ("kvm: require KVM_CAP_SIGNAL_MSI"), its_class_name() single implementation doesn't return NULL anymore. Update the prototype docstring, and remove the pointless checks. Reported-by: Gustavo Romero Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/intc/arm_gicv3_its_common.h | 2 +- hw/arm/virt-acpi-build.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/intc/arm_gicv3_its_common.h b/include/hw/intc/arm_gicv3_its_common.h index 7dc712b38d2..3c7b543b018 100644 --- a/include/hw/intc/arm_gicv3_its_common.h +++ b/include/hw/intc/arm_gicv3_its_common.h @@ -128,7 +128,7 @@ struct GICv3ITSCommonClass { * Return the ITS class name to use depending on whether KVM acceleration * and KVM CAP_SIGNAL_MSI are supported * - * Returns: class name to use or NULL + * Returns: class name to use */ const char *its_class_name(void); diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 3ac8f8e1786..9b7fc99f170 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -741,7 +741,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) memmap[VIRT_HIGH_GIC_REDIST2].size); } - if (its_class_name() && !vmc->no_its) { + if (!vmc->no_its) { /* * ACPI spec, Revision 6.0 Errata A * (original 6.0 definition has invalid Length) @@ -973,7 +973,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) vms->oem_table_id); } - if (its_class_name() && !vmc->no_its) { + if (!vmc->no_its) { acpi_add_table(table_offsets, tables_blob); build_iort(tables_blob, tables->linker, vms); } From patchwork Thu Apr 3 15:18:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877934 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3322063wrs; Thu, 3 Apr 2025 08:23:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVCZEu00ZQdo4W6UjKWaayrpNA66ye7cWKyAu9agDXdAqLckOJrx402jb6S+JS2vqhKFN5cuA==@linaro.org X-Google-Smtp-Source: AGHT+IESvfuSsNRT2/HD7QH2pJJsIgNgjzubpLJ2e7wzE5VcmWMa8pTS1ggUKTe4uqLhhP7DhaAZ X-Received: by 2002:a05:600c:3150:b0:43c:ea36:9840 with SMTP id 5b1f17b1804b1-43ec14cd59fmr24389565e9.22.1743693794840; Thu, 03 Apr 2025 08:23:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693794; cv=none; d=google.com; s=arc-20240605; b=TTgXlqaTrXaSJc0cVA1YI+X5N4myWu+hMeQNba/TOh/lez81lxkeU2Ut343xCgLEOS vNvIOoPDmBLBp5j+yiUSr89eeDxqpJBMSl6F8ZhfhyUPNkveq/Xptqp29F9ORV+aBClB BGGQDBwxTNVz6G3ND/E6g738lTKCIH1WWf0TmHylyi3DtdhVXQVPcb6xIIFIWYGbvU5n lYnG1wt6lKAWl4ZVe+J/Bx+UDegiTwYyy6l6fsnb3TdQXxtixOklIQgRcHNYLpIkfs8P KBWvPp/rFUQMDQY0Ge3hYpSCw7Hwskb6FDOxvrX7lPnk7C7NAJUOdAFqQsFXax1jXPCK eKmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=s0+RprBk/o3T2/onsX07N6cNtjoQucUjnD/IYou/K+s=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=WznlwqgjmxhiEFJcket+Vh3YmPZfw5aAhbe+XfrnOAe+WMdSmvT9BCzpo+kXFWwKLm ree/st6lx2wRzZnHwHoPJI4B6+hKGNYuGXJlXU/y4z70FjmZCxgVkG1tcoZBR+/MpYwH wWr3AO2pMqD2fCUW0Z61qQ/uK/Z25UFddnSg2sTThDZ6WT6INRQdGyFCRuTA8fX9SgAo PNMHWSUJEb60XC2/p+GHS4P98h/GGPPSJLnpRalivF/TQ4W7HIEDKVB2XKUCVPvLEU41 tYZJ1RkTHfRG2pCD9RgjOgYUo+LUsSS39u4wB374ZGTTC/27fpKs+Jr1XEABmgWYVokc FWIw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zg7nbwWv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec36691b3sm21460425e9.34.2025.04.03.08.19.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 08/14] hw/arm/virt: Simplify create_its() Date: Thu, 3 Apr 2025 17:18:23 +0200 Message-ID: <20250403151829.44858-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org No need to strstr() check the class name when we can use kvm_irqchip_in_kernel(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/virt.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c0748cbb95a..d17755548e8 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -711,21 +711,15 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms) static void create_its(VirtMachineState *vms) { VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); - const char *itsclass = its_class_name(); DeviceState *dev; - if (!strcmp(itsclass, "arm-gicv3-its")) { - if (!vmc->no_tcg_its) { - itsclass = NULL; - } - } - - if (!itsclass) { + assert(!vmc->no_its); + if (!kvm_irqchip_in_kernel() && !vmc->no_tcg_its) { /* Do nothing if not supported */ return; } - dev = qdev_new(itsclass); + dev = qdev_new(its_class_name()); object_property_set_link(OBJECT(dev), "parent-gicv3", OBJECT(vms->gic), &error_abort); From patchwork Thu Apr 3 15:18:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877927 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3320693wrs; Thu, 3 Apr 2025 08:20:38 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUJ45LWHR0nk4Z5XEKO9+RXj/f41azc4NnZhLFPBELEXUGsmEj+vtpbXzIANHxeCY0ITt6tlg==@linaro.org X-Google-Smtp-Source: AGHT+IG2p9T14J1GlM0lhYT/DIRr+gDdNLbGJevnheA7Gjv3/R5/N/34aAqdpDdDctwGGRZKqjTb X-Received: by 2002:a05:622a:40e:b0:476:78a8:4356 with SMTP id d75a77b69052e-477e4ba946dmr256172271cf.26.1743693637958; Thu, 03 Apr 2025 08:20:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693637; cv=none; d=google.com; s=arc-20240605; b=QeLFNOHgcbKSTsWxdd7UcWl+oi+9G1RHF6kapNls6x0nWJgITfFkq0fHfKBvJkoqCm GgFLBYb0mO2EaIe5atBRAzR5cILv1eHru8DvVqG5xysjrqM+nGuBYLyHzQKZ4Dj9pjIE MEhlgH0Hc8vhSIonBzsjAM7i26aB8XvtcR9TNqeWQA4Bt8f0G4NPHZ08tt1b+46nJbkR nGWy642m8zRtG7Wwt2V15seL73zljh3zFPX4a3Dagkl67Ck366he5m4WODB8LIkADIRj bzPENZSn51RZyQmBP/E1JLIkeqx2bxNq1T3oQ263NyBPNxi3UYFEbGkHJB3AcpdclLqs eqxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=oEde1hNJ4ybKOdNMShnxkmNSbB2tItcMj9l8T50o98M=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=kQuNoM+br/LQzTHmKO7lMmuALfHlSTY9C8CuyemED2ybULTdkfDqKBH4a1MZUtM+L1 IKuJmYx3N7jObVSRMA5TBvo3lkC+yl9SudHJdT8fEXbhGbsKxDi35dE+TaiccpZuVP6l 8U4YLMMgt0HiWwdeIZ9IAHAhgSy+TlqnYfD39lE+fWPGH1D04UGFf/ACi8whmqHulSXr 8qGGOSG1iD5LCwVj6v5w6PJ4/fqKe0mMkyHMJ+8SH6qOdBR7cbSs/eAl3bKbDaCc/x81 AoHyRq5X50ishXV/i0rzA9tD/yfxAMIcRbYVMoOVlxmlbKxuhljTSk/Q1d4wBMXbPfzu Fv1Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bVVFFccN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30227e3bsm2042053f8f.100.2025.04.03.08.19.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 09/14] hw/arm/virt-acpi: Factor its_enabled() helper out Date: Thu, 3 Apr 2025 17:18:24 +0200 Message-ID: <20250403151829.44858-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org GIC ITS is checked for the MADT and IORT tables. Factor the checks out to the its_enabled() helper. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gustavo Romero Reviewed-by: Richard Henderson --- hw/arm/virt-acpi-build.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9b7fc99f170..1c389ef5cdb 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -208,6 +208,13 @@ static void acpi_dsdt_add_tpm(Aml *scope, VirtMachineState *vms) #define ROOT_COMPLEX_ENTRY_SIZE 36 #define IORT_NODE_OFFSET 48 +static bool its_enabled(VirtMachineState *vms) +{ + VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); + + return !vmc->no_its; +} + /* * Append an ID mapping entry as described by "Table 4 ID mapping format" in * "IO Remapping Table System Software on ARM Platforms", Chapter 3. @@ -670,7 +677,6 @@ static void build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) { int i; - VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); const MemMapEntry *memmap = vms->memmap; AcpiTable table = { .sig = "APIC", .rev = 4, .oem_id = vms->oem_id, .oem_table_id = vms->oem_table_id }; @@ -741,7 +747,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) memmap[VIRT_HIGH_GIC_REDIST2].size); } - if (!vmc->no_its) { + if (its_enabled(vms)) { /* * ACPI spec, Revision 6.0 Errata A * (original 6.0 definition has invalid Length) @@ -973,7 +979,7 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) vms->oem_table_id); } - if (!vmc->no_its) { + if (its_enabled(vms)) { acpi_add_table(table_offsets, tables_blob); build_iort(tables_blob, tables->linker, vms); } From patchwork Thu Apr 3 15:18:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877936 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3322134wrs; Thu, 3 Apr 2025 08:23:23 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUfHIACad2FECxZMnR8Fa9NldBy9Oo3yTT3ztE4BRdOKJu7ccpaS3gaGu/sn1umOf1CCyi1xA==@linaro.org X-Google-Smtp-Source: AGHT+IGOVt0QFDTtDSjmTwouP39WU8pcd7QiIPl+fcaRh+tpoNdBjCFu18fhnGK6GjZbPQvSqsy4 X-Received: by 2002:a05:6000:1862:b0:39c:12ce:67d with SMTP id ffacd0b85a97d-39c29737ee3mr6397301f8f.9.1743693803783; Thu, 03 Apr 2025 08:23:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693803; cv=none; d=google.com; s=arc-20240605; b=N57uifx9/hD3JLg6cPYaqFBEJXz7V2HH0WgkShcP4aU3sIRrx2nxb3l5zENimpJcyx vAyaXEq4bQ0I1Vt54c2BUlQiQ7Npm78lRLYAb9nq/8Lcnt4k5BR9TiC9Y7eIcOTII/Vt p5Qxb/hQbdiCe0sskfgUXi6tBporNAN/7J431rFHU8RjDm7x9OaaqBxeOFV1ALJSJZ8V jyX0A6Yqy1aCVU990AjBTofWpzP7ZCYkdrQTkOSyLGyrK7uCXx28u7kIWxFENj1LB38x Qh1C04TQz/YjgctFyUF+/y4A9ebwoQfo+HX1pqg9pNs1jy7ueMho4RO0tIB4DNKFszDJ r2Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=877Ft8S2r+Y3e5owHO3tHYlDGhoIjLwtX0511Fk5+so=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=eIJM7/GVT9mUUzv1Mb20Mo5Fl9WAgJT4SN7ikG8BJ8SY7LInmtX0M0uUj4yGRVeCnD GqghMkhJJ3ViedhqxPgvsmwQdWVcYv+SGX3nYu4qhXEKktf21FBaivuBx+Y1eNxrf+Xm oMLJ4ar7QmY/vnA6Y7XEVhuTUdfq0l8b4MmMxDDIzawLTZWWZVLgqXFfNolxJgbOia1y WRzQI+FYXo4i0ISqzkao6OEVmkcuNEatgyz5PCXFUIJFYQxz/P/y0s4BwCYwy2x4U7m0 kqb1XCjAWJAqXF1pjnhaDTgCJbvY9CvWBupJecb6XAfi8wbFsj+GKkfUH7nHKOaemAYi exjw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=bMH6Zeoj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=fail header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1663053sm24538415e9.15.2025.04.03.08.19.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 10/14] qtest/bios-tables-test: Add test for -M virt, its=off Date: Thu, 3 Apr 2025 17:18:25 +0200 Message-ID: <20250403151829.44858-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Add the use case reported as issue #2886 [*]. The test passes while it shouldn't. We are going to fix that in the following commits. [*] https://gitlab.com/qemu-project/qemu/-/issues/2886 Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/bios-tables-test.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 0a333ec4353..baaf199e01c 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -2146,6 +2146,25 @@ static void test_acpi_aarch64_virt_tcg_topology(void) free_test_data(&data); } +static void test_acpi_aarch64_virt_tcg_its_off(void) +{ + test_data data = { + .machine = "virt", + .arch = "aarch64", + .tcg_only = true, + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 128ULL * 1024 * 1024, + }; + + test_acpi_one("-cpu cortex-a57 " + "-M virtualization=on,secure=off " + "-M gic-version=max,its=off,iommu=smmuv3", &data); + free_test_data(&data); +} + static void test_acpi_q35_viot(void) { test_data data = { @@ -2577,6 +2596,8 @@ int main(int argc, char *argv[]) test_acpi_aarch64_virt_tcg_acpi_hmat); qtest_add_func("acpi/virt/topology", test_acpi_aarch64_virt_tcg_topology); + qtest_add_func("acpi/virt/its_off", + test_acpi_aarch64_virt_tcg_its_off); qtest_add_func("acpi/virt/numamem", test_acpi_aarch64_virt_tcg_numamem); qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp); From patchwork Thu Apr 3 15:18:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877935 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3322067wrs; Thu, 3 Apr 2025 08:23:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXGFVJThZkC9WNQULbOWknaA0pSafYRzDV4OiA5JXr/bj9ZGXJ2P7TIKTIvEBjhQSbVFhXzLA==@linaro.org X-Google-Smtp-Source: AGHT+IGj/LFIVKr7+JPLY64JWA1AKphsapL/Ip6WzaKrAoZdQ8T9GYpa4RM0NHM8JL3RjkOrTn7p X-Received: by 2002:a05:600c:3d13:b0:43b:c0fa:f9dd with SMTP id 5b1f17b1804b1-43ec4438bc7mr25088025e9.25.1743693795331; Thu, 03 Apr 2025 08:23:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693795; cv=none; d=google.com; s=arc-20240605; b=MZylUR14xAMSkTqbZKLioPfFQaL1W+wiYFfJOzRNbTh3Fv88xBql2VBtYVBmFnoPX/ qG4/I7XLv2eg/WSTOtYsoxrWm6V7vIZA2UKtzmyIjvLCpLjbYmWM3owtIhIo6RGjucNU Icqld24Tx5bvguW2uJxTWTr0rjmj+q/zj38p96jCKsIn7kCMaAsUE3U9KvyfBwjdWxDG kqjC6nBlDVMnanypvTlik9iknuNPhNn7+Gru6Du+i3dfFdOOlwjlgW3IPHqEOT8PI2gv 6KwhcDK9gpjg656Jdog+qhgOmSlX9TEWGNbcHQ3QMh2sOTf+xooIGRVMb84+qqfzLkI9 E6lQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MLYRdVVgThynsCkkZUPojC5QmxuF1gOqeLFrpCloSHE=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=JxbdQlsvDKkLZAf6aITWIgRy3cvfG19KDGgawrykv9uuO+fA1vUe9MoewNKC5GmrmU xDgtKhjM5KX8XApbjIaxqiIodVgoZK6GqFxO75umfVTrIgWOsU9qvJssTEF6x1Cmqixw itwy2J75cBS+6bGOChdRIyTz386FO61OVdaT+Eko9eNe9gbkxa+HelT7iFlUIQJKek4d ranpjkjyyJ2mAClgDGv0fr8Gn7YNcfCCnGFKgtck0LRDpBNL+EJi9atZ+FVSNKX1OkH5 PbWJKaIs/x9x+106Rkps2mMjZPTjihUUzmol3n2WTYZpFLTjKOr/Q2DesX75HRTsYqX+ Nwtg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U2rOJQ2L; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30096b9csm2088473f8f.13.2025.04.03.08.19.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 11/14] qtest/bios-tables-test: Whitelist aarch64/virt 'its_off' variant blobs Date: Thu, 3 Apr 2025 17:18:26 +0200 Message-ID: <20250403151829.44858-12-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We are going to fix the test_acpi_aarch64_virt_tcg_its_off() test. In preparation, copy the ACPI tables which will be altered as 'its_off' variants, and whitelist them. Reviewed-by: Gustavo Romero Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ tests/qtest/bios-tables-test.c | 1 + tests/data/acpi/aarch64/virt/APIC.its_off | Bin 0 -> 184 bytes tests/data/acpi/aarch64/virt/FACP.its_off | Bin 0 -> 276 bytes tests/data/acpi/aarch64/virt/IORT.its_off | Bin 0 -> 236 bytes 5 files changed, 4 insertions(+) create mode 100644 tests/data/acpi/aarch64/virt/APIC.its_off create mode 100644 tests/data/acpi/aarch64/virt/FACP.its_off create mode 100644 tests/data/acpi/aarch64/virt/IORT.its_off GIT binary patch literal 236 zcmebD4+?q1z`(#9?&R<65v<@85#X!<1dKp25F11@1F-=RgMkDCNC*yK9F_TjFfcO#g+N#Zh@s|zoCF3AP#UU@ R!2`+%Dg6Hr$N|zYvjDIZ5CH%H literal 0 HcmV?d00001 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8bf..3421dd5adf3 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/aarch64/virt/APIC.its_off", +"tests/data/acpi/aarch64/virt/FACP.its_off", +"tests/data/acpi/aarch64/virt/IORT.its_off", diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index baaf199e01c..55366bf4956 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -2151,6 +2151,7 @@ static void test_acpi_aarch64_virt_tcg_its_off(void) test_data data = { .machine = "virt", .arch = "aarch64", + .variant = ".its_off", .tcg_only = true, .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", diff --git a/tests/data/acpi/aarch64/virt/APIC.its_off b/tests/data/acpi/aarch64/virt/APIC.its_off new file mode 100644 index 0000000000000000000000000000000000000000..c37d05d6e05805304f10afe73eb7cb9100fcccfa GIT binary patch literal 184 zcmZ<^@O0k6z`($=+{xeBBUr&HBEVSz2pEB4AU24G0Uik$i-7~iVgWL^17JJ`2AFzr bgb+@aBn}xq0gwb2)Q)cq{30-g9B_L93G4|0 literal 0 HcmV?d00001 diff --git a/tests/data/acpi/aarch64/virt/FACP.its_off b/tests/data/acpi/aarch64/virt/FACP.its_off new file mode 100644 index 0000000000000000000000000000000000000000..606dac3fe4b55c31fd68b25d3a4127eeef227434 GIT binary patch literal 276 zcmZ>BbPf< X-Patchwork-Id: 877933 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3322017wrs; Thu, 3 Apr 2025 08:23:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUwJdFsXLn/xgjfZ38RhoTPUD6mpGvRBSfegYD+6vaOpkiBAlM6YWqJzliilS/pRbxZ/AP0Kw==@linaro.org X-Google-Smtp-Source: AGHT+IEzXlaLXArGN4fUFbQLF7IzBUkp9qkNgb7YuZifgZwmcgmBTiARsUw+peOFizuJbw45kaCu X-Received: by 2002:a05:622a:1116:b0:476:89d2:8243 with SMTP id d75a77b69052e-4791961be65mr40582541cf.37.1743693790399; Thu, 03 Apr 2025 08:23:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693790; cv=none; d=google.com; s=arc-20240605; b=YDfh7X4vqDRmIWQ8HqygYanP6is8iOfs23K6Fy86Qa2iRgE8SYbltmU22OD1JE4Wxf fVUCCyrxkQU/M6NoqqYqdPCO/KqSW3F595VKlpiJN/KtZ62mRvkUBocqweZK5MTAcOl1 Gf8JbX19nOtnIXKply72xaejDKjY0kReRLazjMqrjQ/YkdCmyZz1gm0xeLm3jznJOJ1Q DyAU1T1GKy2BY/KCD6wNmm067HI76Lzg3jbOKqd0wqd47D9AlavBHWDBi8Pfl7uUsaWt BP1GjAuSSwDPc92sm76vUPRT49tKbkT8zK5QVizF6izYvH7TC7exNq7fDGbnpoNOdPuX FilA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=AzIe1y6exrD0xJczT8npcuq1OBfi7eudR1jNiJ2MiPM=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=AniGfA0M3QwilSUfv7Cscul0CP0poMUZIc3GWZqghmMk8aMjKJ1QJ53/0hekYNrgSY iqigyhViB4Xj5LIqDZ2HaEqpKpsftNON50rzTUi0y9P0/Zkmf4pKvQwwa0rBWx3D4+gU Yn+DxYcgdRkBMxJxtGMAhD1FkQGIHKi4D3q9jzrc9WuHIstQndQxfptg0xyY/k604FoR KTAtRjnivXPlSZvQim9ofVw5btNIPGVc2CPtfNPr2/xG2pFp18DKlQgreFNPIEWapCxy kPRhhflP0IsJbsq+R/B3SERRHBzkgDhc/sqKa8uZN7M2ZWyj6BxBM23qcGEX/vpEchJb wBvw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rtMFTxNa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c30226acfsm2003872f8f.88.2025.04.03.08.19.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 12/14] hw/arm/virt-acpi: Always build IORT table (even with GIC ITS disabled) Date: Thu, 3 Apr 2025 17:18:27 +0200 Message-ID: <20250403151829.44858-13-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Citing Gustavo [*]: Gating IORT table generation entirely based on the presence of ITS looks wrong because IORT table has data beyond GIC ITS, like for SMMUv3 etc.. [*] https://lore.kernel.org/qemu-devel/bae6e29a-7290-47d2-8caf-14702ee091f0@linaro.org/ Reported-by: Gustavo Romero Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/virt-acpi-build.c | 38 +++++++++++++++++++++----------------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 1c389ef5cdb..e7e27951cb9 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -287,6 +287,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) uint32_t id = 0; GArray *smmu_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); GArray *its_idmaps = g_array_new(false, true, sizeof(AcpiIortIdMapping)); + bool has_its = its_enabled(vms); AcpiTable table = { .sig = "IORT", .rev = 3, .oem_id = vms->oem_id, .oem_table_id = vms->oem_table_id }; @@ -325,9 +326,12 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) nb_nodes = 3; /* RC, ITS, SMMUv3 */ rc_mapping_count = smmu_idmaps->len + its_idmaps->len; - } else { + } else if (has_its) { nb_nodes = 2; /* RC, ITS */ rc_mapping_count = 1; + } else { + nb_nodes = 1; /* RC */ + rc_mapping_count = 1; } /* Number of IORT Nodes */ build_append_int_noprefix(table_data, nb_nodes, 4); @@ -336,17 +340,19 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, IORT_NODE_OFFSET, 4); build_append_int_noprefix(table_data, 0, 4); /* Reserved */ - /* Table 12 ITS Group Format */ - build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */ - node_size = 20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier */; - build_append_int_noprefix(table_data, node_size, 2); /* Length */ - build_append_int_noprefix(table_data, 1, 1); /* Revision */ - build_append_int_noprefix(table_data, id++, 4); /* Identifier */ - build_append_int_noprefix(table_data, 0, 4); /* Number of ID mappings */ - build_append_int_noprefix(table_data, 0, 4); /* Reference to ID Array */ - build_append_int_noprefix(table_data, 1, 4); /* Number of ITSs */ - /* GIC ITS Identifier Array */ - build_append_int_noprefix(table_data, 0 /* MADT translation_id */, 4); + if (has_its) { + /* Table 12 ITS Group Format */ + build_append_int_noprefix(table_data, 0 /* ITS Group */, 1); /* Type */ // + node_size = 20 /* fixed header size */ + 4 /* 1 GIC ITS Identifier */; + build_append_int_noprefix(table_data, node_size, 2); /* Length */ + build_append_int_noprefix(table_data, 1, 1); /* Revision */ + build_append_int_noprefix(table_data, id++, 4); /* Identifier */ + build_append_int_noprefix(table_data, 0, 4); /* Number of ID mappings */ + build_append_int_noprefix(table_data, 0, 4); /* Reference to ID Array */ + build_append_int_noprefix(table_data, 1, 4); /* Number of ITSs */ + /* GIC ITS Identifier Array */ + build_append_int_noprefix(table_data, 0 /* MADT translation_id */, 4); + } if (vms->iommu == VIRT_IOMMU_SMMUV3) { int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; @@ -429,7 +435,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_iort_id_mapping(table_data, range->input_base, range->id_count, IORT_NODE_OFFSET); } - } else { + } else if (has_its) { /* output IORT node is the ITS group node (the first node) */ build_iort_id_mapping(table_data, 0, 0x10000, IORT_NODE_OFFSET); } @@ -979,10 +985,8 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) vms->oem_table_id); } - if (its_enabled(vms)) { - acpi_add_table(table_offsets, tables_blob); - build_iort(tables_blob, tables->linker, vms); - } + acpi_add_table(table_offsets, tables_blob); + build_iort(tables_blob, tables->linker, vms); #ifdef CONFIG_TPM if (tpm_get_version(tpm_find()) == TPM_VERSION_2_0) { From patchwork Thu Apr 3 15:18:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877929 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3321003wrs; Thu, 3 Apr 2025 08:21:13 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWOjprrRi540WLQUay65Eu4SNNYIEjm1Vs01KDJjGMSz3/WGG+CdcoWhUAOwN268R+YO/wMdw==@linaro.org X-Google-Smtp-Source: AGHT+IFS1jtlJlhU4rqQO2j8uTIUW+pMaKgJHQo9SlWPz06jUVkvACa3vte0vVQ6+fK7UA+STzGO X-Received: by 2002:ad4:5dcb:0:b0:6d8:9062:6616 with SMTP id 6a1803df08f44-6ef0dbd2dd5mr51884486d6.7.1743693672655; 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec16602bbsm24505315e9.9.2025.04.03.08.19.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:19:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 13/14] hw/arm/virt-acpi: Do not advertise disabled GIC ITS Date: Thu, 3 Apr 2025 17:18:28 +0200 Message-ID: <20250403151829.44858-14-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org GIC ITS can be disabled at runtime using '-M its=off', which sets VirtMachineState::its = false. Check this field to avoid advertising the ITS in the MADT table. Reported-by: Udo Steinberg Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2886 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gustavo Romero --- hw/arm/virt-acpi-build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index e7e27951cb9..38a9e6fe0c5 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -212,7 +212,7 @@ static bool its_enabled(VirtMachineState *vms) { VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); - return !vmc->no_its; + return !vmc->no_its && vms->its; } /* From patchwork Thu Apr 3 15:18:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 877932 Delivered-To: patch@linaro.org Received: by 2002:a5d:6dae:0:b0:38f:210b:807b with SMTP id u14csp3321833wrs; Thu, 3 Apr 2025 08:22:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVOoUc5c97HRY/wmnZUdu+6ZlTNuM/kIR+oIcIRViaDehbPQ0/ADeDjbN7twwvYCNWbCIfkxQ==@linaro.org X-Google-Smtp-Source: AGHT+IG5+kosGfHDtI2ohek+QMTkkKSEVhj9UdsqG/aX043B21HzUd1S7cvOuC8xZ/xhrKReHvsk X-Received: by 2002:a05:6102:3307:b0:4c4:df56:6a2b with SMTP id ada2fe7eead31-4c839df78c3mr6175046137.4.1743693764928; Thu, 03 Apr 2025 08:22:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1743693764; cv=none; d=google.com; s=arc-20240605; b=G+2Q/4zda7P0cVqmvhAsJciG5UFNLhHt2qKOV49t1ZyMGajyIVR9oO8e21WcI7s0QE awgo/cvo4p9FNM/YF2E1s4kGk3HDD6lOoSvgUx9eK1WX/0vIVUPzjk3YTpRjXSCAfBZS U67ypO5cQ4Q0sNXdhnl13YU4WAHo1yz3hGCyio07NEfl6wA6Tq1nGt93piA0o6ZI6+DI V2n+3Jh4EWAN65pJfqaln4uXxIR3aCkCQCv1GgQopoFRZb/oYrPgyQtpIsupMTwaKAyi IccQ8FwGBjKNysJGezoTpTkhVGGoO6NZtVgxIljJhPPMWp9FgjVXnHGexShfwSZcCGjT GKnA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5zTfaj2srAh7NFFgFGPtQA78JVUrBzadEZv8Wvdm4mc=; fh=uZabDrQmZm0L+6w9TkaKSHx4mVelHvsyKGr5umV4YlI=; b=TLe1Jr4xAVYhxEGWBEkN2jwbcibGgUCii0o89POhgl+3ABC5/7XoI1ffrhJMusSsbh 6EjBfCeZUPlxz/8bvMSNo+qdhpkTvO9fhqGYPKyO2f1N0LZON7FyM657yQIqvvZR+ldK wKZ7PE5mB5x3NpgFWc0KY98V2qO/shCk3ErWSdwDBFwA35JY597zNYidRw+iSkqvTlax 2IMqtTnddHHuw3Sta31fZQKQIJqWKRzyEjtfX7lwhM78k/6Bf6NMabP63tyJ90LpzmkL woqMk7bn+NFZvoudjdG95xA+v7+OHnyHQZvnzIxwE8HKwfkpNy4lexhQ8TY/Hh9phiXs BNDw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="rfx/oM2L"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[92.88.171.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec3174cf0sm22355905e9.0.2025.04.03.08.20.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 03 Apr 2025 08:20:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gustavo Romero , Peter Maydell , Laurent Vivier , Ani Sinha , Udo Steinberg , "Michael S. Tsirkin" , qemu-arm@nongnu.org, Paolo Bonzini , Igor Mammedov , Andrew Jones , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Fabiano Rosas , =?utf-8?q?Alex_Benn=C3=A9e?= , Shannon Zhao Subject: [PATCH-for-10.0? v2 14/14] qtest/bios-tables-test: Update aarch64/virt 'its_off' variant blobs Date: Thu, 3 Apr 2025 17:18:29 +0200 Message-ID: <20250403151829.44858-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250403151829.44858-1-philmd@linaro.org> References: <20250403151829.44858-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Commit the blobs generated by tests/data/acpi/rebuild-expected-aml.sh. Changes in the tables: @@ -1,32 +1,32 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20240927 (64-bit version) * Copyright (c) 2000 - 2023 Intel Corporation * * Disassembly of tests/data/acpi/aarch64/virt/APIC.its_off * * ACPI Data Table [APIC] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "APIC" [Multiple APIC Description Table (MADT)] -[004h 0004 004h] Table Length : 000000B8 +[004h 0004 004h] Table Length : 000000A4 [008h 0008 001h] Revision : 04 -[009h 0009 001h] Checksum : A7 +[009h 0009 001h] Checksum : EE [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 [024h 0036 004h] Local Apic Address : 00000000 [028h 0040 004h] Flags (decoded below) : 00000000 PC-AT Compatibility : 0 [02Ch 0044 001h] Subtable Type : 0C [Generic Interrupt Distributor] [02Dh 0045 001h] Length : 18 [02Eh 0046 002h] Reserved : 0000 [030h 0048 004h] Local GIC Hardware ID : 00000000 [034h 0052 008h] Base Address : 0000000008000000 [03Ch 0060 004h] Interrupt Base : 00000000 @@ -49,37 +49,29 @@ [06Ch 0108 008h] Virtual GIC Base Address : 0000000000000000 [074h 0116 008h] Hypervisor GIC Base Address : 0000000000000000 [07Ch 0124 004h] Virtual GIC Interrupt : 00000019 [080h 0128 008h] Redistributor Base Address : 0000000000000000 [088h 0136 008h] ARM MPIDR : 0000000000000000 [090h 0144 001h] Efficiency Class : 00 [091h 0145 001h] Reserved : 00 [092h 0146 002h] SPE Overflow Interrupt : 0000 [094h 0148 002h] TRBE Interrupt : 100E [094h 0148 001h] Subtable Type : 0E [Generic Interrupt Redistributor] [095h 0149 001h] Length : 10 [097h 0151 002h] Reserved : 0000 [098h 0152 008h] Base Address : 00000000080A0000 [0A0h 0160 004h] Length : 00F60000 -[0A4h 0164 001h] Subtable Type : 0F [Generic Interrupt Translator] -[0A5h 0165 001h] Length : 14 -[0A7h 0167 002h] Reserved : 0000 -[0A8h 0168 004h] Translation ID : 00000000 -[0ACh 0172 008h] Base Address : 0000000008080000 -[0B4h 0180 004h] Reserved : 00000000 +Raw Table Data: Length 164 (0xA4) -Raw Table Data: Length 184 (0xB8) - - 0000: 41 50 49 43 B8 00 00 00 04 A7 42 4F 43 48 53 20 // APIC......BOCHS + 0000: 41 50 49 43 A4 00 00 00 04 EE 42 4F 43 48 53 20 // APIC......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 0C 18 00 00 // ................ 0030: 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 00 // ................ 0040: 04 00 00 00 0B 50 00 00 00 00 00 00 00 00 00 00 // .....P.......... 0050: 01 00 00 00 00 00 00 00 17 00 00 00 00 00 00 00 // ................ 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 00 00 00 00 00 00 00 00 00 00 19 00 00 00 // ................ 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 0E 10 00 00 00 00 0A 08 00 00 00 00 // ................ - 00A0: 00 00 F6 00 0F 14 00 00 00 00 00 00 00 00 08 08 // ................ - 00B0: 00 00 00 00 00 00 00 00 // ........ + 00A0: 00 00 F6 00 // .... /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20240927 (64-bit version) * Copyright (c) 2000 - 2023 Intel Corporation * * Disassembly of tests/data/acpi/aarch64/virt/FACP * * ACPI Data Table [FACP] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "FACP" [Fixed ACPI Description Table (FADT)] [004h 0004 004h] Table Length : 00000114 [008h 0008 001h] Revision : 06 -[009h 0009 001h] Checksum : 12 +[009h 0009 001h] Checksum : 14 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 [024h 0036 004h] FACS Address : 00000000 [028h 0040 004h] DSDT Address : 00000000 [02Ch 0044 001h] Model : 00 [02Dh 0045 001h] PM Profile : 00 [Unspecified] [02Eh 0046 002h] SCI Interrupt : 0000 [030h 0048 004h] SMI Command Port : 00000000 [034h 0052 001h] ACPI Enable Value : 00 [035h 0053 001h] ACPI Disable Value : 00 [036h 0054 001h] S4BIOS Command : 00 [037h 0055 001h] P-State Control : 00 @@ -82,35 +82,35 @@ Use Platform Timer (V4) : 0 RTC_STS valid on S4 wake (V4) : 0 Remote Power-on capable (V4) : 0 Use APIC Cluster Model (V4) : 0 Use APIC Physical Destination Mode (V4) : 0 Hardware Reduced (V5) : 1 Low Power S0 Idle (V5) : 0 [074h 0116 00Ch] Reset Register : [Generic Address Structure] [074h 0116 001h] Space ID : 00 [SystemMemory] [075h 0117 001h] Bit Width : 00 [076h 0118 001h] Bit Offset : 00 [077h 0119 001h] Encoded Access Width : 00 [Undefined/Legacy] [078h 0120 008h] Address : 0000000000000000 [080h 0128 001h] Value to cause reset : 00 -[081h 0129 002h] ARM Flags (decoded below) : 0003 +[081h 0129 002h] ARM Flags (decoded below) : 0001 PSCI Compliant : 1 - Must use HVC for PSCI : 1 + Must use HVC for PSCI : 0 [083h 0131 001h] FADT Minor Revision : 03 [084h 0132 008h] FACS Address : 0000000000000000 [08Ch 0140 008h] DSDT Address : 0000000000000000 [094h 0148 00Ch] PM1A Event Block : [Generic Address Structure] [094h 0148 001h] Space ID : 00 [SystemMemory] [095h 0149 001h] Bit Width : 00 [096h 0150 001h] Bit Offset : 00 [097h 0151 001h] Encoded Access Width : 00 [Undefined/Legacy] [098h 0152 008h] Address : 0000000000000000 [0A0h 0160 00Ch] PM1B Event Block : [Generic Address Structure] [0A0h 0160 001h] Space ID : 00 [SystemMemory] [0A1h 0161 001h] Bit Width : 00 [0A2h 0162 001h] Bit Offset : 00 [0A3h 0163 001h] Encoded Access Width : 00 [Undefined/Legacy] @@ -164,34 +164,34 @@ [0F5h 0245 001h] Bit Width : 00 [0F6h 0246 001h] Bit Offset : 00 [0F7h 0247 001h] Encoded Access Width : 00 [Undefined/Legacy] [0F8h 0248 008h] Address : 0000000000000000 [100h 0256 00Ch] Sleep Status Register : [Generic Address Structure] [100h 0256 001h] Space ID : 00 [SystemMemory] [101h 0257 001h] Bit Width : 00 [102h 0258 001h] Bit Offset : 00 [103h 0259 001h] Encoded Access Width : 00 [Undefined/Legacy] [104h 0260 008h] Address : 0000000000000000 [10Ch 0268 008h] Hypervisor ID : 00000000554D4551 Raw Table Data: Length 276 (0x114) - 0000: 46 41 43 50 14 01 00 00 06 12 42 4F 43 48 53 20 // FACP......BOCHS + 0000: 46 41 43 50 14 01 00 00 06 14 42 4F 43 48 53 20 // FACP......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0070: 00 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0080: 00 03 00 03 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 01 00 03 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 00F0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ 0100: 00 00 00 00 00 00 00 00 00 00 00 00 51 45 4D 55 // ............QEMU 0110: 00 00 00 00 // .... @@ -1,122 +1,111 @@ /* * Intel ACPI Component Architecture * AML/ASL+ Disassembler version 20240927 (64-bit version) * Copyright (c) 2000 - 2023 Intel Corporation * * Disassembly of tests/data/acpi/aarch64/virt/IORT.its_off * * ACPI Data Table [IORT] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue (in hex) */ [000h 0000 004h] Signature : "IORT" [IO Remapping Table] -[004h 0004 004h] Table Length : 000000EC +[004h 0004 004h] Table Length : 000000D4 [008h 0008 001h] Revision : 03 -[009h 0009 001h] Checksum : 57 +[009h 0009 001h] Checksum : A3 [00Ah 0010 006h] Oem ID : "BOCHS " [010h 0016 008h] Oem Table ID : "BXPC " [018h 0024 004h] Oem Revision : 00000001 [01Ch 0028 004h] Asl Compiler ID : "BXPC" [020h 0032 004h] Asl Compiler Revision : 00000001 [024h 0036 004h] Node Count : 00000003 [028h 0040 004h] Node Offset : 00000030 [02Ch 0044 004h] Reserved : 00000000 -[030h 0048 001h] Type : 00 -[031h 0049 002h] Length : 0018 -[033h 0051 001h] Revision : 01 +[030h 0048 001h] Type : 04 +[031h 0049 002h] Length : 0058 +[033h 0051 001h] Revision : 04 [034h 0052 004h] Identifier : 00000000 -[038h 0056 004h] Mapping Count : 00000000 -[03Ch 0060 004h] Mapping Offset : 00000000 +[038h 0056 004h] Mapping Count : 00000001 +[03Ch 0060 004h] Mapping Offset : 00000044 -[040h 0064 004h] ItsCount : 00000001 -[044h 0068 004h] Identifiers : 00000000 - -[048h 0072 001h] Type : 04 -[049h 0073 002h] Length : 0058 -[04Bh 0075 001h] Revision : 04 -[04Ch 0076 004h] Identifier : 00000001 -[050h 0080 004h] Mapping Count : 00000001 -[054h 0084 004h] Mapping Offset : 00000044 - -[058h 0088 008h] Base Address : 0000000009050000 -[060h 0096 004h] Flags (decoded below) : 00000001 +[040h 0064 008h] Base Address : 0000000009050000 +[048h 0072 004h] Flags (decoded below) : 00000001 COHACC Override : 1 HTTU Override : 0 Proximity Domain Valid : 0 DeviceID Valid : 0 -[064h 0100 004h] Reserved : 00000000 -[068h 0104 008h] VATOS Address : 0000000000000000 -[070h 0112 004h] Model : 00000000 -[074h 0116 004h] Event GSIV : 0000006A -[078h 0120 004h] PRI GSIV : 0000006B -[07Ch 0124 004h] GERR GSIV : 0000006D -[080h 0128 004h] Sync GSIV : 0000006C -[084h 0132 004h] Proximity Domain : 00000000 -[088h 0136 004h] Device ID Mapping Index : 00000000 +[04Ch 0076 004h] Reserved : 00000000 +[050h 0080 008h] VATOS Address : 0000000000000000 +[058h 0088 004h] Model : 00000000 +[05Ch 0092 004h] Event GSIV : 0000006A +[060h 0096 004h] PRI GSIV : 0000006B +[064h 0100 004h] GERR GSIV : 0000006D +[068h 0104 004h] Sync GSIV : 0000006C +[06Ch 0108 004h] Proximity Domain : 00000000 +[070h 0112 004h] Device ID Mapping Index : 00000000 -[08Ch 0140 004h] Input base : 00000000 -[090h 0144 004h] ID Count : 0000FFFF -[094h 0148 004h] Output Base : 00000000 -[098h 0152 004h] Output Reference : 00000030 -[09Ch 0156 004h] Flags (decoded below) : 00000000 +[074h 0116 004h] Input base : 00000000 +[078h 0120 004h] ID Count : 0000FFFF +[07Ch 0124 004h] Output Base : 00000000 +[080h 0128 004h] Output Reference : 00000030 +[084h 0132 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[0A0h 0160 001h] Type : 02 -[0A1h 0161 002h] Length : 004C -[0A3h 0163 001h] Revision : 03 -[0A4h 0164 004h] Identifier : 00000002 -[0A8h 0168 004h] Mapping Count : 00000002 -[0ACh 0172 004h] Mapping Offset : 00000024 +[088h 0136 001h] Type : 02 +[089h 0137 002h] Length : 004C +[08Bh 0139 001h] Revision : 03 +[08Ch 0140 004h] Identifier : 00000001 +[090h 0144 004h] Mapping Count : 00000002 +[094h 0148 004h] Mapping Offset : 00000024 -[0B0h 0176 008h] Memory Properties : [IORT Memory Access Properties] -[0B0h 0176 004h] Cache Coherency : 00000001 -[0B4h 0180 001h] Hints (decoded below) : 00 +[098h 0152 008h] Memory Properties : [IORT Memory Access Properties] +[098h 0152 004h] Cache Coherency : 00000001 +[09Ch 0156 001h] Hints (decoded below) : 00 Transient : 0 Write Allocate : 0 Read Allocate : 0 Override : 0 -[0B5h 0181 002h] Reserved : 0000 -[0B7h 0183 001h] Memory Flags (decoded below) : 03 +[09Dh 0157 002h] Reserved : 0000 +[09Fh 0159 001h] Memory Flags (decoded below) : 03 Coherency : 1 Device Attribute : 1 Ensured Coherency of Accesses : 0 -[0B8h 0184 004h] ATS Attribute : 00000000 -[0BCh 0188 004h] PCI Segment Number : 00000000 -[0C0h 0192 001h] Memory Size Limit : 40 -[0C1h 0193 002h] PASID Capabilities : 0000 -[0C3h 0195 001h] Reserved : 00 +[0A0h 0160 004h] ATS Attribute : 00000000 +[0A4h 0164 004h] PCI Segment Number : 00000000 +[0A8h 0168 001h] Memory Size Limit : 40 +[0A9h 0169 002h] PASID Capabilities : 0000 +[0ABh 0171 001h] Reserved : 00 -[0C4h 0196 004h] Input base : 00000000 -[0C8h 0200 004h] ID Count : 000000FF -[0CCh 0204 004h] Output Base : 00000000 -[0D0h 0208 004h] Output Reference : 00000048 -[0D4h 0212 004h] Flags (decoded below) : 00000000 +[0ACh 0172 004h] Input base : 00000000 +[0B0h 0176 004h] ID Count : 000000FF +[0B4h 0180 004h] Output Base : 00000000 +[0B8h 0184 004h] Output Reference : 00000030 +[0BCh 0188 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -[0D8h 0216 004h] Input base : 00000100 -[0DCh 0220 004h] ID Count : 0000FEFF -[0E0h 0224 004h] Output Base : 00000100 -[0E4h 0228 004h] Output Reference : 00000030 -[0E8h 0232 004h] Flags (decoded below) : 00000000 +[0C0h 0192 004h] Input base : 00000100 +[0C4h 0196 004h] ID Count : 0000FEFF +[0C8h 0200 004h] Output Base : 00000100 +[0CCh 0204 004h] Output Reference : 00000030 +[0D0h 0208 004h] Flags (decoded below) : 00000000 Single Mapping : 0 -Raw Table Data: Length 236 (0xEC) +Raw Table Data: Length 212 (0xD4) - 0000: 49 4F 52 54 EC 00 00 00 03 57 42 4F 43 48 53 20 // IORT.....WBOCHS + 0000: 49 4F 52 54 D4 00 00 00 03 A3 42 4F 43 48 53 20 // IORT......BOCHS 0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC ....BXPC 0020: 01 00 00 00 03 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 0030: 00 18 00 01 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0040: 01 00 00 00 00 00 00 00 04 58 00 04 01 00 00 00 // .........X...... - 0050: 01 00 00 00 44 00 00 00 00 00 05 09 00 00 00 00 // ....D........... - 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ - 0070: 00 00 00 00 6A 00 00 00 6B 00 00 00 6D 00 00 00 // ....j...k...m... - 0080: 6C 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // l............... - 0090: FF FF 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... - 00A0: 02 4C 00 03 02 00 00 00 02 00 00 00 24 00 00 00 // .L..........$... - 00B0: 01 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00 // ................ - 00C0: 40 00 00 00 00 00 00 00 FF 00 00 00 00 00 00 00 // @............... - 00D0: 48 00 00 00 00 00 00 00 00 01 00 00 FF FE 00 00 // H............... - 00E0: 00 01 00 00 30 00 00 00 00 00 00 00 // ....0....... + 0030: 04 58 00 04 00 00 00 00 01 00 00 00 44 00 00 00 // .X..........D... + 0040: 00 00 05 09 00 00 00 00 01 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 00 00 00 00 00 00 00 00 6A 00 00 00 // ............j... + 0060: 6B 00 00 00 6D 00 00 00 6C 00 00 00 00 00 00 00 // k...m...l....... + 0070: 00 00 00 00 00 00 00 00 FF FF 00 00 00 00 00 00 // ................ + 0080: 30 00 00 00 00 00 00 00 02 4C 00 03 01 00 00 00 // 0........L...... + 0090: 02 00 00 00 24 00 00 00 01 00 00 00 00 00 00 03 // ....$........... + 00A0: 00 00 00 00 00 00 00 00 40 00 00 00 00 00 00 00 // ........@....... + 00B0: FF 00 00 00 00 00 00 00 30 00 00 00 00 00 00 00 // ........0....... + 00C0: 00 01 00 00 FF FE 00 00 00 01 00 00 30 00 00 00 // ............0... + 00D0: 00 00 00 00 // .... Signed-off-by: Philippe Mathieu-Daudé --- tests/qtest/bios-tables-test-allowed-diff.h | 3 --- tests/data/acpi/aarch64/virt/APIC.its_off | Bin 184 -> 164 bytes tests/data/acpi/aarch64/virt/IORT.its_off | Bin 236 -> 212 bytes 3 files changed, 3 deletions(-) diff --git a/tests/data/acpi/aarch64/virt/APIC.its_off b/tests/data/acpi/aarch64/virt/APIC.its_off index c37d05d6e05805304f10afe73eb7cb9100fcccfa..f24ac8fbff5261a52434abcfcff96dbdc7709de4 100644 GIT binary patch delta 18 ZcmdnNxP+0*F~HM#2?GNI%e#qOvj8xy1yKM1 delta 39 jcmZ3&xPy_)F~HM#2Ll5G%kqg_vqbnsfJ`vp;DE6Jpmzmj diff --git a/tests/data/acpi/aarch64/virt/IORT.its_off b/tests/data/acpi/aarch64/virt/IORT.its_off index 0fceb820d509e852ca0849baf568a8e93e426738..25f64407c4aac11bda2d1ac24cd8999a1d84c80d 100644 GIT binary patch delta 37 tcmaFEc!iP6(?2NW3IhWJ^WuqIYOE{~3@i*2eZv_UCoa`yG?;i%8UVn-3Gn~` delta 61 zcmcb@_=b_o(?2NW4FdxMbNECqHCYA;21XzU4qzOX2nH6$iKgL