From patchwork Tue Apr 1 02:06:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 877544 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7165214F9D6; Tue, 1 Apr 2025 02:06:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743473183; cv=none; b=dXHT+9620aEKAQUkM49cSo/waoNZkESFNZz46J6W+sykJOJ5IIzy/awUpFWyXKyfKjaPbvYGJuKTsis9+6+0wt9liImjXkfc+Ic3yP8FsBuHNKTJ6L8qorZFebwrW+7iPJ07lCFGoegMSBwU+R48Mzl7Akdz6f+4QfnPc2NnUww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743473183; c=relaxed/simple; bh=mzchwkYo8Cop0lyIAFbQzmQzlnagfFBZUWy82TqnAgE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=P8hUpASuJpj3/WJz+Tp7IBDN+HFSHfy1CQemFdcy34LbcEOu2LYcoSke7SWs6I5fXj+2TXk6EJBpPx7uHYJI1wFPW2UBBkb4dhvTvxTxEp70SZXdeY7op7nIZBxmiwTqNnOZa1O4AyAz5WwcmJF0Ap0KNOdV2eqNj2K2hZQVREI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mgJUkT2m; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mgJUkT2m" Received: by smtp.kernel.org (Postfix) with ESMTPS id 03CC5C4CEEA; Tue, 1 Apr 2025 02:06:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743473183; bh=mzchwkYo8Cop0lyIAFbQzmQzlnagfFBZUWy82TqnAgE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mgJUkT2mJn3PijYyDielrwg0coWbTgJZcQQsXx/i9URNKo4uc28aWCCBDE0cESPXw kAZQl4es5CLzOVI709ICNvokM/5sPuDNB8mt0dAy47xs9u5WLclSZ/13pT/ujtVnpf o1TFGoR6es9WJPNHUBHl/okuctAcAtlqb7wG3P/8tTmhyJF8qkQqk9Zw1o60hdDDVp 58VCXMj256/hz+rg1Sz44g5UUhK5BdZVaqI0fFQnP0ROZZNNWY5JPI3lxwCLWyBS9e tbc+8HVvRCA0hMZk+W198A+QM6yTzKTA3GdgdYovpSOfvlgc67RHenPahB4OtG53gO PtGQNBzzfKpFQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E55E1C36017; Tue, 1 Apr 2025 02:06:22 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Tue, 01 Apr 2025 10:06:21 +0800 Subject: [PATCH v2 1/2] dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250401-a5-pinctrl-v2-1-a136c1058379@amlogic.com> References: <20250401-a5-pinctrl-v2-0-a136c1058379@amlogic.com> In-Reply-To: <20250401-a5-pinctrl-v2-0-a136c1058379@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Xianwei Zhao , Conor Dooley X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1743473181; l=1067; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=Pz16Z/QIM4IDWi5UYrztmMtclbTkct1CDyubtK9KYn4=; b=tIqYXqlrL3cEMBuUkhDpDT5x01qWCw09VqlUKfVE39cA28tUMi3sre+NqfzZ/BF1MsNdR5Y+x JnrhDuK6GLjDEIESc2nkxjj654ABNisplxGeYWxPACxP6Q7yX2w4EQd X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Amlogic A5 SoCs uses the same pintrl controller as A4 SoCs. There is no need for an extra compatible line in the driver, but add A5 compatible line for documentation. Acked-by: Conor Dooley Signed-off-by: Xianwei Zhao --- Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml index 8eb50cad61d5..3bebccaf0c9f 100644 --- a/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml +++ b/Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml @@ -14,8 +14,12 @@ allOf: properties: compatible: - const: amlogic,pinctrl-a4 - + oneOf: + - const: amlogic,pinctrl-a4 + - items: + - enum: + - amlogic,pinctrl-a5 + - const: amlogic,pinctrl-a4 "#address-cells": const: 2 From patchwork Tue Apr 1 02:06:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao via B4 Relay X-Patchwork-Id: 877826 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7160F70820; Tue, 1 Apr 2025 02:06:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743473183; cv=none; b=u8g3k7Xi1q6VNcnBd3O5Vm3t8Z7t05f4shAmJdOM+63AC0+ALGEALOp31zdBUJTY6n+/KoErXGJyF5tKMaZ6NItJEqOfQKfwY4rRFmcy28fhIrNDiDq5776AkQqeyOLi/qV5u2RJUz253etctmgiwsED4/o/nUj2/rBZwnyriPs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1743473183; c=relaxed/simple; bh=cYPE4hxj2E/+XBZrJpUbI6pIfd/alhO++G3MPN6trQY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y/b5vYizErpwaoo4UP0N5p/iMaOuHC41Lge5jwoJEVjT/zo5tnrsb3t7eAFpRi+WeMik5DuFE98SFev5u51Cp51YCIBNrWG9h344mRHk9H/IwheO/INHXMv0q8MlJt9fIeGTGZOPrfHzsTHJSarLdY3YZfxbLSWBFrqr8b0YGOk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=AqPMWzwl; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="AqPMWzwl" Received: by smtp.kernel.org (Postfix) with ESMTPS id 113FAC4CEEB; Tue, 1 Apr 2025 02:06:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743473183; bh=cYPE4hxj2E/+XBZrJpUbI6pIfd/alhO++G3MPN6trQY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=AqPMWzwlWsUqmZy83x3slIc6sQteWFh83eKySr9JZg6qzB1ouy0uNnggC20Ak5FMo O44zo+zJokKWYXyNdudv2Bq5l/OMohhp+jqPdyoRSCRPl1yzJHosGdOjYcPaRU3G2a F6lCnIDzMAIUmF+93vY/beKvHW4ZWesMqnRduM0tAWwtDtQ4xxfreYJ0MmNOIDX3lv ibrXZc5PnRSwSbFoDfbxK3FufRWGaeJqAeCut2orc2kWG4/qxVTZ3o66jTJ4ROcS4b +2D/0E///XqJ1jlmFZftXAYkEpt3QFoY8X5D1YzoQx3N+OUOPOZ+WbuIuvlG0z2a0U Eeg677g9SCClw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01306C36018; Tue, 1 Apr 2025 02:06:23 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Tue, 01 Apr 2025 10:06:22 +0800 Subject: [PATCH v2 2/2] dts: arm64: amlogic: add a5 pinctrl node Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250401-a5-pinctrl-v2-2-a136c1058379@amlogic.com> References: <20250401-a5-pinctrl-v2-0-a136c1058379@amlogic.com> In-Reply-To: <20250401-a5-pinctrl-v2-0-a136c1058379@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1743473181; l=3211; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=zTXCd3mjrQB2UAQ+DUxS9Et3VYgrEbPO04Lv0RVd3Dc=; b=NexDqmE4GpUbjiTbbLNR2qLQAsmCioHre9r9chGGwjRm9ULldqqOwImf0F8J+gzlrHik+F1CA ERHpBOEyZRnBEQE5MIpElVYAw2cvS8U6Z1Z1icqyRl4iW7LJi2o5hdC X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add pinctrl device to support Amlogic A5. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 90 +++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi index 32ed1776891b..844302db2133 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -4,6 +4,7 @@ */ #include "amlogic-a4-common.dtsi" +#include #include / { cpus { @@ -50,6 +51,95 @@ pwrc: power-controller { }; &apb { + periphs_pinctrl: pinctrl@4000 { + compatible = "amlogic,pinctrl-a5", + "amlogic,pinctrl-a4"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4000 0x0 0x300>; + + gpioz: gpio@c0 { + reg = <0x0 0xc0 0x0 0x40>, + <0x0 0x18 0x0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>; + }; + + gpiox: gpio@100 { + reg = <0x0 0x100 0x0 0x40>, + <0x0 0xc 0x0 0xc>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>; + }; + + gpiot: gpio@140 { + reg = <0x0 0x140 0x0 0x40>, + <0x0 0x2c 0x0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_T<<8) 14>; + }; + + gpiod: gpio@180 { + reg = <0x0 0x180 0x0 0x40>, + <0x0 0x40 0x0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 16>; + }; + + gpioe: gpio@1c0 { + reg = <0x0 0x1c0 0x0 0x40>, + <0x0 0x48 0x0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 2>; + }; + + gpioc: gpio@200 { + reg = <0x0 0x200 0x0 0x40>, + <0x0 0x24 0x0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 11>; + }; + + gpiob: gpio@240 { + reg = <0x0 0x240 0x0 0x40>, + <0x0 0x0 0x0 0x8>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>; + }; + + gpioh: gpio@280 { + reg = <0x0 0x280 0x0 0x40>, + <0x0 0x4c 0x0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 5>; + }; + + gpio_test_n: gpio@2c0 { + reg = <0x0 0x2c0 0x0 0x40>, + <0x0 0x3c 0x0 0x4>; + reg-names = "gpio", "mux"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>; + }; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,a5-gpio-intc", "amlogic,meson-gpio-intc";