From patchwork Tue Mar 25 12:39:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875995 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp2630481wrb; Tue, 25 Mar 2025 05:40:55 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWRIEgMsd1UaV3tgymEJIlhECOfvAC/8BfQVrGDJh15mCxXFs79Bbn2mP2fQhOddMZhhWL+tA==@linaro.org X-Google-Smtp-Source: AGHT+IHFaFvZ7twKGpaXYOpcyNSA/VrWitUmuKfLTGJpLcQJgV1OT+108o8u3XaE6ON1TbJAIuLB X-Received: by 2002:a05:620a:29c5:b0:7c5:54d7:d744 with SMTP id af79cd13be357-7c5ba15eff8mr2253749485a.23.1742906454779; Tue, 25 Mar 2025 05:40:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742906454; cv=none; d=google.com; s=arc-20240605; b=VXBibYgpftJOjXpD2jB3ca5W09c3KiO9Q6nmOCsVr//MPSmlA2pHnqiJasNUR1F5PK 8aMOThPRNV9hMCCvmGa1EP/S7LptwcS2gVwjXEYBbgX9eqCLVwuhz6fD95xu/24ti6IP 8xa8ZL+in06FQte1ry+e0HnD47SXaXzzQpBC+ME/Z0fE3MSXI4u6dtGzfuQKHL1GxGnR hT8hiJO3V2Ly9sDCH/rkaD3dct8hRz3NOUdFvXy/iMYNoQHEMYUDeziDAy2ZcoCCqzFn dFxK29jI3xzMqYkdFFEFKUNkt1f39q7d1If9BA0nJSnHryQkDUh+mGJ2n7+5tgJvwdo2 pdXA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NRiDNSfza2GYouIqjVX2heKQgBy/qgPHwE2OCmqBWtw=; fh=fj9SUiQct/BFKg87ur/Vyd/6tGtGJoRqRLwbKdIgqIw=; b=KgAlgt8UyoXhoRO5vjNkegJV0O9HzfP23C6XIGD2IbxFkLC3sJBPdU7tVYsNmTIHZB Sd8Ca9KCcYH9hVaA4YwCcNgFNPQKrG/7N24VDVEj/cUuvEyeilxcbYoVn4Mr2zdiZK2G DKvNk8TmwiLRhTko+u1kAGDFjzjpdgpF8dhqFFYSW4mE7bKJwamF62V1X1PWT2YPNBgJ LsaUjokCbtreSHJp7UVj/rXAfM9gQMvzuVWGa+zWTdDC/78xYf9rbLvPauvfE7FLbTsA X778DbM1tVSWSbPdfLoLEBMMHy1swUhpCwPue1FilfDKawllONnsPF187ZX3fhCs/WAh fmcw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FwP4QE6e; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7c5b92afe4csi944241785a.28.2025.03.25.05.40.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Mar 2025 05:40:54 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FwP4QE6e; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tx3ZT-00012c-VG; Tue, 25 Mar 2025 08:39:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tx3ZJ-000120-EH for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:45 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tx3ZB-0005I8-I1 for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:44 -0400 Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-43d2d952eb1so41548575e9.1 for ; Tue, 25 Mar 2025 05:39:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742906375; x=1743511175; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NRiDNSfza2GYouIqjVX2heKQgBy/qgPHwE2OCmqBWtw=; b=FwP4QE6eTeYH+Dbks2rNP0MLSU+IakD3qMMpp9Rj8f1OVIarMwqCCTjcejwZ8o+cqp BxPUMe2jsGqSkHahcHABkq96K5GARJXpuxq3TVKpS6df9coC7Xh0rTqqaBnQFOzUh5W2 Tqwl0ky8qw2iCgke5GcUJ1DAwrw9eDAbsczxDcTqFT+QRPeLE/UAg6RibNg0E0fzkyF/ //in0fk6JcjoTl/YokLAT6EyYaMYDs3PSmljeLBAvIYJeoHLi/jrrHnsKlO1usOyNh++ 6YMvNWLXl+TOEJHgg/wI6bLsJ3OD4ITy7y5x9IlZzccas4DKUtGsIg1c1fLaUIRpiJbJ ElaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742906375; x=1743511175; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NRiDNSfza2GYouIqjVX2heKQgBy/qgPHwE2OCmqBWtw=; b=plmc8GYIM3QX39El9kP9lsdShYPj5B9VhptE0udhBmunjS7XV6G7R4+m2pL9VquM4S rpWipmJj+lAflCnuOl5LsGnHEjW8ORlHBCCJyHa80qQOfFomkurclWddcNZPJvSakgkl 7of5lmb4nLJXw111QK6x6g/NQY0VkC83BSRlr119tkkzIDe1ip+FBicBijwF6S4WBMiC XWkKhNSianAuoY76yF1+rt5q6EDXT0bJ7m1mQgUVP2SjcevP6A/bawWzHNrGqnXD/InC xjjQvFrTbIssI6/DJUys33/jK1yVOppnkofDaNcnRclHh65fWRxNSG0hoLWchOqtZcdF YvXQ== X-Gm-Message-State: AOJu0Yzc7wcLAWmk/qPFMzBcaavYCsKwGKJrR6g0DQOex7Tvqxe32LRQ 654eIJhJenhskzQXgXfVUHLusnQV90aW/kVEi6Sj+0C+866sRweLluQNzw04nXO6TAZCcKFHjxG G X-Gm-Gg: ASbGncuuduGDjBLXLOLS1agrkXChHwgIsVzmq9gMuGTIQ3P/h9rT49Z0fo8q8+VirvJ aa8tbMRBF3rAednTjWRvPrUnfQCElTlXsZuVaOg6xvPQ+G11XiwKbbHusDygRJ5QmKnPK4aWpYl WCxlOPQPEAKuxaaymG5m7l+OsSviaqjAyBrz7OIk4pJNEWD/gzD5HLX/YUHVk8A19X90AD/rtnL XjnB6eG3741oQkJvEj/gRgfGyl8cEOsTwbBV+1MeAUv1sr0YXNgWdCf5/2WVNmFVwoditkn6DqQ hbHy56+YceFxxWlS/NbNJirXqScJZPzK7lSuBBrv69MA/h9uWB+Mig71dyZCSxrO4RyfrdChfmT HBkqMYFuivWJS9A/AYxE= X-Received: by 2002:a05:600c:4e94:b0:43c:f16a:641e with SMTP id 5b1f17b1804b1-43d509e2e7bmr122857925e9.6.1742906374865; Tue, 25 Mar 2025 05:39:34 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fdbd0a9sm151230465e9.38.2025.03.25.05.39.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 05:39:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Frederic Konrad , Artyom Tarasenko , Mark Cave-Ayland , =?utf-8?q?Cl=C3=A9ment_Ch?= =?utf-8?q?igot?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH-for-10.1 1/4] target/sparc: Expose more CPU features Date: Tue, 25 Mar 2025 13:39:24 +0100 Message-ID: <20250325123927.74939-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325123927.74939-1-philmd@linaro.org> References: <20250325123927.74939-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=philmd@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Various features were not displayed or settable from command line. Diff of 'qemu-system-sparc -cpu help': ... TI-SuperSparc-60 (IU 40000000 FPU 00000000 MMU 01000800 NWINS 8) TI-SuperSparc-61 (IU 44000000 FPU 00000000 MMU 01000000 NWINS 8) TI-SuperSparc-II (IU 40000000 FPU 00000000 MMU 08000000 NWINS 8) - LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) - LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) + LEON2 (IU f2000000 FPU 00080000 MMU f2000000 NWINS 8) +shutdown + LEON3 (IU f3000000 FPU 00080000 MMU f3000000 NWINS 8) +shutdown +asr17 +cachectrl +powerdown +casa Default CPU feature flags (use '-' to remove): mul div fsmuld -Available CPU feature flags (use '+' to add): float128 +Available CPU feature flags (use '+' to add): shutdown asr17 cachectrl powerdown casa float128 Numerical features (use '=' to set): iu_version fpu_version mmu_version nwindows Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 57161201173..37406227cb7 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -548,6 +548,11 @@ static const sparc_def_t sparc_defs[] = { /* This must match sparc_cpu_properties[]. */ static const char * const feature_name[] = { [CPU_FEATURE_BIT_FLOAT128] = "float128", + [CPU_FEATURE_BIT_TA0_SHUTDOWN] = "shutdown", + [CPU_FEATURE_BIT_POWERDOWN] = "powerdown", + [CPU_FEATURE_BIT_CACHE_CTRL] = "cachectrl", + [CPU_FEATURE_BIT_ASR17] = "asr17", + [CPU_FEATURE_BIT_CASA] = "casa", #ifdef TARGET_SPARC64 [CPU_FEATURE_BIT_CMT] = "cmt", [CPU_FEATURE_BIT_GL] = "gl", From patchwork Tue Mar 25 12:39:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875997 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp2630527wrb; Tue, 25 Mar 2025 05:40:59 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUw0QHcTyrPGzl7pfOMuHfTSjsIz6iDMf7kFUS/PoXYIkrWSmyiPX3Te1kcLvjSEgBi71haHw==@linaro.org X-Google-Smtp-Source: AGHT+IEsOM1eM2MglrYygCDzn6JaWDJw06jcr2zvXgR3O3WgkLY2Pbh6GfGx065jFREL1SZJth64 X-Received: by 2002:a05:620a:c4f:b0:7c5:4c6d:7fa9 with SMTP id af79cd13be357-7c5ba1f0013mr2516304685a.49.1742906459669; Tue, 25 Mar 2025 05:40:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742906459; cv=none; d=google.com; s=arc-20240605; b=ciKQpTxif/Ed0Dx/QY/AZ0VMfUItNkNfs0xRCZ3BUJzLJ1WSzUFG0V8t/cBd2ocmqM 6Jw06uC3FnRutcWRIlXNoW5p2Jo4Un+ZyBcQdub6X6JLSXlCnF5SV/QVDPKu33Ngz2g/ 5hRLK3mr7zJZGL7Czht6Z4x2hEcJNAxoy2Nz1BE4mW4Fzi1YCn6ZfWFPcWphyQyOEHFb PnZYRgaBJzAk01TzH/ZjcOXDzlT19t00F6Q2rlNbhuu7mfQ2jhO47IoNx9mNU/3HJV3T iP/LNRIrV0pf9cX/MKVyKlo12O+68uz954Zu3p3IvtFJ6768O5fAViaP4DwRohG26sYM CbLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0gRJU6iWmDstoKX97bKU9+bqCcaUQU0Z5yxalC9Q2S8=; fh=fj9SUiQct/BFKg87ur/Vyd/6tGtGJoRqRLwbKdIgqIw=; b=iIl0np45RBH2gBBRyy3EqLCCgvlPoE0N0K13i/l9JOlrXD7kwCxzDTqwn4xqxl52tt FblySYclUxYI2xJ2DGKicSlrWRJVl5DpERz/3cKOo1vgj8HqwgelcG5xfstjkxMq2sBN ew5seSxwTVfggozze7ww9d/2SzcIZmVkg+JB+QY8TDzYx3UtH1MUHg8oNa8NYIN95mBp 7jRJJsO5We/sUrPfClcgbDtwg9XfEPRWPV8MTN25VmYfFUcoLfg8tV0u0KsztDTCJL3B wuyGt8luK8+qkYCBVTPPBIojltz7PHs9gG1oTbg2soyzku3KRC/Ox9YH6ZjcR1zpiimC x3kQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tuDgkRO+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7c5c7fa08a0si566788685a.528.2025.03.25.05.40.59 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Mar 2025 05:40:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tuDgkRO+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tx3ZL-00011y-19; Tue, 25 Mar 2025 08:39:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tx3ZH-00011d-Bz for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:43 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tx3ZF-0005Kn-Im for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:43 -0400 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-43ce70f9afbso55151075e9.0 for ; Tue, 25 Mar 2025 05:39:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742906380; x=1743511180; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0gRJU6iWmDstoKX97bKU9+bqCcaUQU0Z5yxalC9Q2S8=; b=tuDgkRO+DJx1pkqY925zaOgTCeS25lTLMt7f+aQk64vweQcPNDBodcP1MKeMKi7gy5 6ERv9CTHsxDAVPAmvb5UlNjyoeeBp8yR97C+dt2DvLr6iZlqAfdjJ4fkZpmzgt8K3x+g 4ZfQ2qI4d4lJ1E3fXTs5UN2IRfi3PSbOJaFqmEgcYhx6wBJdFC+hOFZ2e39ttULsY8sN ui/Fs885L4OeqaUjp0iX/rE6+x8yWl9OkdyHUF5UXmEko+fb24WZYks8mO/BUKFrAZf4 4gl9l+g8Qt0T2bY+jL7u0a4UmyhtXS67AkjNG/uON5Rv+rrbLcpmu6sKIhFsFCI15MvA MNcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742906380; x=1743511180; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0gRJU6iWmDstoKX97bKU9+bqCcaUQU0Z5yxalC9Q2S8=; b=awSkHcnhDxndhW+VlOxXGpPccPaP9a83ROcW0qnGbVYklvxnX5TAvWGomg6k20p3vQ HGm4Yf4BZAQujBlrBlibXNqjKzVeqTuxnwXKkd0hvJN2bBR9steC93IU+K468gGzPE8g n2PbHiRqtBPFDC+UMo10iI1gZeICfkmQ6B4uIR+p0N4i6ywU72kgBlSsn/caRQvP4Wc3 fztJIKuA4MfnH2zY3BxFFspy7MkuOuOWOs1nRMSlidDj+9gHrjU+lHgwyLKkIZORvzaj mzVcWLa252TZzoNyr0umCF07LKchwVb8SLLcjL6vmZuP6B4MQl594QyNRaxE89qUSry+ NSuA== X-Gm-Message-State: AOJu0Yx6Iegp33ijOHxPzew/n1TyoOvVqR1KlsHZNXwA/vuXocsZM5Zt bulY1AvtLVbpMZxIPWFo51IkclxoAzjLE0jssdQ5Aa1hnYaHj3N+1YbpyqCziA8vDRYP16mIBK7 v X-Gm-Gg: ASbGncv6O+4lPChAObkGHn11H26nO7iUxLQX7+fjl7nkKq5ukjTNRkSfycRFP+6H97n o+7k1rv+sewtgoPBnkJnt27j3PvQfmjeWAF4+zzHt0uW+BPmEZWw4i2G+rQ7pHmApMT8i/Xpewp Sdv6cUakd3YGsYxa/S1FxBWdH6mqXCzvEZn5zSOu6W6y7OEP/e/rc+SqcTj8lt+V7caPItWIKmL 4B/fb+sQYC5kyHCTDGhH8NONgnNVtNzhjHeNl7YzJsi6A9XgEmeAEpY7a8BRQiKhfUQkIiBfNbq jiFhrmdRkyGeJpxcHOE5LWLfKjiHLAXCKxuWMD/0u2KmAMzoB/PTJUmSfkR1VD2cNWsDj9II818 NiM+VyIPjnvLbjwPsxGw= X-Received: by 2002:a05:6000:2a88:b0:39a:c9fe:f069 with SMTP id ffacd0b85a97d-39ac9fef08dmr1293800f8f.30.1742906379644; Tue, 25 Mar 2025 05:39:39 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9b2654sm13458040f8f.41.2025.03.25.05.39.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 05:39:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Frederic Konrad , Artyom Tarasenko , Mark Cave-Ayland , =?utf-8?q?Cl=C3=A9ment_Ch?= =?utf-8?q?igot?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH-for-10.1 2/4] target/sparc: Restrict SPARC64 specific features Date: Tue, 25 Mar 2025 13:39:25 +0100 Message-ID: <20250325123927.74939-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325123927.74939-1-philmd@linaro.org> References: <20250325123927.74939-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following commit 554abe47c7b ("target/sparc: Partition cpu features"), avoid compiling SPARC64 specific code on 32-bit binary. Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/cpu-feature.h.inc | 20 ++++++++++++-------- target/sparc/translate.c | 10 ++++++++-- 2 files changed, 20 insertions(+), 10 deletions(-) diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index be810052376..7b7b94a0562 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -1,12 +1,8 @@ FEATURE(FLOAT128) -FEATURE(MUL) -FEATURE(DIV) -FEATURE(VIS1) -FEATURE(VIS2) -FEATURE(FSMULD) -FEATURE(HYPV) -FEATURE(CMT) -FEATURE(GL) +FEATURE(MUL) /* Mandatory in v9 */ +FEATURE(DIV) /* Mandatory in v9 */ +FEATURE(FSMULD) /* Mandatory in v9 */ + FEATURE(TA0_SHUTDOWN) /* Shutdown on "ta 0x0" */ FEATURE(ASR17) FEATURE(CACHE_CTRL) @@ -16,3 +12,11 @@ FEATURE(FMAF) FEATURE(VIS3) FEATURE(IMA) FEATURE(VIS4) + +#ifdef TARGET_SPARC64 +FEATURE(HYPV) +FEATURE(CMT) +FEATURE(GL) +FEATURE(VIS1) +FEATURE(VIS2) +#endif diff --git a/target/sparc/translate.c b/target/sparc/translate.c index bfe63649db2..53b145848b9 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -1850,10 +1850,12 @@ static void gen_st_asi(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr) if (TARGET_LONG_BITS == 32) { gen_exception(dc, TT_ILL_INSN); break; +#ifdef TARGET_SPARC64 } else if (!(dc->def->features & CPU_FEATURE_HYPV)) { /* Pre OpenSPARC CPUs don't have these */ gen_exception(dc, TT_ILL_INSN); break; +#endif } /* In OpenSPARC T1+ CPUs TWINX ASIs in store are ST_BLKINIT_ ASIs */ /* fall through */ @@ -2750,12 +2752,16 @@ static bool trans_SETHI(DisasContext *dc, arg_SETHI *a) static bool do_tcc(DisasContext *dc, int cond, int cc, int rs1, bool imm, int rs2_or_imm) { - int mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc) - ? UA2005_HTRAP_MASK : V8_TRAP_MASK); + int mask = 0; DisasCompare cmp; TCGLabel *lab; TCGv_i32 trap; +#ifdef TARGET_SPARC64 + mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc)) + ? UA2005_HTRAP_MASK : V8_TRAP_MASK; +#endif + /* Trap never. */ if (cond == 0) { return advance_pc(dc); From patchwork Tue Mar 25 12:39:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875996 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp2630522wrb; Tue, 25 Mar 2025 05:40:59 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUEcKBwmc4iw2ow9QwR6sJtl1dK3l2tZFkhKllsKeEhgSkAehPZ+o7mIfF0XKgb8tAzK5Txaw==@linaro.org X-Google-Smtp-Source: AGHT+IH+IHlqIDEGz/US+jyFif1RAQIkuOxX/tiEWZVqzS3W0TVSDLzMFSIZer12ZBna9dUDuIHw X-Received: by 2002:a05:622a:5c88:b0:476:95dd:520e with SMTP id d75a77b69052e-4771dd7b61bmr236211201cf.16.1742906459149; Tue, 25 Mar 2025 05:40:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742906459; cv=none; d=google.com; s=arc-20240605; b=LwQuniHsxxDZ5tJCjrAbcrbrzG44GZbZlwiN5x6vWZG0V24FT99tJdDzZtERGwS94J +EF5/7vVV3cAnbj3HqW9L2CQcBQNfmdgKUiMXvp/jJ5o8ZfdQfXSLnJH8/xQKXbf8S4/ TUGcUnhFzMztLzeB7OZBlrR0Vlnm9pZwSJM0UJDeitpng8BGzDAyuTUpvkIuH+Emkel9 F7Ffzsw1Sx/k3yzN+vDboO89tKM7U7sN1fhCQ81mMO0YkGJgmrjn0gfIt/Dx5B2AUDeo hPcYVVTUyjtNiFCO0bYKCt3xerZElN82nXK3z1fRKQ4hYy56HvFwaYCIQpNxPjoptg9i iV8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=uEliZr3OfJAnE0D5P6Q3RvPbW502QatPMezLPX4YXZs=; fh=fj9SUiQct/BFKg87ur/Vyd/6tGtGJoRqRLwbKdIgqIw=; b=HFMXfRCQ/c9EOhwj0os9DHwK+vBEcmDDcCgfPkSHyy/pvGql0MWbRQc69VsYHCIQXE 2qPBTvbKrbihssu0vAqI1DoztQFlc/F1z16EgJHevwLr2kD+d214YSC2EfadglQSDN3y vclou5vl/LNy6sL6YzL8dDnDZmP0hPiBbfxBEa38SOAdrprAIAqOrAQ6HzTqS27RG7BG GyvhKRJUXgJdiJbx466z/DrnAcyjhHVccSpDuayayMJwFwGWAiPHDW1nYzOQy87qPUue TYwLWh5zN8WfVGmxqBEjQ5wKbLQ27exoynztMVBqzhOO97PBjIjSQvzhg0fvILwYh2AR 0V5A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jSy8tzm4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4771d15b9aasi95380701cf.47.2025.03.25.05.40.58 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Mar 2025 05:40:59 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jSy8tzm4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tx3ZW-00013c-NZ; Tue, 25 Mar 2025 08:39:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tx3ZN-00012b-0w for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:49 -0400 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tx3ZK-0005Nn-Ia for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:48 -0400 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-39ac8e7688aso499505f8f.2 for ; Tue, 25 Mar 2025 05:39:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742906384; x=1743511184; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uEliZr3OfJAnE0D5P6Q3RvPbW502QatPMezLPX4YXZs=; b=jSy8tzm4A3gmDdV392+YvGFxwhs1djQr9IjeivLK6m3J6nILfSFkcWMKA/NoMIR6UO 31BJlh9K+L0FeI9gj6JJYXLW5+gn+Pe/9YtSZXwuDwNYnRg+e+NpanA43pnBY2C0QRQ9 5dN9aLCaOEsr6+emL1o3HnSOBZa/nJRj/2wZF+aYb7vmY46lusIo/uFMLBQnlHiZZikJ vUTs7DQRkCTkRPSzB0OZhkzlL48+oAhUk9GS5dQzpNsNtKPJCJ20xegAPva5shzKpF55 dbf6VNaL1F8BTpp3YvLTXs6P4GBryjVeIsOqifKyexAgj4m51DWwmJdj/x0SLhj8clpr kpMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742906384; x=1743511184; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uEliZr3OfJAnE0D5P6Q3RvPbW502QatPMezLPX4YXZs=; b=tFimjbWXZ8pg5ucdxQuniLkAOAIs81Igo//Ys5ZXnxkZDlzPX+rRYqthedQMq4mqnO W/6lH8rZ6kKRxrIVAyHcDMZPUyjt9NNeqBGHuStxg+v5KGeN4JKzyS1tlKwWu16O6acw 8b/wOfzTDw8BX6i+dxeARYb8Co+XKCj4eJO/Zha1jItfXz3aGuJ5Gl6wvqLMErxugBao TMF27bDu9E47jeHzBwvL2wOVuwIm8ugY8RWRII4Qeska8iQ6Qbn8OOVArrXsb3CdQ2sR QDkEwPaDhHhyJhqIzJRGJqs/QgbEUOIxUTN13d52avuK9wyfPFnggsy33lWNqfldcEQg Mz+g== X-Gm-Message-State: AOJu0Yx0CYjEsz6yk8p275K7VGqYpjDpuSuwHkYLJzL/tLZ1Tnrc4In6 0FkmKP/xl3GGMYpLbSiU5tJRX32aDemsdWiguwC0Z91yT1OxlkZJrAyBfZaddg0qE2Q5xfvz6ek O X-Gm-Gg: ASbGncshOLz0CaE+sE8L1XMOQeOlI1HyL55et7rSsEPEy+AG2xWFwO5n22m2TWyMJ+g izLqdd/P4+ayslMCyamSEWRwptVMpD/Mi1C7HxFR7UNh9+5yH0+C8zQGN1GAOArDytAV6OHA4an NH+wx9kuJcA9OjmsZ37Fc7W8iteBDMoT41uzsDP7TFbkzbkAdaShikpfdAGWlexzIj73fAaQFm7 HBqKG3zAY4kFdX/1ER4GMcqffSvUjrkwtWEBvvXB2zLiuVJVTXP9MkznKY05ZdSQ6KBAOyFGpxG PQ7pmnUX+khnzkI7mFk2s9ALq4IyeI0OX6WuvWsiFIsqCJgdlEqJwn5fP02TZI8YyTMKVw0hb4Q Vsouah7n3yuN3AZeWq+4= X-Received: by 2002:a05:6000:418a:b0:391:4b8e:a200 with SMTP id ffacd0b85a97d-3997f9127f6mr10389775f8f.32.1742906384424; Tue, 25 Mar 2025 05:39:44 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39abfc2115asm7617239f8f.4.2025.03.25.05.39.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 05:39:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Frederic Konrad , Artyom Tarasenko , Mark Cave-Ayland , =?utf-8?q?Cl=C3=A9ment_Ch?= =?utf-8?q?igot?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH-for-10.1 3/4] target/sparc: Log unimplemented ASI load/store accesses Date: Tue, 25 Mar 2025 13:39:26 +0100 Message-ID: <20250325123927.74939-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325123927.74939-1-philmd@linaro.org> References: <20250325123927.74939-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When the cache-controller feature is not implemented, log potential ASI access as unimplemented. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Clément Chigot --- target/sparc/ldst_helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index b559afc9a94..d4de32d3c48 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -600,6 +600,10 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { ret = leon3_cache_control_ld(env, addr, size); + } else { + qemu_log_mask(LOG_UNIMP, + "%08x: unimplemented access size: %d\n", addr, + size); } break; case 0x01c00a00: /* MXCC control register */ @@ -816,6 +820,10 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { leon3_cache_control_st(env, addr, val, size); + } else { + qemu_log_mask(LOG_UNIMP, + "%08x: unimplemented access size: %d\n", addr, + size); } break; From patchwork Tue Mar 25 12:39:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875998 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp2630605wrb; Tue, 25 Mar 2025 05:41:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVH6QsUe64ydSULEZ1ztU8sVxXnumexDmoZw+XAuxDe4u+69vc8bDlmxPW8JZcHb92XXwHhMg==@linaro.org X-Google-Smtp-Source: AGHT+IG7PeVUWQvX7NwcbnjdBhHS5hqznyP+OMSkRmH+bAGHM5YZY3ELeVWqkdRWlA/Icd2JXcUB X-Received: by 2002:a05:622a:230f:b0:476:ab04:e457 with SMTP id d75a77b69052e-4771de7e778mr184735801cf.51.1742906469221; Tue, 25 Mar 2025 05:41:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742906469; cv=none; d=google.com; s=arc-20240605; b=WiN5JPVM6haR4RPCyE9yeBBgZPBuHMN8BboCGf0Xvky0J8W5bIacKAVDkhmsn7b/hx iFF+4LmrcpGyCnFD+UMZ44StvSInBP0BQ0PQfOl+93z8HKIFTuMVXK1BzXJfOSoGBz89 tjaqcY87IgV1bVdkHZw7ezjYXE7hbMmiHYZF0xzo+lBD44lF3tvrHo4SNPlPxhYjKqlk PdGoXPxREGEoNm8VND9qg16hSLIROO2Er7OEuuogjnuoo6KPcOYFKvviH2Yw6RocCMy8 WltqiN3ZIg80kV/yQv2rzjlKzOnq4N1IR6i+51dQds1arXYV7v6HgYbeuvOQZcXWGeqh 7G2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=c2z/hIXHE7gA8BhYXkl6xq/yq0lVd9BDreez7QJtYPY=; fh=fj9SUiQct/BFKg87ur/Vyd/6tGtGJoRqRLwbKdIgqIw=; b=Iph1OoHJwIksmlNdqShwVTPqBoUppAbhU8ft87LF0laQ0Fu/Jh5auSH6iLIOym4Fwl pCiBgajwa1CDfjaTf7JdSxj9O905uF6mMUNLXzuqIJmbsxY19FLdh8PompOXlgNIIemt czCU/q7326FVK7ErRlBI35MR8l1j8zvhxpbICdByi4o5dvB93gqRhzla0bGj3mt4Um48 6vdlye12YaDQrjlQGxSPRyp28BPEwH80cqwnEKyBc4id7VX0ZoVn62wmi8iRCjc6wrj6 ccje5nb0q/7N47uBhv4fXVqw4XJmgrglo9eAZJWX6bry41l7TB/QAKuJX3+TxeOfrRh2 vSdQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m9WRlwJH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id d75a77b69052e-4771d15c9f2si92933491cf.97.2025.03.25.05.41.09 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 25 Mar 2025 05:41:09 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m9WRlwJH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tx3Zd-00013d-7J; Tue, 25 Mar 2025 08:40:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tx3ZU-00013K-3E for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:57 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tx3ZQ-0005Qt-N4 for qemu-devel@nongnu.org; Tue, 25 Mar 2025 08:39:55 -0400 Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43cf06eabdaso51056605e9.2 for ; Tue, 25 Mar 2025 05:39:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1742906389; x=1743511189; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c2z/hIXHE7gA8BhYXkl6xq/yq0lVd9BDreez7QJtYPY=; b=m9WRlwJHP9SK5VChRHDcN1xdyTmMrfLrum5PyBr7nUEWayzymlohgKuQf6Sc4YlQYa ppJZD93f8AVUI6/mnWyzKourhj5A07mYeNJlRJ5UtU+loIoNY7T2StBFHakWpeArqA45 2sHWfKZlO0b/sX5IZz2uitk4YdLZlfkcVTxZg+kmvmfxAm8PEWkHUYSJK5Rw2+kLLOtu 0Qfsk/qaXbhC0W5J1c1bp9VHHTgYIDMtqwwHWuOIP28ZA78yfW2b76HfYnwUQ06gdY63 CRINwz5gvzCi8KRbnsn+NFRw0SvRZ9Fpczv4z/d3fmvd7sA4j/5XTKzQDLjxwy/Lu5iE S0AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1742906389; x=1743511189; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c2z/hIXHE7gA8BhYXkl6xq/yq0lVd9BDreez7QJtYPY=; b=tQgN2+CxXe26CSt/FynvpDdB6Au5fiAvElAapalDDF2DLnRrfagKWdM4q/uoCveUOF 7GRpaorR4zSB4ZI6FceB7odwyLVK2Y6cDLzJI03asAxlCkZi0UcxJsJ/Kn1Nxv9XedvF m85v0hOMSdn0F9AORrrrx32grztLHxirqrFA2zYXFw7OLlamPwIlZocynYNB1+lthX6M 3ZxLBHeRhlxq+aFiOxHtjryzoVVYmKqBB8Z/FmmrGFcEXqKlfnPbxe7iFTiwI/LsndcR dafdgJJOMy5+8qHrregeOP0CQWT3uq3R/YkI/409HAh+zVwy52fXMv5kqQ4iKSB+mdyh IXVQ== X-Gm-Message-State: AOJu0YxesDa1F8V8yQkJHd+WGvpnmjy0443IXTlh9KXZr5gdzaKUe9X8 wdsyyS48Y63SeUV53OkqtnGK2yE9BDEV6PYvaByTUUJsstYBBk/rq/N9vbvHzA47GTbWgHki0qU A X-Gm-Gg: ASbGncs2TB+UJEpBu+yBI094+Ffkv39tMWuVwMqZhPVhVwbuf/IQIBHAVQ129lWshrY 6yg0BAQSRnJCMNPr0c/QrixIsfgBKk8gfLDJ6neX2ctaL7POSqB6OyH6Kin/9IHWmygxLuclnLa yLLJnVq8r+qlu4uv4wh7bEYk4f+En44yYO9Zg72gN2QPCy2brgm77A2nU6JXq3xMq1EmTIMydO2 CoThpso66lmMqYHUimySmAJudRnQVIf8wadkCFOhJyKLBAYFqc6bmjqIhuraSbsCbzamFEXH2qz f/FPoovsnR7lqhQUbsqwzv1mgPNtXCK5SUu+VA+dZzd53l0Z94OTJRrgx/SxakXZEBF62VhWHa1 55GEehrFT39tK993pjrs= X-Received: by 2002:a05:6000:4188:b0:391:487f:27e7 with SMTP id ffacd0b85a97d-3997f947b9dmr11278702f8f.55.1742906389418; Tue, 25 Mar 2025 05:39:49 -0700 (PDT) Received: from localhost.localdomain (88-187-86-199.subs.proxad.net. [88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9e6667sm13835492f8f.72.2025.03.25.05.39.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 25 Mar 2025 05:39:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Frederic Konrad , Artyom Tarasenko , Mark Cave-Ayland , =?utf-8?q?Cl=C3=A9ment_Ch?= =?utf-8?q?igot?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH-for-10.1 4/4] target/sparc: Move hardware fields from CPUSPARCState to SPARCCPU Date: Tue, 25 Mar 2025 13:39:27 +0100 Message-ID: <20250325123927.74939-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250325123927.74939-1-philmd@linaro.org> References: <20250325123927.74939-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Keep CPUSPARCState for architectural fields, move Leon3 hardware specific fields to SPARCCPU. Reset the Leon3 specific 'cache_control' field in leon3_cpu_reset() instead of sparc_cpu_reset_hold(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Clément Chigot --- target/sparc/cpu.h | 10 +++++----- hw/sparc/leon3.c | 35 ++++++++++++++++++----------------- target/sparc/cpu.c | 1 - target/sparc/int32_helper.c | 8 ++++++-- target/sparc/ldst_helper.c | 12 ++++++------ 5 files changed, 35 insertions(+), 31 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 462bcb6c0e6..abb71c314dc 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -543,11 +543,6 @@ struct CPUArchState { #define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_TIMER) #endif sparc_def_t def; - - /* Leon3 */ - DeviceState *irq_manager; - void (*qemu_irq_ack)(CPUSPARCState *env, int intno); - uint32_t cache_control; }; /** @@ -560,6 +555,11 @@ struct ArchCPU { CPUState parent_obj; CPUSPARCState env; + + /* Leon3 */ + DeviceState *irq_manager; + void (*qemu_irq_ack)(SPARCCPU *cpu, int intno); + uint32_t cache_control; }; /** diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 0aeaad3becc..06966861744 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -152,6 +152,7 @@ static void leon3_cpu_reset(void *opaque) int id = info->id; ResetData *s = container_of(info, ResetData, info[id]); CPUState *cpu = CPU(s->info[id].cpu); + SPARCCPU *scpu = SPARC_CPU(cpu); CPUSPARCState *env = cpu_env(cpu); cpu_reset(cpu); @@ -159,41 +160,41 @@ static void leon3_cpu_reset(void *opaque) cpu->halted = cpu->cpu_index != 0; env->pc = s->entry; env->npc = s->entry + 4; + scpu->cache_control = 0; } -static void leon3_cache_control_int(CPUSPARCState *env) +static void leon3_cache_control_int(SPARCCPU *cpu) { uint32_t state = 0; - if (env->cache_control & CACHE_CTRL_IF) { + if (cpu->cache_control & CACHE_CTRL_IF) { /* Instruction cache state */ - state = env->cache_control & CACHE_STATE_MASK; + state = cpu->cache_control & CACHE_STATE_MASK; if (state == CACHE_ENABLED) { state = CACHE_FROZEN; trace_int_helper_icache_freeze(); } - env->cache_control &= ~CACHE_STATE_MASK; - env->cache_control |= state; + cpu->cache_control &= ~CACHE_STATE_MASK; + cpu->cache_control |= state; } - if (env->cache_control & CACHE_CTRL_DF) { + if (cpu->cache_control & CACHE_CTRL_DF) { /* Data cache state */ - state = (env->cache_control >> 2) & CACHE_STATE_MASK; + state = (cpu->cache_control >> 2) & CACHE_STATE_MASK; if (state == CACHE_ENABLED) { state = CACHE_FROZEN; trace_int_helper_dcache_freeze(); } - env->cache_control &= ~(CACHE_STATE_MASK << 2); - env->cache_control |= (state << 2); + cpu->cache_control &= ~(CACHE_STATE_MASK << 2); + cpu->cache_control |= (state << 2); } } -static void leon3_irq_ack(CPUSPARCState *env, int intno) +static void leon3_irq_ack(SPARCCPU *cpu, int intno) { - CPUState *cpu = CPU(env_cpu(env)); - grlib_irqmp_ack(env->irq_manager, cpu->cpu_index, intno); + grlib_irqmp_ack(cpu->irq_manager, CPU(cpu)->cpu_index, intno); } /* @@ -248,10 +249,10 @@ static void leon3_start_cpu(void *opaque, int n, int level) async_run_on_cpu(cs, leon3_start_cpu_async_work, RUN_ON_CPU_NULL); } -static void leon3_irq_manager(CPUSPARCState *env, int intno) +static void leon3_irq_manager(SPARCCPU *cpu, int intno) { - leon3_irq_ack(env, intno); - leon3_cache_control_int(env); + leon3_irq_ack(cpu, intno); + leon3_cache_control_int(cpu); } static void leon3_generic_hw_init(MachineState *machine) @@ -320,8 +321,8 @@ static void leon3_generic_hw_init(MachineState *machine) qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - env->irq_manager = irqmpdev; - env->qemu_irq_ack = leon3_irq_manager; + cpu->irq_manager = irqmpdev; + cpu->qemu_irq_ack = leon3_irq_manager; } sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 37406227cb7..d62ad6c4db2 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -78,7 +78,6 @@ static void sparc_cpu_reset_hold(Object *obj, ResetType type) env->pc = 0; env->npc = env->pc + 4; #endif - env->cache_control = 0; cpu_put_fsr(env, 0); } diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index f0266061023..a902702559d 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -168,8 +168,12 @@ void sparc_cpu_do_interrupt(CPUState *cs) #if !defined(CONFIG_USER_ONLY) /* IRQ acknowledgment */ - if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) { - env->qemu_irq_ack(env, intno); + if ((intno & ~15) == TT_EXTINT) { + SPARCCPU *cpu = env_archcpu(env); + + if (cpu->qemu_irq_ack != NULL) { + cpu->qemu_irq_ack(cpu, intno); + } } #endif } diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index d4de32d3c48..0a11360ccaf 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -513,7 +513,7 @@ static void sparc_raise_mmu_fault(CPUState *cs, hwaddr addr, /* Leon3 cache control */ -static void leon3_cache_control_st(CPUSPARCState *env, target_ulong addr, +static void leon3_cache_control_st(SPARCCPU *cpu, target_ulong addr, uint64_t val, int size) { DPRINTF_CACHE_CONTROL("st addr:%08x, val:%" PRIx64 ", size:%d\n", @@ -534,7 +534,7 @@ static void leon3_cache_control_st(CPUSPARCState *env, target_ulong addr, val &= ~CACHE_CTRL_IP; val &= ~CACHE_CTRL_DP; - env->cache_control = val; + cpu->cache_control = val; break; case 0x04: /* Instruction cache configuration */ case 0x08: /* Data cache configuration */ @@ -546,7 +546,7 @@ static void leon3_cache_control_st(CPUSPARCState *env, target_ulong addr, }; } -static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr, +static uint64_t leon3_cache_control_ld(SPARCCPU *cpu, target_ulong addr, int size) { uint64_t ret = 0; @@ -558,7 +558,7 @@ static uint64_t leon3_cache_control_ld(CPUSPARCState *env, target_ulong addr, switch (addr) { case 0x00: /* Cache control */ - ret = env->cache_control; + ret = cpu->cache_control; break; /* Configuration registers are read and only always keep those @@ -599,7 +599,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { - ret = leon3_cache_control_ld(env, addr, size); + ret = leon3_cache_control_ld(env_archcpu(env), addr, size); } else { qemu_log_mask(LOG_UNIMP, "%08x: unimplemented access size: %d\n", addr, @@ -819,7 +819,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ if (env->def.features & CPU_FEATURE_CACHE_CTRL) { - leon3_cache_control_st(env, addr, val, size); + leon3_cache_control_st(env_archcpu(env), addr, val, size); } else { qemu_log_mask(LOG_UNIMP, "%08x: unimplemented access size: %d\n", addr,