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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3997f9e6550sm8950122f8f.78.2025.03.23.15.40.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:40:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 1/6] cpus: Introduce CPUClass::list_cpus() callback Date: Sun, 23 Mar 2025 23:40:30 +0100 Message-ID: <20250323224035.34698-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Some targets define cpu_list to a method listing their CPUs on stdout. In order to make list_cpus() generic, introduce the CPUClass::list_cpus() callback. When no callback is registered, list_cpus() defaults to the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- include/hw/core/cpu.h | 2 ++ cpu-target.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 5d11d26556a..ccfcd3eb3a6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -102,6 +102,7 @@ struct SysemuCPUOps; * CPUClass: * @class_by_name: Callback to map -cpu command line model name to an * instantiatable CPU type. + * @list_cpus: list available CPU models and flags. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @mmu_index: Callback for choosing softmmu mmu index; @@ -150,6 +151,7 @@ struct CPUClass { /*< public >*/ ObjectClass *(*class_by_name)(const char *cpu_model); + void (*list_cpus)(void); void (*parse_features)(const char *typename, char *str, Error **errp); int (*mmu_index)(CPUState *cpu, bool ifetch); diff --git a/cpu-target.c b/cpu-target.c index cae77374b38..5947ca31a0a 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -98,7 +98,13 @@ static void cpu_list(void) void list_cpus(void) { - cpu_list(); + CPUClass *cc = CPU_CLASS(object_class_by_name(CPU_RESOLVING_TYPE)); + + if (cc->list_cpus) { + cc->list_cpus(); + } else { + cpu_list(); + } } /* enable or disable single step mode. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d43f55c3dsm151982885e9.23.2025.03.23.15.40.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:40:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 2/6] target/i386: Register CPUClass:list_cpus Date: Sun, 23 Mar 2025 23:40:31 +0100 Message-ID: <20250323224035.34698-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Register x86_cpu_list() as CPUClass:list_cpus callback. Reduce its scope and remove the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/i386/cpu.h | 3 --- target/i386/cpu.c | 3 ++- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 76f24446a55..28011eff0a8 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2367,7 +2367,6 @@ int x86_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void x86_cpu_gdb_init(CPUState *cs); -void x86_cpu_list(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); #ifndef CONFIG_USER_ONLY @@ -2561,8 +2560,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu32") #endif -#define cpu_list x86_cpu_list - /* MMU modes definitions */ #define MMU_KSMAP64_IDX 0 #define MMU_KSMAP32_IDX 1 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b64ceaaba4..1f502587c96 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6305,7 +6305,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) } /* list available CPU models and flags */ -void x86_cpu_list(void) +static void x86_cpu_list(void) { int i, j; GSList *list; @@ -8924,6 +8924,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP; cc->class_by_name = x86_cpu_class_by_name; + cc->list_cpus = x86_cpu_list; cc->parse_features = x86_cpu_parse_featurestr; cc->mmu_index = x86_cpu_mmu_index; cc->dump_state = x86_cpu_dump_state; From patchwork Sun Mar 23 22:40:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875639 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp1881078wrb; Sun, 23 Mar 2025 15:42:03 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCW9VRq6M4XexzufyOdL853X0wvZADPiiMTHFbi3ZhOmv8bHRX/fXidfPWBxnx7bCqDC7EzMBA==@linaro.org X-Google-Smtp-Source: AGHT+IH8ZpBgz2XLhbTZ7SKtwd4nGE7MvV0tDfxxYgw+PqtRzMp+gXfZFy1wSYD/rnub3Nnbk295 X-Received: by 2002:a05:620a:1a18:b0:7c5:53ab:a74f with SMTP id af79cd13be357-7c5ba1ef1bamr1359392385a.39.1742769723104; Sun, 23 Mar 2025 15:42:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742769723; cv=none; d=google.com; s=arc-20240605; b=CBNXThw1TEgjsNl8wGKCakK/wFLJEjMLMERugmo1fDsQhFb1p2AlF0jEYNVHVzFNr0 3zTLKgJHmUNptb2+Vavt8EA9Div3g4s1NHWkwtFJcVHway2TefcJ/JUEa/T6YdbIV8sb js7+HT71YyUs4LSpjdRVk1v25OjAjVKARSEbnDuk//4G/bakEHO3Ss9x6pgWToQpCcWp wHGU8nUzge6juBxQSGf5IqkYmqHSTpmxbk9wAHiUd4X6X/G3SojyVK0bPrM4Rm9ROL3P oFhqzoswNU0L2uLeUjEBL8Fyj4GZ/+iQHbW2jg2ADKj9HvKfEK542nx9YwLQSNVuQszR C45w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mYynSm+9EDEtOgu3b8Om5yz3MdguMMae0p+vB1NumPQ=; fh=fS/4rnnLwcRgvOOCJ1cvfiQufE+14bwOLEAj2Zueb4I=; b=LgNv7rDXc1SHa5JOS/RppPzWImkczKER6cHwZr48bxj44hOZ65bwRoj8nDqB3kWyzX ktklR287RPpubJGg8+CTEt5RreMlCLN0QW53VRaqVjjmh/O6zj9z/d+tJBazqhmTBkLa rs0yHS3r10opuiOY7xdUY0ubrBeDP1knkgcDAxpDKDJ97RdlEh7XyU/Sm9xe/WuBamnh TxM/eFCZviQB/09wLQyJ3k6Itqf2rvJrXlQZmHFShjG3gYEA4r6RH6wh9FCwCis1tRPw YxBYhgiCgfv4KtTCm18UWl/0e4vAQ+5m75TJz4oSPu7A4kz1ZhaLITa1eKPsHLIgQM7H 1KXQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i6KJbQ51; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fd9ec29sm99906115e9.30.2025.03.23.15.40.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:40:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 3/6] target/ppc: Register CPUClass:list_cpus Date: Sun, 23 Mar 2025 23:40:32 +0100 Message-ID: <20250323224035.34698-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Register ppc_cpu_list() as CPUClass:list_cpus callback. Reduce its scope and remove the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/ppc/cpu.h | 4 ---- target/ppc/cpu_init.c | 3 ++- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index efab54a0683..0062579ef3e 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1597,8 +1597,6 @@ void ppc_store_dawrx1(CPUPPCState *env, uint32_t value); #endif /* !defined(CONFIG_USER_ONLY) */ void ppc_store_msr(CPUPPCState *env, target_ulong value); -void ppc_cpu_list(void); - /* Time-base and decrementer management */ uint64_t cpu_ppc_load_tbl(CPUPPCState *env); uint32_t cpu_ppc_load_tbu(CPUPPCState *env); @@ -1660,8 +1658,6 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) int ppc_dcr_read(ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write(ppc_dcr_t *dcr_env, int dcrn, uint32_t val); -#define cpu_list ppc_cpu_list - /* MMU modes definitions */ #define MMU_USER_IDX 0 static inline int ppc_env_mmu_index(CPUPPCState *env, bool ifetch) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 8b590e7f17c..0ccb9068c89 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7184,7 +7184,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) g_free(name); } -void ppc_cpu_list(void) +static void ppc_cpu_list(void) { GSList *list; @@ -7525,6 +7525,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) &pcc->parent_phases); cc->class_by_name = ppc_cpu_class_by_name; + cc->list_cpus = ppc_cpu_list; cc->mmu_index = ppc_cpu_mmu_index; cc->dump_state = ppc_cpu_dump_state; cc->set_pc = ppc_cpu_set_pc; From patchwork Sun Mar 23 22:40:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875636 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp1881001wrb; Sun, 23 Mar 2025 15:41:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXJ7YxTDTJ5OwTRGz9REE6W4OU/7WFT3V7jvfy+z3ir26M8SHypRjvGkexOT/qutxKPrtWJ8Q==@linaro.org X-Google-Smtp-Source: AGHT+IGgmGaRzn4u7cORjghOYtOd2JQzIacxHzAf60SRp2HQ7e7NZL0N3amG6TGWbQwHLlCLSjZj X-Received: by 2002:a05:620a:1a95:b0:7c5:6e5d:301d with SMTP id af79cd13be357-7c5ba12db0cmr1312235685a.1.1742769697688; Sun, 23 Mar 2025 15:41:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742769697; cv=none; d=google.com; s=arc-20240605; b=O4Ll3HBQZzuwtRCLRSgjUF3s9bZt5k0QnaHNwrdL9tiKBpBGdeGD1OdpUnao3BldTV 4458ptLedM38prJCEyyYvIM+NSaeWGndTt52iS941sKdfYOweyTeV1hLbwOXUT8AtGDY moZkhm3Lhy51Znm9fvMJjtxsdFvmOBeOAHjNk3HFokjIjAV7SzpqExjQ4or359x4wLe0 6a8R+hajnnsIzHoPsk+3mN5dluveoYCujtubg1be3+9e6Hx0nIItPQmIolqQJNccxxeJ K25D0GBdiA8dts+jiv5JgZuZe+aTYGzAyWbqEwxEFtvWCj3Falah+PfO9N968yrzY1r1 a0ig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=F3UrwbOIIaM8kGadwD98OC60MbBxsesgGxlGmJo4cKw=; fh=fS/4rnnLwcRgvOOCJ1cvfiQufE+14bwOLEAj2Zueb4I=; b=ZOdMPPiO+eIWwlbDV5qcrug2UI/xk0Id7xwvLMS1SAO2wHf/S5xDPx15Ph8gYG2UEc L8cnpy2XGVRjikO2WvwybWnh1OqCt8f9WsH/7pji5Z+nu2FwQkCKzyBsN5dh4Cm8Acjt JWxJDGFgINXgvthntDRfgzqyzmlyT2wbNRv003cvqfNiTh10cEM56rtYp4UrIT7WYAI7 qYa31einJMe/zGrE/l6w708lbdBLFWUSsafG7S315Q8QYxAZa50xA7Dj8ovuHgLT1H/m 3WzJ0lSJ4dCjVMOs3fOF5fdPXj7UrxBtNaWOvKwBk+xtbmR0TrwC0hpnRST/gFHpy+ji S1+w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kyGoI3db; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d43f47196sm150164465e9.16.2025.03.23.15.40.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:40:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 4/6] target/sparc: Register CPUClass:list_cpus Date: Sun, 23 Mar 2025 23:40:33 +0100 Message-ID: <20250323224035.34698-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Register sparc_cpu_list() as CPUClass:list_cpus callback. Reduce its scope and remove the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/sparc/cpu.h | 3 --- target/sparc/cpu.c | 3 ++- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 462bcb6c0e6..7c6296ae70e 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -594,7 +594,6 @@ G_NORETURN void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t); /* cpu_init.c */ void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); -void sparc_cpu_list(void); /* mmu_helper.c */ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, @@ -665,8 +664,6 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, #define CPU_RESOLVING_TYPE TYPE_SPARC_CPU -#define cpu_list sparc_cpu_list - /* MMU modes definitions */ #if defined (TARGET_SPARC64) #define MMU_USER_IDX 0 diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 57161201173..635d5d81143 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -579,7 +579,7 @@ static void print_features(uint32_t features, const char *prefix) } } -void sparc_cpu_list(void) +static void sparc_cpu_list(void) { unsigned int i; @@ -1031,6 +1031,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = sparc_cpu_class_by_name; + cc->list_cpus = sparc_cpu_list, cc->parse_features = sparc_cpu_parse_features; cc->mmu_index = sparc_cpu_mmu_index; cc->dump_state = sparc_cpu_dump_state; From patchwork Sun Mar 23 22:40:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875637 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp1881061wrb; Sun, 23 Mar 2025 15:41:56 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWersZ4PeijUoWPo3MdVPHWVTpMkeOWoWt+dFUEKOewZU3M4Xo60yB6923Ljn6xX0zM+aw8+w==@linaro.org X-Google-Smtp-Source: AGHT+IG/6f1moW8uj4llGBSmxf8VNk1F1FYT608kxjZH2ENLA9t+/P3IswgC3acn5Jlut+Fv62io X-Received: by 2002:a05:622a:1b01:b0:467:6563:8b1d with SMTP id d75a77b69052e-47710c0182emr192233621cf.6.1742769716468; Sun, 23 Mar 2025 15:41:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742769716; cv=none; d=google.com; s=arc-20240605; b=QyjizYVcb3gOpMkbT4pBN/L0vXOkdmK1LIZNZVQ0jw7EWQnM5jitQVEuFwDNhg4Zqo E5YFGhDh62H9urz6C/Sh+dHuu0LrcqTCVAMTbrfh3JIsurjB94AsFUrrjb9SblrZZYt4 g1KNa9/zC6ajQ1L4q7+cLxxUUd4beTKUconju3bKPef6AHYs/CnRrdn3oBEmMveksilY d/FdII9AYXjLLSoHNFa3DdzNFK2mpJtC/s6gOw85sHXcO1oMocymD/LO30jcM6L7b8FZ 6YdxGQg7L7bYhNBmYxhEVJ0XXp9OfhVIe2FwLw+pz492R74IvAbQt8qstydJ5fBCl8ah 2lKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=T3Zk7MdXWZU4ANE3vptmnFw5A7ucP+LsDCikXZArmmk=; fh=fS/4rnnLwcRgvOOCJ1cvfiQufE+14bwOLEAj2Zueb4I=; b=esPFjtX9CDRg41ykUoYYgNToIt1LaErhBDqNTNDfEptkE+s6BojsoKzubTIrcQI3gU g9FDBlEEDUXMsnehi6Fdj44YbRzgttoyJKnB6ZSbW1HYqV6erRtkNhfwcz4gOAMp5Ryk ZIXOnehJ+Azlqr+1/1DmE/pqt6z5Yf2IM0LEiifNvQSF1cldd2Rf4Q40RWZqb+O1Wzj2 6r01Bl61gOBlP/LckHt9/pqhGQ/kkYHGWUXJ8JRLRI8ji2NyPjzzsI4QdCum0yVNybSl yz00lriptf+2nWZe0e37KfaeJk//zzj1w43EP9gn4ugGBN0YZH1xNILVE3PxbHCsmyhR j2jw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kBTiumsq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fcea65fsm103407795e9.7.2025.03.23.15.41.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:41:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 5/6] target/sparc: Register CPUClass:list_cpus Date: Sun, 23 Mar 2025 23:40:34 +0100 Message-ID: <20250323224035.34698-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Register sparc_cpu_list() as CPUClass:list_cpus callback and remove the cpu_list definition. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.h | 1 - target/s390x/cpu.c | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 5b7992deda6..1aac967a0ce 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -902,7 +902,6 @@ static inline uint8_t s390_cpu_get_state(S390CPU *cpu) /* cpu_models.c */ void s390_cpu_list(void); -#define cpu_list s390_cpu_list void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga, const S390FeatInit feat_init); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 1f75629ddc2..ac05e82f0ac 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -378,6 +378,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) &scc->parent_phases); cc->class_by_name = s390_cpu_class_by_name; + cc->list_cpus = s390_cpu_list; cc->mmu_index = s390x_cpu_mmu_index; cc->dump_state = s390_cpu_dump_state; cc->query_cpu_fast = s390_query_cpu_fast; From patchwork Sun Mar 23 22:40:35 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 875641 Delivered-To: patch@linaro.org Received: by 2002:a5d:5f4c:0:b0:38f:210b:807b with SMTP id cm12csp1881174wrb; Sun, 23 Mar 2025 15:42:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWHt+Cqf54c2pIUkPJCqO08gMgUBu6pxh7ZfF9S4cpk7ISOj2XrGfljnLt6Xvem1whSNWcBRQ==@linaro.org X-Google-Smtp-Source: AGHT+IHPaxJoYEqzeuFcjGWwlE4i3uEGxJiV7jwksn2/DZCfDGGS9JmkxIO3nl35g9h4ZU8k6auQ X-Received: by 2002:a05:620a:29d1:b0:7c5:9c12:fc8 with SMTP id af79cd13be357-7c5ba21143dmr1367849685a.38.1742769752823; Sun, 23 Mar 2025 15:42:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1742769752; cv=none; d=google.com; s=arc-20240605; b=LEzp4iomQDjGQmtOpcByJbDRir8aKVLxLtN07merDgUfCr3fy+WaVZAawDIb5Ql1eL +ewXPz10CAd9GZdFYGkqrttPzYFKmZJOWny8UirRldAPD10KwY5aIFLEigoRbvhqfQP+ 8UfNHNgq7CB4FxzGNEr1t4KZHHmjS8O30FX5lgFa8QT9ARKBNV7kD+u8tbF1AcoBj/bh 0x0wJCyJkiyQaRezdaadExjpvCHugYXq6mANcwUx/3IbK7LAlQli3lcs7RLl2DE9xZ65 O2b8sIvWHvUaVuIT6PrJCCn2sxyR+NIFC7zhqiFRa70oktJpEBuPhZ7fH2RlfE9rdJkf LBUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=dCQIZKUBzJuxBIof22dcIv0mCLqdpttz0aPD7GjZTzg=; fh=fS/4rnnLwcRgvOOCJ1cvfiQufE+14bwOLEAj2Zueb4I=; b=S1J5xo3y1CEJg8wB97pGExuoZZsytJ6uE0senp4mB5KyEitGMn9R7+VxTCbuuez3bu c94yLxU6RURZJQ9O4yNllJl4DeWO8AvAAiKYHNQCHlf8cB5mMq3jsv/RWGSoGMsNG9dz VF0QsE8jZNBIA/CVJ/DeQpmj/2z+cgu72+3MjYKBAV36r6Jf5eG/4v8lSfvGixTWh4OI R5DRlwEWpVQEDUYg/hvFS6YG+9z0ksrjeyKNE5F+0pqEqAQBHsUm9VCubdDrcb+4fU9d b0JzK78nwA23yprqVjSZKWowarKdhRYfkD90BfF+yPbybnN92NgdCyGaD8aJWjoE5VdG tU2A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VJG5IBZJ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d4fdbd1c7sm102399385e9.40.2025.03.23.15.41.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 23 Mar 2025 15:41:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Daniel Henrique Barboza , qemu-s390x@nongnu.org, Artyom Tarasenko , Thomas Huth , Nicholas Piggin , qemu-ppc@nongnu.org, Zhao Liu , Richard Henderson , Pierrick Bouvier , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH-for-10.1 6/6] cpus: Remove #ifdef check on cpu_list definition Date: Sun, 23 Mar 2025 23:40:35 +0100 Message-ID: <20250323224035.34698-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250323224035.34698-1-philmd@linaro.org> References: <20250323224035.34698-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Since we removed all definitions of cpu_list, the #ifdef check is always true. Remove it, inlining cpu_list(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- cpu-target.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 5947ca31a0a..30598619581 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -71,7 +71,6 @@ const char *parse_cpu_option(const char *cpu_option) return cpu_type; } -#ifndef cpu_list static void cpu_list_entry(gpointer data, gpointer user_data) { CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data)); @@ -85,17 +84,6 @@ static void cpu_list_entry(gpointer data, gpointer user_data) } } -static void cpu_list(void) -{ - GSList *list; - - list = object_class_get_list_sorted(TYPE_CPU, false); - qemu_printf("Available CPUs:\n"); - g_slist_foreach(list, cpu_list_entry, NULL); - g_slist_free(list); -} -#endif - void list_cpus(void) { CPUClass *cc = CPU_CLASS(object_class_by_name(CPU_RESOLVING_TYPE)); @@ -103,7 +91,12 @@ void list_cpus(void) if (cc->list_cpus) { cc->list_cpus(); } else { - cpu_list(); + GSList *list; + + list = object_class_get_list_sorted(TYPE_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, cpu_list_entry, NULL); + g_slist_free(list); } }