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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2c670f86a17sm478881fac.6.2025.03.13.14.21.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Mar 2025 14:21:38 -0700 (PDT) From: Bjorn Andersson Date: Thu, 13 Mar 2025 14:27:27 -0700 Subject: [PATCH] pinctrl: qcom: tlmm-test: Validate irq_enable delivers edge irqs Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250313-tlmm-test-disabled-irq-delivered-v1-1-f0be903732ac@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIAL5N02cC/x3NQQ6CMBBG4auQWTtJCxKUqxgXrf2VSQroTENMC He3cflt3tvJoAKjsdlJsYnJulT4U0OPKSwvsKRqal3bu853XPI8c4EVTmIhZiQW/XBClg1aFdz QX6L353gF1cxb8ZTvf3G7H8cPwud4nnIAAAA= X-Change-ID: 20250313-tlmm-test-disabled-irq-delivered-a0758b114b9e To: Bjorn Andersson , Linus Walleij Cc: Douglas Anderson , Stephan Gerhold , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2379; i=bjorn.andersson@oss.qualcomm.com; h=from:subject:message-id; bh=bxwRGhp1n0pI0/lcXsC1uFENkA1yhmJSWsvPZhEto9M=; b=owEBgwJ8/ZANAwAIAQsfOT8Nma3FAcsmYgBn003G2C9slR48Upk3nATcOyK7ugL3Dasv72Zrc Ggcd/i3JqKJAkkEAAEIADMWIQQF3gPMXzXqTwlm1SULHzk/DZmtxQUCZ9NNxhUcYW5kZXJzc29u QGtlcm5lbC5vcmcACgkQCx85Pw2ZrcVLTA/8CBpkKNPjbvMqFrVl/S2Oogv2nA49C9YOM9prNGh dhu9KoK73LDA7Oxn7nAGNigeEgvbpYq0wkT4c4ZYn+kF0zDiw+NwzNL7vXJOGk9YfFNdz+Z1ceo Klicq4sQM+yo2tOrThul7pxbNOITiRg9dUeA6vJDZr44nf3+Ej82x1EFSKGDJLEgfOGbeE0gL9L ClZhez2hmFXWrUWOPQzt0+vKOF3+B2yhgYswaeOogtT7b8LoWPff8mRrpWvaUH0Nw2tgwUCI+Cd 4che8RE60va7HiY41JWhn2uUzkICEqqNyHvhLWmPcp1ba3Ur0u6XDLdL1OTW2R1/IYL9QM3/qEI 4nN8JlVdBwfJHYUVylQL+3Jclx1F1ECBKKTX6Ur361ojmLJQkQUWzglrLHS7QJz62Lv+H94T486 8ymFVLKrIJaM6ttQ054D96IL+S219QoIZ4D2+t91yPQj/PHe8bRl2wpceOggjpiOmzTxu31/7rd oMIZ+twN7dbC5JvcNXt9TKf+6Fo4ZSvFhyF0qq5m9+A1tGtvgMmIRwVNxYR8ZeyAY6Vs+a5duh2 Zf5bnVC8XYYomIOKJUeLv818BH2Sf1Zif5fpz7V0VSGhCzbKuAEVCnMcsyltIPg7+9pueBV/wMP pezNPdwuPWymGDtyL00dbTTfrtVXiUMlYMjJclTxOSCY= X-Developer-Key: i=bjorn.andersson@oss.qualcomm.com; a=openpgp; fpr=05DE03CC5F35EA4F0966D5250B1F393F0D99ADC5 X-Authority-Analysis: v=2.4 cv=PtWTbxM3 c=1 sm=1 tr=0 ts=67d34c64 cx=c_pps a=z9lCQkyTxNhZyzAvolXo/A==:117 a=DaeiM5VmU20ml6RIjrOvYw==:17 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=EUspDBNiAAAA:8 a=qPeax27BKI-lfaCsB2gA:9 a=QEXdDO2ut3YA:10 a=EyFUmsFV_t8cxB2kMr4A:22 X-Proofpoint-GUID: J16GhR7VFsPX1SImtHFlB0Msf7GbZXa- X-Proofpoint-ORIG-GUID: J16GhR7VFsPX1SImtHFlB0Msf7GbZXa- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1093,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-13_10,2025-03-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 mlxscore=0 mlxlogscore=999 impostorscore=0 spamscore=0 adultscore=0 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 suspectscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2503130164 In commit 'cf9d052aa600 ("pinctrl: qcom: Don't clear pending interrupts when enabling")' Doug establishes an expectation that edge interrupts occurring while an interrupt is disabled should be delivered once the interrupt is enabled again. Implement a test to validate that this is the case. Signed-off-by: Bjorn Andersson --- drivers/pinctrl/qcom/tlmm-test.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) --- base-commit: 9fbcd7b32bf7c0a5bda0f22c25df29d00a872017 change-id: 20250313-tlmm-test-disabled-irq-delivered-a0758b114b9e Best regards, diff --git a/drivers/pinctrl/qcom/tlmm-test.c b/drivers/pinctrl/qcom/tlmm-test.c index 9c31798b3c08b59ba9a77454a297ac6630cf829f..fd02bf3a76cbccd290735f77f19dfb26730be679 100644 --- a/drivers/pinctrl/qcom/tlmm-test.c +++ b/drivers/pinctrl/qcom/tlmm-test.c @@ -506,6 +506,42 @@ static void tlmm_test_thread_falling_in_handler(struct kunit *test) KUNIT_ASSERT_EQ(test, atomic_read(&priv->thread_count), 10); } +/* + * Validate that edge interrupts occurring while irq is disabled is delivered + * once the interrupt is reenabled. + */ +static void tlmm_test_rising_while_disabled(struct kunit *test) +{ + struct tlmm_test_priv *priv = test->priv; + unsigned int after_edge; + unsigned int before_edge; + + priv->intr_op = TLMM_TEST_COUNT; + atomic_set(&priv->thread_op_remain, 10); + + tlmm_output_low(); + + tlmm_test_request_hard_irq(test, IRQF_TRIGGER_RISING); + msleep(20); + + disable_irq(tlmm_suite.irq); + before_edge = atomic_read(&priv->intr_count); + + tlmm_output_high(); + msleep(20); + after_edge = atomic_read(&priv->intr_count); + + msleep(20); + enable_irq(tlmm_suite.irq); + msleep(20); + + free_irq(tlmm_suite.irq, priv); + + KUNIT_ASSERT_EQ(test, before_edge, 0); + KUNIT_ASSERT_EQ(test, after_edge, 0); + KUNIT_ASSERT_EQ(test, atomic_read(&priv->intr_count), 1); +} + static int tlmm_test_init(struct kunit *test) { struct tlmm_test_priv *priv; @@ -609,6 +645,7 @@ static struct kunit_case tlmm_test_cases[] = { KUNIT_CASE(tlmm_test_thread_low), KUNIT_CASE(tlmm_test_thread_rising_in_handler), KUNIT_CASE(tlmm_test_thread_falling_in_handler), + KUNIT_CASE(tlmm_test_rising_while_disabled), {} };