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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:07:56 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 1/7] dt-bindings: arm: Correct links to idle states definitions Date: Tue, 3 Mar 2020 16:07:43 +0100 Message-Id: <20200303150749.30566-2-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 The arm,idle-state DT bindings recently got converted to the json-schema, but some links are still pointing to the old, non-existing, txt file. Let's update the links to fix this. Fixes: baac82fe06db ("dt-bindings: arm: Convert arm,idle-state binding to DT schema") Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 +- Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt | 2 +- Documentation/devicetree/bindings/arm/psci.yaml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index f61a5a13fb42..31b391a24b70 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -226,7 +226,7 @@ properties: $ref: '/schemas/types.yaml#/definitions/phandle-array' description: | List of phandles to idle state nodes supported - by this cpu (see ./idle-states.txt). + by this cpu (see ./idle-states.yaml). capacity-dmips-mhz: $ref: '/schemas/types.yaml#/definitions/uint32' diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt b/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt index 06df04cc827a..6ce0b212ec6d 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt +++ b/Documentation/devicetree/bindings/arm/msm/qcom,idle-state.txt @@ -81,4 +81,4 @@ Example: }; }; -[1]. Documentation/devicetree/bindings/arm/idle-states.txt +[1]. Documentation/devicetree/bindings/arm/idle-states.yaml diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 8ef85420b2ab..f8218e60e3e2 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -100,7 +100,7 @@ properties: bindings in [1]) must specify this property. [1] Kernel documentation - ARM idle states bindings - Documentation/devicetree/bindings/arm/idle-states.txt + Documentation/devicetree/bindings/arm/idle-states.yaml "#power-domain-cells": description: From patchwork Tue Mar 3 15:07:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 184126 Delivered-To: patches@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp3767800ile; Tue, 3 Mar 2020 07:07:59 -0800 (PST) X-Received: by 2002:a05:651c:44b:: with SMTP id g11mr2630610ljg.168.1583248079626; Tue, 03 Mar 2020 07:07:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583248079; cv=none; d=google.com; s=arc-20160816; b=oyJkmYghpZiKQTpPmnp/E0qkmq5BzKM4gMadLmOWOuxO2TcYWv8/arZXTs8qdwQiEd 2v4nO94tRmodwuGO/GWcI2Aufv5a93Z40HNP9Js85HzmUA3E2BDec659qxnzZjyE1Ezg NqdtPqKrZrwF5fWWV3x2IotDK+PpTQ2RhebIpRxi5mmBMaTcx7y20EkFYR/JcbxUCuHQ +i5uWU4AiYEwcLI6FAEWfpx2DoBIcGVVOnK1516cIG55CJG/T49aBkJ9Dcvv5CJ5oTQF WRpH5YxlRSUvOa2k+BEimdhfSVH/jAtEPPBwUYlF3Q8LDrC4E9pZwzrlj7QpkogA2Ybd hUMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=B30v3NBJ89pTZvCRAyGguiMnt+PH3RI+BA4eDrldRLY=; b=js0PK7xZl6agZp28n+Tw6dECUyox4DkL5+qeX10sWHfW3BRT64WKYlOkPc1iJViU0B Ta3C4zN+vCff7X3WxljRG+AzsCSSRQBkhNqNmJm6eAHWSpSWr+wrnqfDJPVU8kz1Qn/8 pw3AzupF1VChtV8HM3trT9A7LwoFDQkyese4x3YjkJshH4//AFDHTTXr+WSnnxw5cYlc /6aDwwU03vUEW5edmoq9EPKAy0L+5aA94IBpSK4taX7rQ05pidR8BY26vxNWbCy5w4zA J6aKJMW5VKDsGtiyA6tk0UdRh8zVZASmVoa6kvGFHrWTCKq99i3wlmpoaOildnU/PTUL FXMw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="k/Z9gXXq"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.07.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:07:58 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 2/7] dt-bindings: arm: Fix cpu compatibles in the hierarchical example for PSCI Date: Tue, 3 Mar 2020 16:07:44 +0100 Message-Id: <20200303150749.30566-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/arm/psci.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index f8218e60e3e2..540211a080d4 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -199,7 +199,7 @@ examples: CPU0: cpu@0 { device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; + compatible = "arm,cortex-a53"; reg = <0x0>; enable-method = "psci"; power-domains = <&CPU_PD0>; @@ -208,7 +208,7 @@ examples: CPU1: cpu@1 { device_type = "cpu"; - compatible = "arm,cortex-a57", "arm,armv8"; + compatible = "arm,cortex-a53"; reg = <0x100>; enable-method = "psci"; power-domains = <&CPU_PD1>; From patchwork Tue Mar 3 15:07:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 184127 Delivered-To: patches@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp3767835ile; Tue, 3 Mar 2020 07:08:01 -0800 (PST) X-Received: by 2002:a2e:8e31:: with SMTP id r17mr2857230ljk.211.1583248081293; Tue, 03 Mar 2020 07:08:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583248081; cv=none; d=google.com; s=arc-20160816; b=Lb/oPqSfFm2Zf/Xk7w5DpuPVZKKpADbRu6qb6ng8AjaBE8zgC/B3IJOsfFoKWcRKis k/lud0TDg1LBEW8EI/iOYGTqWGanbdw3L1SM8PPs9OSINfpbYdIzKdudMBOtUz0OKFn6 tXvVuXRqcfTA5yJaSeG8E5oG7J95BpuWDGXLhcVqtvKknMANTodanGBuO+gFAXujkR/N dkCfyxBsA0NeYEETabpDCxA+ZpmEG/t6li8ny12dQSe+0HaDaLaFnZqYwTxNp+1R8bQc zvtQZUm/kojY3U1/5R9g5odvrqClKwi9FibsAmS0b/KHS8UMy5AfueCDT924CRwNzI5m G9mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=KjdkayiJ3LtaxLYwkOTc4CgwJfOkW9drdJX4syz3ipw=; b=ETT6LyOyeFcYRcw/Z8yocZI6MLm1Y0DeN1IeDEpRPQvwUUnZXo39VjeXW5/8lv2QAz /bxSxzCqnN3O3bP1m4uml9JLXx9R9xfJl6BVktmFruNNa22hCM+K+HApzIotxy+45ODm eQ+H637zEi7JIz74zCTZ1p+0LBHbVE95eWcojuOJG4yWJjLOuPptMYhQsGQnjFIXQi/P 8MonmzlE5OMxLgKYU597YpUeV9TCwdEtM4cbhEquhEvLQ+eiZ1Edd0sYng+QGQX6PXPS J9tkz5C5CV9OnnwGHevlvTfmJHbaltEnUIITxFeMptHnuJMEHXOBOfaljdVjtvd2zgbj A7QQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RLvtGSvl; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.07.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:08:00 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 3/7] dt-bindings: power: Convert domain-idle-states bindings to json-schema Date: Tue, 3 Mar 2020 16:07:45 +0100 Message-Id: <20200303150749.30566-4-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 While converting to the json-schema, let's also take the opportunity to further specify/clarify some more details about the DT binding. For example, let's define the label where to put the states nodes, set a pattern for nodename of the state nodes and finally add an example. Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- .../devicetree/bindings/arm/psci.yaml | 2 +- .../bindings/power/domain-idle-state.txt | 33 --------- .../bindings/power/domain-idle-state.yaml | 67 +++++++++++++++++++ .../bindings/power/power-domain.yaml | 22 +++--- .../bindings/power/power_domain.txt | 2 +- 5 files changed, 79 insertions(+), 47 deletions(-) delete mode 100644 Documentation/devicetree/bindings/power/domain-idle-state.txt create mode 100644 Documentation/devicetree/bindings/power/domain-idle-state.yaml -- 2.20.1 diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 540211a080d4..0bc3c43a525a 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -123,7 +123,7 @@ properties: to mandate it. [3] Documentation/devicetree/bindings/power/power_domain.txt - [4] Documentation/devicetree/bindings/power/domain-idle-state.txt + [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml power-domains: $ref: '/schemas/types.yaml#/definitions/phandle-array' diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.txt b/Documentation/devicetree/bindings/power/domain-idle-state.txt deleted file mode 100644 index eefc7ed22ca2..000000000000 --- a/Documentation/devicetree/bindings/power/domain-idle-state.txt +++ /dev/null @@ -1,33 +0,0 @@ -PM Domain Idle State Node: - -A domain idle state node represents the state parameters that will be used to -select the state when there are no active components in the domain. - -The state node has the following parameters - - -- compatible: - Usage: Required - Value type: - Definition: Must be "domain-idle-state". - -- entry-latency-us - Usage: Required - Value type: - Definition: u32 value representing worst case latency in - microseconds required to enter the idle state. - The exit-latency-us duration may be guaranteed - only after entry-latency-us has passed. - -- exit-latency-us - Usage: Required - Value type: - Definition: u32 value representing worst case latency - in microseconds required to exit the idle state. - -- min-residency-us - Usage: Required - Value type: - Definition: u32 value representing minimum residency duration - in microseconds after which the idle state will yield - power benefits after overcoming the overhead in entering -i the idle state. diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml new file mode 100644 index 000000000000..27da43076b85 --- /dev/null +++ b/Documentation/devicetree/bindings/power/domain-idle-state.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/domain-idle-state.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PM Domain Idle States binding description + +maintainers: + - Ulf Hansson + +description: + A domain idle state node represents the state parameters that will be used to + select the state when there are no active components in the PM domain. + +properties: + $nodename: + const: domain-idle-states + +patternProperties: + "^(cpu|cluster|domain)-": + type: object + description: + Each state node represents a domain idle state description. + + properties: + compatible: + const: domain-idle-state + + entry-latency-us: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The worst case latency in microseconds required to enter the idle + state. Note that, the exit-latency-us duration may be guaranteed only + after the entry-latency-us has passed. + + exit-latency-us: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The worst case latency in microseconds required to exit the idle + state. + + min-residency-us: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The minimum residency duration in microseconds after which the idle + state will yield power benefits, after overcoming the overhead while + entering the idle state. + + required: + - compatible + - entry-latency-us + - exit-latency-us + - min-residency-us + +examples: + - | + + domain-idle-states { + domain_retention: domain-retention { + compatible = "domain-idle-state"; + entry-latency-us = <20>; + exit-latency-us = <40>; + min-residency-us = <80>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index 455b573293ae..207e63ae10f9 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -29,18 +29,16 @@ properties: domain-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array - description: - A phandle of an idle-state that shall be soaked into a generic domain - power state. The idle state definitions are compatible with - domain-idle-state specified in - Documentation/devicetree/bindings/power/domain-idle-state.txt - phandles that are not compatible with domain-idle-state will be ignored. - The domain-idle-state property reflects the idle state of this PM domain - and not the idle states of the devices or sub-domains in the PM domain. - Devices and sub-domains have their own idle-states independent - of the parent domain's idle states. In the absence of this property, - the domain would be considered as capable of being powered-on - or powered-off. + description: | + Phandles of idle states that defines the available states for the + power-domain provider. The idle state definitions are compatible with the + domain-idle-state bindings, specified in ./domain-idle-state.yaml. + + Note that, the domain-idle-state property reflects the idle states of this + PM domain and not the idle states of the devices or sub-domains in the PM + domain. Devices and sub-domains have their own idle states independent of + the parent domain's idle states. In the absence of this property, the + domain would be considered as capable of being powered-on or powered-off. operating-points-v2: $ref: /schemas/types.yaml#/definitions/phandle-array diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt index 5b09b2deb483..08497ef26c7a 100644 --- a/Documentation/devicetree/bindings/power/power_domain.txt +++ b/Documentation/devicetree/bindings/power/power_domain.txt @@ -109,4 +109,4 @@ Example: required-opps = <&domain1_opp_1>; }; -[1]. Documentation/devicetree/bindings/power/domain-idle-state.txt +[1]. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.08.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:08:01 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 4/7] dt-bindings: power: Extend nodename pattern for power-domain providers Date: Tue, 3 Mar 2020 16:07:46 +0100 Message-Id: <20200303150749.30566-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 The existing binding requires the nodename to have a '@', which is a bit limiting for the wider use case. Therefore, let's extend the pattern to allow either '@' or '-'. Additionally, let's update one of the examples to show how the updated pattern could be used. Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/power/power-domain.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index 207e63ae10f9..dc232759013e 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -25,7 +25,7 @@ description: |+ properties: $nodename: - pattern: "^(power-controller|power-domain)(@.*)?$" + pattern: "^(power-controller|power-domain)([@-].*)?$" domain-idle-states: $ref: /schemas/types.yaml#/definitions/phandle-array @@ -71,13 +71,13 @@ required: examples: - | - power: power-controller@12340000 { - compatible = "foo,power-controller"; + power: power-domain-foo { + compatible = "foo,power-domain"; reg = <0x12340000 0x1000>; #power-domain-cells = <1>; }; - // The node above defines a power controller that is a PM domain provider and + // The node above defines a power domain that is a PM domain provider and // expects one cell as its phandle argument. - | From patchwork Tue Mar 3 15:07:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 184129 Delivered-To: patches@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp3767899ile; Tue, 3 Mar 2020 07:08:04 -0800 (PST) X-Received: by 2002:ac2:532f:: with SMTP id f15mr3025951lfh.3.1583248084009; Tue, 03 Mar 2020 07:08:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583248084; cv=none; d=google.com; s=arc-20160816; b=0tnU+Q3NT4CAE5wekT6JdeHcwqwhNFQMH93FosJiHK9MNqGvi5NRuZMnQCy+H0LXLI w0gHDkGQSeATqFkroYetSY+cJGaKaCga2lkzBS6/D8gsj3Q7h4AZ8n+ZLNg5dcwYQRt2 xBW4j6N5sUd8BEfGNbjuPwn4Q1bkUSnbbfxBWI9ew1GHF4gdPoqOajOhfT+1hfmDHzpr Jnvg92ghREudYaJB7oKwNSDeNYb6CmwxFrviltJbQZpgXn4slKQYU5OgGvIf+0Bt/OCg 3CfmFqG2bwX98UVJIkhUdWfLADC/Lsst0cYjE3xMpQ0HpA4Pv/mueazZ/odPbIKN6FMX Pdww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=/NDACQevUaDc6JLaPGhMJ8UIpdipROa3WbiIGkpAEKo=; b=QknDgtSOVVpWjh1QiDfyl+/MBh/4zakqSHhn6+t1a46mNB0eEg/lw2PI0ynlLYLs/D PlpMvApb5CG+GIcU2ND9od2eVZWWm3NHG41y3GkbDi8bfrqQnaPt3INtud/18R443tpt 8BoRqedLFR2kMvZk5+THJsSS/G3ML+t1pDIe6u7U7bxSFMolnYsWt4fPj0+wYUfCSPHa wziE5POqdVkZN21IQLBwypophNq0EgPN/6s0xbEv2YSkgqujvQh0pSgY8Dh6r7MJs8aJ vvdH+R9vfB/uE0JKpYJ8F1nXqrMQ2TuxL1Pci4G1/OoizKPG0yYR7tld0/OYlDQ4nKWS /2Mw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T4WeVLCj; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.08.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:08:02 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 5/7] dt-bindings: arm: Fixup the DT bindings for hierarchical PSCI states Date: Tue, 3 Mar 2020 16:07:47 +0100 Message-Id: <20200303150749.30566-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 The hierarchical topology with power-domain should be described through child nodes, rather than as currently described in the PSCI root node. Fix this by adding a patternProperties with a corresponding reference to the power-domain DT binding. Additionally, update the example to conform to the new pattern, but also to the adjusted domain-idle-state DT binding. Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- .../devicetree/bindings/arm/psci.yaml | 33 +++++++++---------- 1 file changed, 15 insertions(+), 18 deletions(-) -- 2.20.1 diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index 0bc3c43a525a..cae668b61265 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -102,11 +102,15 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/arm/idle-states.yaml - "#power-domain-cells": - description: - The number of cells in a PM domain specifier as per binding in [3]. - Must be 0 as to represent a single PM domain. +required: + - compatible + - method +patternProperties: + "^(power-controller|power-domain)([@-].*)?$": + $ref: "../power/power-domain.yaml#" + type: object + description: | ARM systems can have multiple cores, sometimes in an hierarchical arrangement. This often, but not always, maps directly to the processor power topology of the system. Individual nodes in a topology have their @@ -122,19 +126,9 @@ properties: helps to implement support for OSI mode and OS implementations may choose to mandate it. - [3] Documentation/devicetree/bindings/power/power_domain.txt + [3] Documentation/devicetree/bindings/power/power-domain.yaml [4] Documentation/devicetree/bindings/power/domain-idle-state.yaml - power-domains: - $ref: '/schemas/types.yaml#/definitions/phandle-array' - description: - List of phandles and PM domain specifiers, as defined by bindings of the - PM domain provider. - -required: - - compatible - - method - allOf: - if: properties: @@ -224,6 +218,9 @@ examples: exit-latency-us = <10>; min-residency-us = <100>; }; + }; + + domain-idle-states { CLUSTER_RET: cluster-retention { compatible = "domain-idle-state"; @@ -247,19 +244,19 @@ examples: compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: cpu-pd0 { + CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; power-domains = <&CLUSTER_PD>; }; - CPU_PD1: cpu-pd1 { + CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; domain-idle-states = <&CPU_PWRDN>; power-domains = <&CLUSTER_PD>; }; - CLUSTER_PD: cluster-pd { + CLUSTER_PD: power-domain-cluster { #power-domain-cells = <0>; domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; }; From patchwork Tue Mar 3 15:07:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 184130 Delivered-To: patches@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp3767915ile; Tue, 3 Mar 2020 07:08:05 -0800 (PST) X-Received: by 2002:a2e:8e6e:: with SMTP id t14mr2703661ljk.149.1583248085387; Tue, 03 Mar 2020 07:08:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583248085; cv=none; d=google.com; s=arc-20160816; b=ZwQEPXLhWX6xnQzoctFjfyWtlIUlOJHBVYFwOyp2dq4a9hhyhRp50zC02vTDDTHS3O dK1CuzIuFjS5yWTyjnsO2cLmKUJDx6HLOiy97VegTjUArdNR8twpZnuj/+gOKMr6TrI+ GHswldMaLNG3bARG0W0nKSxyAWi6S9FcRGup7Zik3rv6gS2wimtbzupJoUZo7QdIUAMn aKhpjK6iZoNkaf3/DTlPX3DTMvQRDyyu8uk3CSN2ESU/QDIA/dPNOdCCTQP4GBxRDszD iwlI4BuSrzB+TOW/h/9MqEyJmbnl9Pnj3QBpNIzcsHg5I+EdSk4y5Zk4ljgeLJtEXOaH E6Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=qu4L8psLtSRHjye4pOVUdt2rrul0W+hLv//Rfvk00vc=; b=erBiGIRyFtODiWG2biq0LoN4M7iaD3zKZY0iaPJiFvmKg/R1Xnw1aF2ZnXl4j2TLxh PQx6bUhVT6DL34RxIaD8G+Q/FbG0DjChl2vuslruQtqMJqGcX1VCUSpN8tYOy5HrSkIy 6cpfDvJVasvY0+AyWUfs0uvhAKVtAb77Sg6ZTldpkjohBjLYVtgORt1BK+URXmsjKRty A+n0ioKJeES3EeGr29UN8m1WzzVwZnFNyiqh+kVjJ877RyuECXflGqVPOwnFOSPuq0+v 5ckxw3DNzINM7xt9A++TsBYuB71Jk6ITptosLH78uOjMG5QChEWLwrmCJczSiLU73xth 4pYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HEcMEkLe; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.08.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:08:04 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 6/7] arm64: dts: msm8916: Conform to the domain-idle-state DT binding Date: Tue, 3 Mar 2020 16:07:48 +0100 Message-Id: <20200303150749.30566-7-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 9f31064f2374..8f3f19e66cd8 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -165,6 +165,9 @@ min-residency-us = <2000>; local-timer-stop; }; + }; + + domain-idle-states { CLUSTER_RET: cluster-retention { compatible = "domain-idle-state"; From patchwork Tue Mar 3 15:07:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 184131 Delivered-To: patches@linaro.org Received: by 2002:a92:1f12:0:0:0:0:0 with SMTP id i18csp3767946ile; Tue, 3 Mar 2020 07:08:07 -0800 (PST) X-Received: by 2002:ac2:551d:: with SMTP id j29mr3164200lfk.81.1583248086861; Tue, 03 Mar 2020 07:08:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1583248086; cv=none; d=google.com; s=arc-20160816; b=po+TfdGR5IClkHUDGCmFOtUPHT2L1FP6HYsGl9R5+D91N9OSt67J5AcwR9mSvvaW0h 4ux70rltHURICBSRsYdRVXxaphCm25OdE+ohj83UP8yyCODLattw7FEpsclbODuYYZrj aj/POxwFDnqbe2G/ZIQBQdKKUBi4rDDux8vi+wZFp2vMjrXRWg6o8aSwNJf579kwuIE2 9Vy1G+S/JDXZPofLSVFFp+xv5hUELM/ScjqH442xxqZSRaj8+YhbDeFZOPq9RSGkdK0Z 7wHz0eJM9SIX5ahMT6v6boYGQocKAcp8o+jI0jxuSIVqBCqfpUXkAFV4BqGw9NUB1VJd IQyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=TmdxrNPqRhCx8T5wcSzQTrBCxn8/ALpsH7EvN6e+rcc=; b=eB2ZtxWPCCmWPkR/IYySwbBe/Ws945vvU/+wbOdEz9TpGfxeJaCXtrmI4jn2N/Elea AVw4HYbZP1+zRJ4nS/hDUBlqhl19qXJx0QJtP1Xl2Kc6J6KtsWTPbHWLwBAK9GpusBom ryR6H/kZ0v3UY7HBebzCo01sgejEUwePguYrGDkl5myKApL9doSTjvRLCgA4hUKx1k2j Sy62ZZ5P051Z47ZAKa1n0t/dsmSquSabqyaJoyYNQN9im29DwYBe10M2uE7N0TxaoqGI CcntOjv1AD0hWbUwk7k54q57Zh6cZkzlwfVTc3/60F8+5pbmWs8cUPzbvVz0EfYixLlc OQlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="XFi/4LPo"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id n189sm12143135lfa.14.2020.03.03.07.08.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 07:08:05 -0800 (PST) From: Ulf Hansson To: Rob Herring , Sudeep Holla , Lorenzo Pieralisi , devicetree@vger.kernel.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , Lina Iyer , Stephen Boyd , Bjorn Andersson , Benjamin Gaignard , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH 7/7] arm64: dts: msm8916: Conform to the nodename pattern for power-domain Date: Tue, 3 Mar 2020 16:07:49 +0100 Message-Id: <20200303150749.30566-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200303150749.30566-1-ulf.hansson@linaro.org> References: <20200303150749.30566-1-ulf.hansson@linaro.org> MIME-Version: 1.0 The nodename should either start with "power-controller" or "power-domain", so let's fix this. Fixes: a3f048b5424e ("dt: psci: Update DT bindings to support hierarchical PSCI states") Signed-off-by: Ulf Hansson --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.20.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 8f3f19e66cd8..1dd8da481709 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -191,31 +191,31 @@ compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: cpu-pd0 { + CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP_0>; }; - CPU_PD1: cpu-pd1 { + CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP_0>; }; - CPU_PD2: cpu-pd2 { + CPU_PD2: power-domain-cpu2 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP_0>; }; - CPU_PD3: cpu-pd3 { + CPU_PD3: power-domain-cpu3 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&CPU_SLEEP_0>; }; - CLUSTER_PD: cluster-pd { + CLUSTER_PD: power-domain-cluster { #power-domain-cells = <0>; domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; };