From patchwork Thu Feb 20 09:56:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 867569 Received: from smtp-190f.mail.infomaniak.ch (smtp-190f.mail.infomaniak.ch [185.125.25.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC1D71F03EE for ; Thu, 20 Feb 2025 09:57:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.125.25.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740045443; cv=none; b=fCWoodPuugQJFRwaNShcx5Mnbl7fKHTLCJzehmYLxgqup/51NFsgsEExl6dCreTMv0zVx4t6aANv+qja1IoahDLGr/No3UR9/ZWXUEN3jjwEQAO86B0N1GhNAKfu1JKgjMMCVwF7owhDYzYjSLFuaE5AsoKTyKw9nzlZ3p7PLtk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740045443; c=relaxed/simple; bh=bf8g/YXdtx1VUish3C6E+kFkY2PnMDnh+fkHBlxDPfk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=g5VxNjXS2lnvBgJ1xZl3zxIXg0Z1FqyUnvHlyfISpnO0SeZ8vJLFxoFsR4+c0Ra34P6qFpl04k6vSicHO349KoK67xoI4YZeq5fMQgqmbUaOiRUBA5iNzIE5nDMEXdP7S+iaeh0AHV6+ZZFLa2XMAtl07x1g3BGMLwJuJRSgdGA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=185.125.25.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-4-0000.mail.infomaniak.ch (unknown [IPv6:2001:1600:7:10:40ca:feff:fe05:0]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4Yz7w86PKwzXcq; Thu, 20 Feb 2025 10:57:12 +0100 (CET) Received: from unknown by smtp-4-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4Yz7w82DM1zcNN; Thu, 20 Feb 2025 10:57:12 +0100 (CET) From: Quentin Schulz Date: Thu, 20 Feb 2025 10:56:51 +0100 Subject: [PATCH 1/2] dt-bindings: gpio: nxp,pcf8575: add reset GPIO Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250220-pca976x-reset-driver-v1-1-6abbf043050e@cherry.de> References: <20250220-pca976x-reset-driver-v1-0-6abbf043050e@cherry.de> In-Reply-To: <20250220-pca976x-reset-driver-v1-0-6abbf043050e@cherry.de> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurent Pinchart Cc: Heiko Stuebner , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz A few of the I2C GPIO expander chips supported by this binding have a RESETN pin to be able to reset the chip. The chip is held in reset while the pin is low, therefore the polarity of reset-gpios is expected to reflect that, i.e. a GPIO_ACTIVE_HIGH means the GPIO will be held low for reset and released high, GPIO_ACTIVE_LOW means the GPIO will be held high for reset and released low. Out of the supported chips, only PCA9670, PCA9671, PCA9672 and PCA9673 show a RESETN pin in their datasheets. They all share the same reset timings, that is 4+us reset pulse[0] and 100+us reset time[0]. When performing a reset, "The PCA9670 registers and I2C-bus state machine will be held in their default state until the RESET input is once again HIGH."[1] meaning we now know the state of each line controlled by the GPIO expander. Therefore, setting lines-initial-states and reset-gpios both does not make sense and their presence is XOR'ed. [0] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf Fig 22. [1] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf 8.5 Signed-off-by: Quentin Schulz --- .../devicetree/bindings/gpio/nxp,pcf8575.yaml | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml index 3718103e966a13e1d77f73335ff73c18a3199469..d08d3f848f82e74de949da16d26a810dc52a74e5 100644 --- a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml +++ b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml @@ -73,6 +73,39 @@ properties: wakeup-source: true + reset-gpios: + maxItems: 1 + description: + GPIO controlling the (reset active LOW) RESET# pin. + + Performing a reset makes all lines initialized to their input (pulled-up) + state. + +allOf: + - if: + properties: + compatible: + not: + contains: + enum: + - nxp,pca9670 + - nxp,pca9671 + - nxp,pca9672 + - nxp,pca9673 + then: + properties: + reset-gpios: false + + # lines-initial-states XOR reset-gpios + # Performing a reset reinitializes all lines to a known state which + # may not match passed lines-initial-states + - if: + required: + - lines-initial-states + then: + properties: + reset-gpios: false + patternProperties: "^(.+-hog(-[0-9]+)?)$": type: object From patchwork Thu Feb 20 09:56:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 866907 Received: from smtp-42a9.mail.infomaniak.ch (smtp-42a9.mail.infomaniak.ch [84.16.66.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0FAE1F0E2E for ; Thu, 20 Feb 2025 09:57:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=84.16.66.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740045443; cv=none; b=f90XY9nUZcXQAqAe64qVSMVYyTHCdeMxqhjWfG9J9H+HufdFqEEDJf2S7lPG3P9mWSfuJNavlOBopIAOSmVoBF8kot9MhJCoYh+OcQ2YyCc5xOxgwRjDSIZj4sTzwl+XkNJ6ZiuDycljurows2VYdFY3hUNaodljZGL/taR8tKg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740045443; c=relaxed/simple; bh=jq9amKY0ztDFzt6Npf8OLiholOZMh+/kBQFq46MKJTI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=E+IgU3O+d3T7HqeDR9TD8IwXWMXeEtEGqBvnM9cZTqqU0VrXzpZQ4bDXoioonoc8b04ejsh9yBksOtmIGHXKCpGWTGySMi0fUdVrpoU5CfRXv+aJUYwlYcWDgqZsBmrfZhR7FftDYO2Z0LLuMMP8OSD8NMfJbyTknYeOQvjQ3sM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=84.16.66.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-4-0000.mail.infomaniak.ch (unknown [IPv6:2001:1600:7:10:40ca:feff:fe05:0]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4Yz7w937DtzXgN; Thu, 20 Feb 2025 10:57:13 +0100 (CET) Received: from unknown by smtp-4-0000.mail.infomaniak.ch (Postfix) with ESMTPA id 4Yz7w86HwQzZmv; Thu, 20 Feb 2025 10:57:12 +0100 (CET) From: Quentin Schulz Date: Thu, 20 Feb 2025 10:56:52 +0100 Subject: [PATCH 2/2] gpio: pcf857x: add support for reset-gpios on (most) PCA967x Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250220-pca976x-reset-driver-v1-2-6abbf043050e@cherry.de> References: <20250220-pca976x-reset-driver-v1-0-6abbf043050e@cherry.de> In-Reply-To: <20250220-pca976x-reset-driver-v1-0-6abbf043050e@cherry.de> To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Laurent Pinchart Cc: Heiko Stuebner , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha From: Quentin Schulz The PCA9670, PCA9671, PCA9672 and PCA9673 all have a RESETN input pin that is used to reset the I2C GPIO expander. One needs to hold this pin low for at least 4us and the reset should be finished after about 100us according to the datasheet[1]. Once the reset is done, the "registers and I2C-bus state machine will be held in their default state until the RESET input is once again HIGH.". Because the logic is reset, the latch values eventually provided in the Device Tree via lines-initial-states property are inapplicable so they are simply ignored if a reset GPIO is provided. [1] https://www.nxp.com/docs/en/data-sheet/PCA9670.pdf 8.5 and fig 22. Signed-off-by: Quentin Schulz Tested-by: Heiko Stuebner --- drivers/gpio/gpio-pcf857x.c | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index 7c57eaeb0afeba8953d998d8eec60a65b40efb6d..94077208e24ae99a1e8762e783f0eabc580fa520 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c @@ -5,6 +5,7 @@ * Copyright (C) 2007 David Brownell */ +#include #include #include #include @@ -272,12 +273,11 @@ static const struct irq_chip pcf857x_irq_chip = { static int pcf857x_probe(struct i2c_client *client) { + struct gpio_desc *rstn_gpio; struct pcf857x *gpio; - unsigned int n_latch = 0; + unsigned int n_latch; int status; - device_property_read_u32(&client->dev, "lines-initial-states", &n_latch); - /* Allocate, initialize, and register this gpio_chip. */ gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL); if (!gpio) @@ -297,6 +297,29 @@ static int pcf857x_probe(struct i2c_client *client) gpio->chip.direction_output = pcf857x_output; gpio->chip.ngpio = (uintptr_t)i2c_get_match_data(client); + rstn_gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(rstn_gpio)) { + return dev_err_probe(&client->dev, PTR_ERR(rstn_gpio), + "failed to get reset GPIO\n"); + } + + if (rstn_gpio) { + /* Reset already held with devm_gpiod_get_optional with GPIOD_OUT_HIGH */ + usleep_range(4, 8); /* tw(rst) > 4us */ + gpiod_set_value(rstn_gpio, 0); + usleep_range(100, 200); /* trst > 100uS */ + + /* + * Reset "will initialize to their default states of all I/Os to + * inputs with weak current source to VDD", which is the same as + * writing 1 for all I/Os which is 0 in n_latch. + */ + n_latch = 0; + } else { + device_property_read_u32(&client->dev, "lines-initial-states", + &n_latch); + } + /* NOTE: the OnSemi jlc1562b is also largely compatible with * these parts, notably for output. It has a low-resolution * DAC instead of pin change IRQs; and its inputs can be the