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Tue, 28 Jan 2025 19:48:26 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20250128194826eusmtrp279bcbff1fdae98bf8f72216d19949843~e8wRn8wBU2963629636eusmtrp2k; Tue, 28 Jan 2025 19:48:26 +0000 (GMT) X-AuditID: cbfec7f2-b11c470000005155-87-6799348bbf2c Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 3E.AB.19654.A8439976; Tue, 28 Jan 2025 19:48:26 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194824eusmtip1254d86ca0f63e60db4fa04696aac0927~e8wQNZfZy2620826208eusmtip1l; Tue, 28 Jan 2025 19:48:24 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 01/18] dt-bindings: clock: thead: Add TH1520 VO clock controller Date: Tue, 28 Jan 2025 20:47:59 +0100 Message-Id: <20250128194816.2185326-2-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0xTZxjG851zek5pVjxUjB/i0FXBsQyQBeaXzNsyZ45bxsSNmJHs0sCx ELm4VjYlZMJKgUKrUzc2C4zLuoFMhEFbKBSKWClQqQy5mAjoMpijgA2XkqlBRjm4+d/vfZ/3 +Z73TT4+LmokN/ETU06yshRJkpgUEMbOR7dCCiIuSXfWZvmhruEKDBmeaCl0pdWBoVKrg4fG +vUYGnC7SHR1oo9Cf7dmEWioqoRCis5aEk1qx0g0qx7jodvNxSSa11gBMs5nk6jGOkqhWncp hspnDQTSNTUDlKP6hYd+73kbjY51EWjythpHOdp1aNncRKGnQ78RqOihhUL66fM8ZKs5irIt 3xL7AxjXHSXFTE9OEsz1vAWKaV0sIxiTdpRi1KabgKmvVpHMyJCZZH7sjmbuFdgwpkF3hsmu 6cSYc0s7GVfbIMmc1VcDpl8xTB0WxQp2x7NJiV+wsrC9nwkSKh/eI070vXgq93EblgkUMB94 8SEdAQeu2Hj5QMAX0VUAXi9fJDyCiF4A0F38ESfMA5g3oiGfOfI1BowTKgFUFH69VkwDuGi2 rNpJ+jV4v7J09V1fWklA5Y0s4Clw+gGAxvHi1bfW0zGwp0y36iDoQDja1svzsJDeB8cvewye vC3Qcq0X97AXvR/WL1UR3IwP7L40vsr4yozCUIR7AiBdI4C6qT6CMx+A3bmVFMfrodOmX+PN cNlUinGcCu8b5nCOM6BJbVvjN+CI4/HKovyVgGBY2xzGtd+ED8wKzNOGtDe8M+PDreANLxi/ x7m2EObliLjpIPidWvNfqKPKuBbKwJbGEuob8JL2uWO0zx2j/T+3DODVYCObJk+WsvLwFPbL ULkkWZ6WIg2NS02uByt/2/7UNtcESpyzoR0A44MOAPm42Ff4seMHqUgYLzmdzspSP5WlJbHy DuDPJ8QbhRUWpVRESyUn2eMse4KVPVMxvtemTKyQTTEPs1+pu6JiXKq6Dw4HReyZqX4iiPlp YFr56HXfyHZvjcs65nc0Mv2t1EHK773Ciam6uq1FLa7Pt9gd706UH3/1T+XFhVgVWrdHrE1M 93ZatbGfLM3BtIz0XOZ01GhgXOTmiPYYp/uFrl0+0X/08AdCWgpuDgUZeC0ZRxrUf8lcQYTJ KJg4F79tZvvVAwnF9q27/gk+eCivwJ3lPHLqvPdZf9+9LzdssAROg96i4O363XHBZT/b8YuH lj8cylE1tt9NFP+67eCxHTl+aQGZg7xb72+omN0313s5vKf/hs9y7JkWVUP0OzvU/pniMPtU SL9MY9OhuwG64Ypj10zRUYNiQp4gCX8Fl8kl/wIauOeoSgQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGKsWRmVeSWpSXmKPExsVy+t/xu7pdJjPTDTp+C1ucuL6IyWLr71ns Fmv2nmOymH/kHKvFvUtbmCyufH3PZrHu6QV2ixd7G1ksrq2Yy27RfGw9m8XLWffYLD723GO1 uLxrDpvF594jjBbbPrewWaw9cpfdYv3X+UwWCz9uZbFYsmMXo0Vb5zJWi4unXC3u3jvBYvHy cg+zRdssfov/e3awW/y7tpHFYva7/ewWW95MZLU4vjbcomX/FBYHOY/3N1rZPd68fMnicbjj C7vH3m8LWDx2zrrL7tGz8wyjx6ZVnWwed67tYfOYdzLQ4373cSaPzUvqPVrWHmPy6P9r4PF+ 31U2j74tqxg9LjVfZw8QitKzKcovLUlVyMgvLrFVija0MNIztLTQMzKx1DM0No+1MjJV0rez SUnNySxLLdK3S9DLWP7uPkvBBdmK9l/7mBoYmyW6GDk5JARMJLp6tzJ1MXJxCAksZZRo6L7G CpGQkbjW/ZIFwhaW+HOtiw2i6BWjxMmzm9lAEmwCRhIPls8HaxARWMwisXdfJUgRs8BbRonr MzeCdQsLBEv8X3CbCcRmEVCVuLvvLFgDr4C9xJOVjYwQG+Ql9h88ywxicwo4SGz6uwKsVwio 5tHbGWwQ9YISJ2c+AYszA9U3b53NPIFRYBaS1CwkqQWMTKsYRVJLi3PTc4uN9IoTc4tL89L1 kvNzNzECE8y2Yz+37GBc+eqj3iFGJg7GQ4wSHMxKIryx52akC/GmJFZWpRblxxeV5qQWH2I0 Bbp7IrOUaHI+MMXllcQbmhmYGpqYWRqYWpoZK4nzsl05nyYkkJ5YkpqdmlqQWgTTx8TBKdXA pHuFcR/nvjRDlsU8pxaE/dZobt4rGPUhWif12+r4psNrZ1ZvMbbO+7/ijswUm2cZf16uvCR2 lG/2Eo7CfXGPzvis+H55taxYxcQVMR5dgu/W/Xi1RbF4q9DButTAY38bP/5uaTl5vvLNzwj1 opUlSW3Tb7hI8afrFDzJlKz5+fXzsfpcLemI+Z/Y9pp1Kkey3tzzwVxZvM5rkut75mn+3/om FVrEKB+vizzezz99ccMfZoserVC7hO9G5XnuC26UzOUw2zLps7F/56HoV+73FW415RdJL/su EcKTsKOGP+xt4LltPNW3De2nqk+a8GFHvfa2dd2Gcz4k6Spr2a7ou8q3qdp843HJ6DI9lsr9 SizFGYmGWsxFxYkASnpl3LkDAAA= X-CMS-MailID: 20250128194826eucas1p1b18e5af64e66b06da985b194d022273c X-Msg-Generator: CA X-RootMTR: 20250128194826eucas1p1b18e5af64e66b06da985b194d022273c X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194826eucas1p1b18e5af64e66b06da985b194d022273c References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add device tree bindings for the TH1520 Video Output (VO) subsystem clock controller. The VO sub-system manages clock gates for multimedia components including HDMI, MIPI, and GPU. Document the VIDEO_PLL requirements for the VO clock controller, which receives its input from the AP clock controller. The VIDEO_PLL is a Silicon Creations Sigma-Delta (integer) PLL typically running at 792 MHz with maximum FOUTVCO of 2376 MHz. This binding complements the existing AP sub-system clock controller which manages CPU, DPU, GMAC and TEE PLLs. Signed-off-by: Michal Wilczynski --- .../bindings/clock/thead,th1520-clk-ap.yaml | 17 ++++++++-- .../dt-bindings/clock/thead,th1520-clk-ap.h | 33 +++++++++++++++++++ 2 files changed, 47 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml index 0129bd0ba4b3..9d058c00ab3d 100644 --- a/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +++ b/Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml @@ -8,7 +8,8 @@ title: T-HEAD TH1520 AP sub-system clock controller description: | The T-HEAD TH1520 AP sub-system clock controller configures the - CPU, DPU, GMAC and TEE PLLs. + CPU, DPU, GMAC and TEE PLLs. Additionally the VO subsystem configures + the clock gates for the HDMI, MIPI and the GPU. SoC reference manual https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf @@ -20,14 +21,24 @@ maintainers: properties: compatible: - const: thead,th1520-clk-ap + enum: + - thead,th1520-clk-ap + - thead,th1520-clk-vo reg: maxItems: 1 clocks: items: - - description: main oscillator (24MHz) + - description: | + One input clock: + - For "thead,th1520-clk-ap": the clock input must be the 24 MHz + main oscillator. + - For "thead,th1520-clk-vo": the clock input must be the VIDEO_PLL, + which is configured by the AP clock controller. According to the + TH1520 manual, VIDEO_PLL is a Silicon Creations Sigma-Delta PLL + (integer PLL) typically running at 792 MHz (FOUTPOSTDIV), with + a maximum FOUTVCO of 2376 MHz. "#clock-cells": const: 1 diff --git a/include/dt-bindings/clock/thead,th1520-clk-ap.h b/include/dt-bindings/clock/thead,th1520-clk-ap.h index a199784b3512..470fa34f9a9d 100644 --- a/include/dt-bindings/clock/thead,th1520-clk-ap.h +++ b/include/dt-bindings/clock/thead,th1520-clk-ap.h @@ -93,4 +93,37 @@ #define CLK_SRAM3 83 #define CLK_PLL_GMAC_100M 84 #define CLK_UART_SCLK 85 + +/* VO clocks */ +#define CLK_AXI4_VO_ACLK 0 +#define CLK_GPU_CORE 1 +#define CLK_GPU_CFG_ACLK 2 +#define CLK_DPU_PIXELCLK0 3 +#define CLK_DPU_PIXELCLK1 4 +#define CLK_DPU_HCLK 5 +#define CLK_DPU_ACLK 6 +#define CLK_DPU_CCLK 7 +#define CLK_HDMI_SFR 8 +#define CLK_HDMI_PCLK 9 +#define CLK_HDMI_CEC 10 +#define CLK_MIPI_DSI0_PCLK 11 +#define CLK_MIPI_DSI1_PCLK 12 +#define CLK_MIPI_DSI0_CFG 13 +#define CLK_MIPI_DSI1_CFG 14 +#define CLK_MIPI_DSI0_REFCLK 15 +#define CLK_MIPI_DSI1_REFCLK 16 +#define CLK_HDMI_I2S 17 +#define CLK_X2H_DPU1_ACLK 18 +#define CLK_X2H_DPU_ACLK 19 +#define CLK_AXI4_VO_PCLK 20 +#define CLK_IOPMP_VOSYS_DPU_PCLK 21 +#define CLK_IOPMP_VOSYS_DPU1_PCLK 22 +#define CLK_IOPMP_VOSYS_GPU_PCLK 23 +#define CLK_IOPMP_DPU1_ACLK 24 +#define CLK_IOPMP_DPU_ACLK 25 +#define CLK_IOPMP_GPU_ACLK 26 +#define CLK_MIPIDSI0_PIXCLK 27 +#define CLK_MIPIDSI1_PIXCLK 28 +#define CLK_HDMI_PIXCLK 29 + #endif From patchwork Tue Jan 28 19:48:00 2025 Content-Type: text/plain; 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Tue, 28 Jan 2025 19:48:27 +0000 (GMT) X-AuditID: cbfec7f5-e59c770000004fad-ca-6799348cae46 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 20.E0.19920.B8439976; Tue, 28 Jan 2025 19:48:27 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194826eusmtip1e3aeec7153dc209e425cb81b17f4a530~e8wRg5Wgq0291602916eusmtip1Y; Tue, 28 Jan 2025 19:48:26 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 02/18] clk: thead: Add clock support for VO subsystem in T-Head TH1520 SoC Date: Tue, 28 Jan 2025 20:48:00 +0100 Message-Id: <20250128194816.2185326-3-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01SfUxTVxzNfe/1vdfG6qPivNpmi2Rzjo2PTTfuZJm4KXnGGTHTycw218hL IQI1LagTyGC0BFhB0KlYFKQhtTI6vtryIQzBQpFpt1FEDaXDydz4GA0CylBwwMPN/875/c65 5/ySS+MSG7majolP4FTx8lg/UkTY2v/5OUC34awi+GRBEOq4ZcCQ9bGeQuVNTgwV250C5Omy YKh70kuiH/74hUJ/NaURqMd0nkLp7RUkGtR7SDSm8wiQq+EcicZz7ADZxjUkMtv7KFQxWYyh kjErgUrrGgDKyDIK0K+dW1Gfp4NAgy4djjL0y9DTxjoKzfZUEahwtJlClpF8AXKY9yJN83dE 2Ius97aWYkcGBwn2auYExTY9vECw9fo+itXVXwdsdVkWybp7Gkm26Nou9rdvHRhbU/o1qzG3 Y+zxmWDW++NNks21lAG2K/0WFSHZJ3oviouNOcypgt7/UhT95LRWcGg08qhlogakgu7t2UBI Q2YDHO3qBNlAREsYE4DTmiyMJxMAXu09KeDJOICulibBM4vR1kLyi4sAXtK24TwZAfB6qoaa V5HMW7D/YvGC3ZfRElDblraQgjN/AmgbODfnp+nlzH5Y7lk1byCYV2DalT4wj8XMJng500jx cS/B5pYb+DwWMmGwesZE8BofeO3swALG5zTp1kKc11eJoHdQxuMtsH36xmLt5XDIYVl8Uwaf 1hdjPFbCfuuDRW8yrNc5FnEodDunF2rizGuwoiGIH2+G/efbqPkxZJbC23/78A2WwhO2Mzg/ FsPMDAmvXgtP6XL+C3WabIuhLDzz6AqeB9bon7tF/9wt+v9zLwC8DKzkEtVxCk69Pp47EqiW x6kT4xWBB5Rx1WDua/8065isA6ahscBWgNGgFUAa9/MVf+4sUEjEUfKvjnEq5X5VYiynbgVS mvBbKTY0axUSRiFP4A5y3CFO9WyL0cLVqViJueUTpA1wqn3CfPfticj/vdBfn5y8Ne/I66XK +2sue4KCU0zpGmW3wDZr3TlDC4uScrZUln+6ojTqhSzLh++GTPRu+ua4dJug/+Abu0o+9v1+ dwcrDZAdiNxe+86qgf6wmPu5YdOOj5KyZEOR7hBn7+nQtSu6l9UG3cwviEj/IuVx6bon0pcP 10Q7T+U+JKM7h/eOjtgNWt3de8Pr7xm8yinv27P+9nVoanPKXTpUBg0usnVamhLesKNmT4L5 TuBnD9qPFTcKvUvyuVcduyVH82r9NZOVXe5LrqmNEX0fPPIPD6+3mUMqi6qHa1XZxjvZ8duM ZretSjPqMUYtQaKNSX6EOlr+pj+uUsv/BeRC2DNJBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7rdJjPTDdrfqVmcuL6IyWLr71ns Fmv2nmOymH/kHKvFvUtbmCyufH3PZrHu6QV2ixd7G1ksrq2Yy27RfGw9m8XLWffYLD723GO1 uLxrDpvF594jjBbbPrewWaw9cpfdYv3X+UwWCz9uZbFYsmMXo0Vb5zJWi4unXC3u3jvBYvHy cg+zRdssfov/e3awW/y7tpHFYva7/ewWW95MZLU4vjbcomX/FBYHOY/3N1rZPd68fMnicbjj C7vH3m8LWDx2zrrL7tGz8wyjx6ZVnWwed67tYfOYdzLQ4373cSaPzUvqPVrWHmPy6P9r4PF+ 31U2j74tqxg9LjVfZw8QitKzKcovLUlVyMgvLrFVija0MNIztLTQMzKx1DM0No+1MjJV0rez SUnNySxLLdK3S9DL+DOtlbXgXUTFli+bGRsYr3h3MXJySAiYSCzbdpCti5GLQ0hgKaPEwp8f 2CASMhLXul+yQNjCEn+udYHFhQReMUpsuJsJYrMJGEk8WD6fFcQWEVjMIrF3XyXIIGaBt4wS 12duBGsWFoiVWH9nDzOIzSKgKtF44C4jiM0rYC+xu2MZO8QCeYn9B8+C1XAKOEhs+ruCBWKZ vcSjtzPYIOoFJU7OfAIWZwaqb946m3kCo8AsJKlZSFILGJlWMYqklhbnpucWG+oVJ+YWl+al 6yXn525iBKaXbcd+bt7BOO/VR71DjEwcjIcYJTiYlUR4Y8/NSBfiTUmsrEotyo8vKs1JLT7E aAp090RmKdHkfGCCyyuJNzQzMDU0MbM0MLU0M1YS53W7fD5NSCA9sSQ1OzW1ILUIpo+Jg1Oq gcnsT+ak6H1vGW/d9TyYfcDD5AP/Ct/Cz2mHkvcFPSoJsxSb+lSm/6lw4BOpw18k7m47tPmM zXnj/+26EQv6XcrfXXLZvTBp/2zGt5Mu9x5JOxu+5lT81Sb+ls6AbTvvJN1r+FH6XOnz5ftO Da2ek11zdyjuK76rH9+SbFzVbfZjmXadwd36fXU9iixS8XaHftj89z5cKhJu/kdx3aUwSw05 g8h7cysfNp9SYNZqu7Njld/WRDEFhwYj5ZN7hU9yVF9wffvmaTtvzKMPD8um7/svkMht8KJH 4mziv1lPA8ymrLjz4/6vyZwvODhuHpw0MUXms6xRftJSVi5tViEj0w9VbgwiSx/+i8hX8oo8 7a3EUpyRaKjFXFScCADkG4BQuAMAAA== X-CMS-MailID: 20250128194827eucas1p25db822456e223563b8b411f77754c760 X-Msg-Generator: CA X-RootMTR: 20250128194827eucas1p25db822456e223563b8b411f77754c760 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194827eucas1p25db822456e223563b8b411f77754c760 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The T-Head TH1520 SoC integrates a variety of clocks for its subsystems, including the Application Processor (AP) and the Video Output (VO) [1]. Up until now, the T-Head clock driver only supported AP clocks. This commit extends the driver to provide clock functionality for the VO subsystem. At this stage, the focus is on implementing the VO clock gates, as these are currently the most relevant and required components for enabling and disabling the VO subsystem functionality. Future enhancements may introduce additional VO-related clocks as necessary. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [1] Signed-off-by: Michal Wilczynski --- drivers/clk/thead/clk-th1520-ap.c | 197 +++++++++++++++++++++++++----- 1 file changed, 169 insertions(+), 28 deletions(-) diff --git a/drivers/clk/thead/clk-th1520-ap.c b/drivers/clk/thead/clk-th1520-ap.c index 4c9555fc6184..57972589f120 100644 --- a/drivers/clk/thead/clk-th1520-ap.c +++ b/drivers/clk/thead/clk-th1520-ap.c @@ -847,6 +847,67 @@ static CCU_GATE(CLK_SRAM1, sram1_clk, "sram1", axi_aclk_pd, 0x20c, BIT(3), 0); static CCU_GATE(CLK_SRAM2, sram2_clk, "sram2", axi_aclk_pd, 0x20c, BIT(2), 0); static CCU_GATE(CLK_SRAM3, sram3_clk, "sram3", axi_aclk_pd, 0x20c, BIT(1), 0); +static CCU_GATE(CLK_AXI4_VO_ACLK, axi4_vo_aclk, "axi4-vo-aclk", + video_pll_clk_pd, 0x0, BIT(0), 0); +static CCU_GATE(CLK_GPU_CORE, gpu_core_clk, "gpu-core-clk", video_pll_clk_pd, + 0x0, BIT(3), 0); +static CCU_GATE(CLK_GPU_CFG_ACLK, gpu_cfg_aclk, "gpu-cfg-aclk", + video_pll_clk_pd, 0x0, BIT(4), 0); +static CCU_GATE(CLK_DPU_PIXELCLK0, dpu0_pixelclk, "dpu0-pixelclk", + video_pll_clk_pd, 0x0, BIT(5), 0); +static CCU_GATE(CLK_DPU_PIXELCLK1, dpu1_pixelclk, "dpu1-pixelclk", + video_pll_clk_pd, 0x0, BIT(6), 0); +static CCU_GATE(CLK_DPU_HCLK, dpu_hclk, "dpu-hclk", video_pll_clk_pd, 0x0, + BIT(7), 0); +static CCU_GATE(CLK_DPU_ACLK, dpu_aclk, "dpu-aclk", video_pll_clk_pd, 0x0, + BIT(8), 0); +static CCU_GATE(CLK_DPU_CCLK, dpu_cclk, "dpu-cclk", video_pll_clk_pd, 0x0, + BIT(9), 0); +static CCU_GATE(CLK_HDMI_SFR, hdmi_sfr_clk, "hdmi-sfr-clk", video_pll_clk_pd, + 0x0, BIT(10), 0); +static CCU_GATE(CLK_HDMI_PCLK, hdmi_pclk, "hdmi-pclk", video_pll_clk_pd, 0x0, + BIT(11), 0); +static CCU_GATE(CLK_HDMI_CEC, hdmi_cec_clk, "hdmi-cec-clk", video_pll_clk_pd, + 0x0, BIT(12), 0); +static CCU_GATE(CLK_MIPI_DSI0_PCLK, mipi_dsi0_pclk, "mipi-dsi0-pclk", + video_pll_clk_pd, 0x0, BIT(13), 0); +static CCU_GATE(CLK_MIPI_DSI1_PCLK, mipi_dsi1_pclk, "mipi-dsi1-pclk", + video_pll_clk_pd, 0x0, BIT(14), 0); +static CCU_GATE(CLK_MIPI_DSI0_CFG, mipi_dsi0_cfg_clk, "mipi-dsi0-cfg-clk", + video_pll_clk_pd, 0x0, BIT(15), 0); +static CCU_GATE(CLK_MIPI_DSI1_CFG, mipi_dsi1_cfg_clk, "mipi-dsi1-cfg-clk", + video_pll_clk_pd, 0x0, BIT(16), 0); +static CCU_GATE(CLK_MIPI_DSI0_REFCLK, mipi_dsi0_refclk, "mipi-dsi0-refclk", + video_pll_clk_pd, 0x0, BIT(17), 0); +static CCU_GATE(CLK_MIPI_DSI1_REFCLK, mipi_dsi1_refclk, "mipi-dsi1-refclk", + video_pll_clk_pd, 0x0, BIT(18), 0); +static CCU_GATE(CLK_HDMI_I2S, hdmi_i2s_clk, "hdmi-i2s-clk", video_pll_clk_pd, + 0x0, BIT(19), 0); +static CCU_GATE(CLK_X2H_DPU1_ACLK, x2h_dpu1_aclk, "x2h-dpu1-aclk", + video_pll_clk_pd, 0x0, BIT(20), 0); +static CCU_GATE(CLK_X2H_DPU_ACLK, x2h_dpu_aclk, "x2h-dpu-aclk", + video_pll_clk_pd, 0x0, BIT(21), 0); +static CCU_GATE(CLK_AXI4_VO_PCLK, axi4_vo_pclk, "axi4-vo-pclk", + video_pll_clk_pd, 0x0, BIT(22), 0); +static CCU_GATE(CLK_IOPMP_VOSYS_DPU_PCLK, iopmp_vosys_dpu_pclk, + "iopmp-vosys-dpu-pclk", video_pll_clk_pd, 0x0, BIT(23), 0); +static CCU_GATE(CLK_IOPMP_VOSYS_DPU1_PCLK, iopmp_vosys_dpu1_pclk, + "iopmp-vosys-dpu1-pclk", video_pll_clk_pd, 0x0, BIT(24), 0); +static CCU_GATE(CLK_IOPMP_VOSYS_GPU_PCLK, iopmp_vosys_gpu_pclk, + "iopmp-vosys-gpu-pclk", video_pll_clk_pd, 0x0, BIT(25), 0); +static CCU_GATE(CLK_IOPMP_DPU1_ACLK, iopmp_dpu1_aclk, "iopmp-dpu1-aclk", + video_pll_clk_pd, 0x0, BIT(27), 0); +static CCU_GATE(CLK_IOPMP_DPU_ACLK, iopmp_dpu_aclk, "iopmp-dpu-aclk", + video_pll_clk_pd, 0x0, BIT(28), 0); +static CCU_GATE(CLK_IOPMP_GPU_ACLK, iopmp_gpu_aclk, "iopmp-gpu-aclk", + video_pll_clk_pd, 0x0, BIT(29), 0); +static CCU_GATE(CLK_MIPIDSI0_PIXCLK, mipi_dsi0_pixclk, "mipi-dsi0-pixclk", + video_pll_clk_pd, 0x0, BIT(30), 0); +static CCU_GATE(CLK_MIPIDSI1_PIXCLK, mipi_dsi1_pixclk, "mipi-dsi1-pixclk", + video_pll_clk_pd, 0x0, BIT(31), 0); +static CCU_GATE(CLK_HDMI_PIXCLK, hdmi_pixclk, "hdmi-pixclk", video_pll_clk_pd, + 0x4, BIT(0), 0); + static CLK_FIXED_FACTOR_HW(gmac_pll_clk_100m, "gmac-pll-clk-100m", &gmac_pll_clk.common.hw, 10, 1, 0); @@ -963,7 +1024,38 @@ static struct ccu_common *th1520_gate_clks[] = { &sram3_clk.common, }; -#define NR_CLKS (CLK_UART_SCLK + 1) +static struct ccu_common *th1520_vo_gate_clks[] = { + &axi4_vo_aclk.common, + &gpu_core_clk.common, + &gpu_cfg_aclk.common, + &dpu0_pixelclk.common, + &dpu1_pixelclk.common, + &dpu_hclk.common, + &dpu_aclk.common, + &dpu_cclk.common, + &hdmi_sfr_clk.common, + &hdmi_pclk.common, + &hdmi_cec_clk.common, + &mipi_dsi0_pclk.common, + &mipi_dsi1_pclk.common, + &mipi_dsi0_cfg_clk.common, + &mipi_dsi1_cfg_clk.common, + &mipi_dsi0_refclk.common, + &mipi_dsi1_refclk.common, + &hdmi_i2s_clk.common, + &x2h_dpu1_aclk.common, + &x2h_dpu_aclk.common, + &axi4_vo_pclk.common, + &iopmp_vosys_dpu_pclk.common, + &iopmp_vosys_dpu1_pclk.common, + &iopmp_vosys_gpu_pclk.common, + &iopmp_dpu1_aclk.common, + &iopmp_dpu_aclk.common, + &iopmp_gpu_aclk.common, + &mipi_dsi0_pixclk.common, + &mipi_dsi1_pixclk.common, + &hdmi_pixclk.common +}; static const struct regmap_config th1520_clk_regmap_config = { .reg_bits = 32, @@ -972,8 +1064,44 @@ static const struct regmap_config th1520_clk_regmap_config = { .fast_io = true, }; +struct th1520_plat_data { + struct ccu_common **th1520_pll_clks; + struct ccu_common **th1520_div_clks; + struct ccu_common **th1520_mux_clks; + struct ccu_common **th1520_gate_clks; + + int nr_clks; + int nr_pll_clks; + int nr_div_clks; + int nr_mux_clks; + int nr_gate_clks; +}; + +static const struct th1520_plat_data th1520_ap_platdata = { + .th1520_pll_clks = th1520_pll_clks, + .th1520_div_clks = th1520_div_clks, + .th1520_mux_clks = th1520_mux_clks, + .th1520_gate_clks = th1520_gate_clks, + + .nr_clks = CLK_UART_SCLK + 1, + + .nr_pll_clks = ARRAY_SIZE(th1520_pll_clks), + .nr_div_clks = ARRAY_SIZE(th1520_div_clks), + .nr_mux_clks = ARRAY_SIZE(th1520_mux_clks), + .nr_gate_clks = ARRAY_SIZE(th1520_gate_clks), +}; + +static const struct th1520_plat_data th1520_vo_platdata = { + .th1520_gate_clks = th1520_vo_gate_clks, + + .nr_clks = CLK_HDMI_PIXCLK + 1, + + .nr_gate_clks = ARRAY_SIZE(th1520_vo_gate_clks), +}; + static int th1520_clk_probe(struct platform_device *pdev) { + const struct th1520_plat_data *plat_data; struct device *dev = &pdev->dev; struct clk_hw_onecell_data *priv; @@ -982,11 +1110,17 @@ static int th1520_clk_probe(struct platform_device *pdev) struct clk_hw *hw; int ret, i; - priv = devm_kzalloc(dev, struct_size(priv, hws, NR_CLKS), GFP_KERNEL); + plat_data = device_get_match_data(&pdev->dev); + if (!plat_data) { + dev_err(&pdev->dev, "Error: No device match data found\n"); + return -ENODEV; + } + + priv = devm_kzalloc(dev, struct_size(priv, hws, plat_data->nr_clks), GFP_KERNEL); if (!priv) return -ENOMEM; - priv->num = NR_CLKS; + priv->num = plat_data->nr_clks; base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(base)) @@ -996,35 +1130,35 @@ static int th1520_clk_probe(struct platform_device *pdev) if (IS_ERR(map)) return PTR_ERR(map); - for (i = 0; i < ARRAY_SIZE(th1520_pll_clks); i++) { - struct ccu_pll *cp = hw_to_ccu_pll(&th1520_pll_clks[i]->hw); + for (i = 0; i < plat_data->nr_pll_clks; i++) { + struct ccu_pll *cp = hw_to_ccu_pll(&plat_data->th1520_pll_clks[i]->hw); - th1520_pll_clks[i]->map = map; + plat_data->th1520_pll_clks[i]->map = map; - ret = devm_clk_hw_register(dev, &th1520_pll_clks[i]->hw); + ret = devm_clk_hw_register(dev, &plat_data->th1520_pll_clks[i]->hw); if (ret) return ret; priv->hws[cp->common.clkid] = &cp->common.hw; } - for (i = 0; i < ARRAY_SIZE(th1520_div_clks); i++) { - struct ccu_div *cd = hw_to_ccu_div(&th1520_div_clks[i]->hw); + for (i = 0; i < plat_data->nr_div_clks; i++) { + struct ccu_div *cd = hw_to_ccu_div(&plat_data->th1520_div_clks[i]->hw); - th1520_div_clks[i]->map = map; + plat_data->th1520_div_clks[i]->map = map; - ret = devm_clk_hw_register(dev, &th1520_div_clks[i]->hw); + ret = devm_clk_hw_register(dev, &plat_data->th1520_div_clks[i]->hw); if (ret) return ret; priv->hws[cd->common.clkid] = &cd->common.hw; } - for (i = 0; i < ARRAY_SIZE(th1520_mux_clks); i++) { - struct ccu_mux *cm = hw_to_ccu_mux(&th1520_mux_clks[i]->hw); + for (i = 0; i < plat_data->nr_mux_clks; i++) { + struct ccu_mux *cm = hw_to_ccu_mux(&plat_data->th1520_mux_clks[i]->hw); const struct clk_init_data *init = cm->common.hw.init; - th1520_mux_clks[i]->map = map; + plat_data->th1520_mux_clks[i]->map = map; hw = devm_clk_hw_register_mux_parent_data_table(dev, init->name, init->parent_data, @@ -1040,10 +1174,10 @@ static int th1520_clk_probe(struct platform_device *pdev) priv->hws[cm->common.clkid] = hw; } - for (i = 0; i < ARRAY_SIZE(th1520_gate_clks); i++) { - struct ccu_gate *cg = hw_to_ccu_gate(&th1520_gate_clks[i]->hw); + for (i = 0; i < plat_data->nr_gate_clks; i++) { + struct ccu_gate *cg = hw_to_ccu_gate(&plat_data->th1520_gate_clks[i]->hw); - th1520_gate_clks[i]->map = map; + plat_data->th1520_gate_clks[i]->map = map; hw = devm_clk_hw_register_gate_parent_data(dev, cg->common.hw.init->name, @@ -1057,19 +1191,21 @@ static int th1520_clk_probe(struct platform_device *pdev) priv->hws[cg->common.clkid] = hw; } - ret = devm_clk_hw_register(dev, &osc12m_clk.hw); - if (ret) - return ret; - priv->hws[CLK_OSC12M] = &osc12m_clk.hw; + if (plat_data == &th1520_ap_platdata) { + ret = devm_clk_hw_register(dev, &osc12m_clk.hw); + if (ret) + return ret; + priv->hws[CLK_OSC12M] = &osc12m_clk.hw; - ret = devm_clk_hw_register(dev, &gmac_pll_clk_100m.hw); - if (ret) - return ret; - priv->hws[CLK_PLL_GMAC_100M] = &gmac_pll_clk_100m.hw; + ret = devm_clk_hw_register(dev, &gmac_pll_clk_100m.hw); + if (ret) + return ret; + priv->hws[CLK_PLL_GMAC_100M] = &gmac_pll_clk_100m.hw; - ret = devm_clk_hw_register(dev, &emmc_sdio_ref_clk.hw); - if (ret) - return ret; + ret = devm_clk_hw_register(dev, &emmc_sdio_ref_clk.hw); + if (ret) + return ret; + } ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, priv); if (ret) @@ -1081,6 +1217,11 @@ static int th1520_clk_probe(struct platform_device *pdev) static const struct of_device_id th1520_clk_match[] = { { .compatible = "thead,th1520-clk-ap", + .data = &th1520_ap_platdata, + }, + { + .compatible = "thead,th1520-clk-vo", + .data = &th1520_vo_platdata, }, { /* sentinel */ }, }; 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Tue, 28 Jan 2025 19:48:29 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20250128194829eusmtrp23ababadc0aa08aba01aa8daedab8f098~e8wUG9bs_3008430084eusmtrp2W; Tue, 28 Jan 2025 19:48:29 +0000 (GMT) X-AuditID: cbfec7f5-ed1d670000004fad-cb-6799348d6ff9 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 52.E0.19920.C8439976; Tue, 28 Jan 2025 19:48:28 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194827eusmtip138f2cc589f7df90985241c3815b21534~e8wSu4kgR0819608196eusmtip1J; Tue, 28 Jan 2025 19:48:27 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 03/18] dt-bindings: firmware: thead,th1520: Add support for firmware node Date: Tue, 28 Jan 2025 20:48:01 +0100 Message-Id: <20250128194816.2185326-4-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUxTVxjGd+69vffSrXotRM/YdIGBKTMUcARPsgUlaLwuS9T9s2xGoNFr ISsfa2HI3IYMyhCBuUYUykdZ12nDBFIolRKxsTJAlPLhQBalYARKCeNDrJsoMErr5n+/53nf c573PTk0LrxK+tNJKemcPEUiCyT5hKnjmS20OLJcGr6yGoW67mkx1PxcTaErbTYMadptPGQf MGLoD9ccieon+ig01ZZDoCF9FYVyOxpI5FTbSbRQZOehu62VJFosbgfItJhHorr2EQo1uDQY +nmhmUC6llaA8s9c4qH+7n1oxN5FIOfdIhzlqzei1WstFFoZMhCoYtZCIePMTzzUWfcpyrOc J/ZsY+eGlRQ743QS7M2CJxTb9rSGYM3qEYotMt8BbGPtGZJ9MHSNZKtvHWZHz3ZibJMum82r 68DYH5fD2bnrgyRbYqwF7EDuPeqQ8HP+h8c5WdJXnDwsOoGfWOPqINMcm09OWFvAaTApLAQ+ NGQiYYFjEi8EfFrI6AE0WQu94gmA1Sol5RGLADZcMJAvj/SaR7yFywD+M16GecQMgBX1Ksrd RTI74dhlDc9d8GOUBFT+ngPcAmccaynjlet3+TJx0KFrwNxMMMHQaleu+TQtYHbD0amtnrh3 oOVGD+5mH2YPbFzWE24WMJvgrfLxdcbXenKbK9YHh4yBD00TS5jn8F5Y3dTlZV843WmkPPw2 XDVrvH4qHGt+jHv4G2gu6vTyB/CBbWl9HpwJgQ2tYR47Bqp671NuGzIb4PBfmzwjbIAq00Xc YwtgQb73fbfD0qLi/0JtepM3lIUFTcW8cyBA/coy6leWUf+fWwPwWrCFy1AkSznF+ylcplgh SVZkpEjFx1KTG8Ha37690ulqAfrpBbEVYDSwAkjjgX6Co7YyqVBwXJL1NSdPjZdnyDiFFbxF E4FbBFqLUipkpJJ07guOS+PkL6sY7eN/Gruk+4Q29517HlFQefPU0n1UFjJ/1H5qav5G1Yni 0vnEN198tPrL/je2kYLY2Jhs/8K/H+2IjhIuZsrlIKn5qvNjlTCoJvS1XZs3Pi7UH0m1zB6O qRLZStO+z37YO3ww+E8jr/v2Z1fKmF8jOBCp1QSMXeftp7VqR2RYvL6Jl1kTGRwkmwuaFpUd ELUdTNv7ZdS+Y/p3e7Jazhqe1gu+dQaUhN05eTFCNuv7g9EgW46eKc+LS48fDH496/xgd+hv hx7tyhlcGEo4sDNjJee7Ha7dowM9D1+E+NTPzGeLSjIsz8LjJhsFfQn9tdpV2ag+S6TsES+K lQid6PXzc8Ru36o70h9IKBIlEe/hcoXkXx5ox0RKBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7o9JjPTDS6/tLY4cX0Rk8XW37PY LdbsPcdkMf/IOVaLe5e2MFlc+fqezWLd0wvsFi/2NrJYXFsxl92i+dh6NouXs+6xWXzsucdq cXnXHDaLz71HGC22fW5hs1h75C67xfqv85ksFn7cymKxZMcuRou2zmWsFhdPuVrcvXeCxeLl 5R5mi7ZZ/Bb/9+xgt/h3bSOLxex3+9kttryZyGpxfG24Rcv+KSwOch7vb7Sye7x5+ZLF43DH F3aPvd8WsHjsnHWX3aNn5xlGj02rOtk87lzbw+Yx72Sgx/3u40wem5fUe7SsPcbk0f/XwOP9 vqtsHn1bVjF6XGq+zh4gFKVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXseDrMbaC52IVTw/tYGxgfCbUxcjJISFgInF+5132LkYuDiGBpYwSpxbN YYNIyEhc637JAmELS/y51sUGUfSKUeLH/oOMIAk2ASOJB8vns4LYIgKLWST27qsEKWIWeMso cX3mRrBuYYEYid/7X4FNZRFQlTh0rxXI5uDgFbCXuP9CFmKBvMT+g2eZQWxOAQeJTX9XgLUK AZU8ejsDrJVXQFDi5MwnYHFmoPrmrbOZJzAKzEKSmoUktYCRaRWjSGppcW56brGhXnFibnFp Xrpecn7uJkZgetl27OfmHYzzXn3UO8TIxMF4iFGCg1lJhDf23Ix0Id6UxMqq1KL8+KLSnNTi Q4ymQGdPZJYSTc4HJri8knhDMwNTQxMzSwNTSzNjJXFet8vn04QE0hNLUrNTUwtSi2D6mDg4 pRqYhAwn61f6dzW4qqp8k7cqXyPwZ/uuJVdubfyw2MZMS53717R9Wy5xdF+vynp8aZrQFBU/ U3YrA0PbY8veGs057S1ndcQ7ISWLW2rel8Vy0bXHGW50Zu4+E/xd48fZFONjyr0r/9vU8923 +R07daX9n8XW4h3hDCyiUadrHJdOn5q+dFq/ZaKmsmwgm1SS2UZGT/Hb11gz71yOFL0jdWiT ZaKZ/rk66T1POnMZPviGR946sHyCnr0X84LkAlOHKaLxv8+zfHkQ8ue01onSZxwGTGqRUdyt 6iURd10nNvH1dYutPWdeeffExT023m2aO15taVple/fk+qWTevzlrDprA5bfWd56ctv27Vo9 nyYpsRRnJBpqMRcVJwIAC3U0PbgDAAA= X-CMS-MailID: 20250128194829eucas1p279fb146417854b28366378793087694a X-Msg-Generator: CA X-RootMTR: 20250128194829eucas1p279fb146417854b28366378793087694a X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194829eucas1p279fb146417854b28366378793087694a References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The kernel communicates with the E902 core through the mailbox transport using AON firmware protocol. Add dt-bindings to document it the dt node. Signed-off-by: Michal Wilczynski --- .../bindings/firmware/thead,th1520-aon.yaml | 53 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml new file mode 100644 index 000000000000..bbc183200400 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/thead,th1520-aon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 AON (Always-On) Firmware + +description: | + The Always-On (AON) subsystem in the TH1520 SoC is responsible for managing + low-power states, system wakeup events, and power management tasks. It is + designed to operate independently in a dedicated power domain, allowing it to + remain functional even during the SoC's deep sleep states. + + At the heart of the AON subsystem is the E902, a low-power core that executes + firmware responsible for coordinating tasks such as power domain control, + clock management, and system wakeup signaling. Communication between the main + SoC and the AON subsystem is handled through a mailbox interface, which + enables message-based interactions with the AON firmware. + +maintainers: + - Michal Wilczynski + +properties: + compatible: + const: thead,th1520-aon + + mboxes: + maxItems: 1 + + mbox-names: + items: + - const: aon + + "#power-domain-cells": + const: 1 + +required: + - compatible + - mboxes + - mbox-names + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + aon: aon { + compatible = "thead,th1520-aon"; + mboxes = <&mbox_910t 1>; + mbox-names = "aon"; + #power-domain-cells = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index d49306cc17e3..002eaae363aa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20340,6 +20340,7 @@ L: linux-riscv@lists.infradead.org S: Maintained T: git https://github.com/pdp7/linux.git F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +F: Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml F: Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml From patchwork Tue Jan 28 19:48:02 2025 Content-Type: text/plain; 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Tue, 28 Jan 2025 19:48:30 +0000 (GMT) X-AuditID: cbfec7f4-c39fa70000004fb9-0b-6799348fa49a Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 20.BB.19654.E8439976; Tue, 28 Jan 2025 19:48:30 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194829eusmtip1b56509fd0aa0051027ab69a29a6ef41a~e8wT-bR8T0291602916eusmtip1Z; Tue, 28 Jan 2025 19:48:28 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 04/18] firmware: thead: Add AON firmware protocol driver Date: Tue, 28 Jan 2025 20:48:02 +0100 Message-Id: <20250128194816.2185326-5-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Se1BUdRTud+/de5fNhetC8gsZhU3LbAJidppfQyElzty0tCZncizKLe4s ECzMXvARlTLABguCmrTLCoIMr7CNgVheiau8VsFdlQ0wA2KKlKXluaxFDBjLpfK/75zv++Y7 58wR4hIj6SeMVSazKqU8XkqKiMbuhZvP58sKFSFftUrRtcEyDBkX9RT6ts2KoZJOqwCN9DVg 6EfXNIm++/0Whcbb0gg0UF1MofTuWhLZ9SMkms0dESBbaxGJnCc7AWp0ZpDI0DlMoVpXCYYu zBoJVN7cCpA6u1KAbvfsQsMj1whkt+XiSK33Qg8vNVNoeaCOQOemTBRqcJwWILPhXZRhOktE bGKm72RSjMNuJ5iOrHmKaXtQSjAt+mGKyW25AZj6mmySGRq4RDLnr7/N/JJjxpjvy48zGYZu jMlfCmGmL/eTTF5DDWD60geptyQHRS9Hs/Gxh1lVcPghUcxwulOQtKQDR/vrA0+AiSMaIBRC Wgbt8/s1QCSU0NUA1tcskhrgsVLMA1h+NZInnAAuWyzATbgNtzq+ATxRBeCVkvMEXzgALOit w90qkg6Fo1UlAjfhQ2cSMLMrbdWC0/cBbBwrWg3xpvfA32Ycqw6C3grL/uim3FhM74BaW5OA z9sMTVctqxoPOgLWL1UTvGY9vF44torxFU268RzuDoC0QQTzmmbWho2Ep5Y1GI+94YS5geKx P3zYUrLWT4Sjxjmcx5/BllzzGg6DQ9a/SfeVcPpZWNsazLdfhbqvfwL88Tzhncn1/Aie8Eyj FufbYpillvDqp2FB7sn/Qq3VjRgvYWCXRXYKBOof2UX/yC76/2NLAV4DfNkULkHBcqFK9kgQ J0/gUpSKoI8TE+rBymf3Lpvnm0HVxGxQO8CEoB1AIS71EUdZdQqJOFp+7FNWlfihKiWe5drB RiEh9RWXmTIVElohT2Y/YdkkVvUviwk9/E5gxWcLZi5qU4ONh+8VP3gn0r8D9wqKW+fytrZH bB568aMDUanbSneqw2xev7p2b1A4KjLGufCugHubvFySg0MBU2bDa2nmiEM9o/3q5ucGsrYd j52ci0RGny0ZFfv+ahuv23E/vDzOL+pnrWdRcsWVzsstlbUfbHjKnDO02PvF45h9QabVMfu7 ppp0++iUtJ0v9URz0Wf0dTecTx7102bbAufGXlk3G1Bp67C039z63mmZ6829iaFBksLbk3/m h1zs0+zxNeSlyraTygNfhnGqu+bSHwKapd0ecXr/QA6/UL1wzDdpeP516eDAG+8XVj4zQe3+ /Im75MaY1NG9j40Fj+dsMemkBBcjf2E7ruLk/wBQLHN7SAQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGKsWRmVeSWpSXmKPExsVy+t/xu7p9JjPTDW6cF7A4cX0Rk8XW37PY LdbsPcdkMf/IOVaLe5e2MFlc+fqezWLd0wvsFi/2NrJYXFsxl92i+dh6NouXs+6xWXzsucdq cXnXHDaLz71HGC22fW5hs1h75C67xfqv85ksFn7cymKxZMcuRou2zmWsFhdPuVrcvXeCxeLl 5R5mi7ZZ/Bb/9+xgt/h3bSOLxex3+9kttryZyGpxfG24Rcv+KSwOch7vb7Sye7x5+ZLF43DH F3aPvd8WsHjsnHWX3aNn5xlGj02rOtk87lzbw+Yx72Sgx/3u40wem5fUe7SsPcbk0f/XwOP9 vqtsHn1bVjF6XGq+zh4gFKVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcbf5M2vB3xmMFVc3KTYwvirvYuTkkBAwkbhweCVjFyMXh5DAUkaJzUcX MkMkZCSudb9kgbCFJf5c62KDKHrFKPHu83awBJuAkcSD5fNZQWwRgcUsEnv3VYIUMQu8ZZS4 PnMjWJGwgLfE4w9vwKayCKhKLHp9jB3E5hWwl5h+eTsrxAZ5if0Hz4LVcAo4SGz6uwKsVwio 5tHbGWwQ9YISJ2c+AYszA9U3b53NPIFRYBaS1CwkqQWMTKsYRVJLi3PTc4uN9IoTc4tL89L1 kvNzNzECE8y2Yz+37GBc+eqj3iFGJg7GQ4wSHMxKIryx52akC/GmJFZWpRblxxeV5qQWH2I0 Bbp7IrOUaHI+MMXllcQbmhmYGpqYWRqYWpoZK4nzsl05nyYkkJ5YkpqdmlqQWgTTx8TBKdXA FBNRxbPLtOC6xfH8d0bqZ/hlX9yemCt5rb9lcmC0zaeeMyzTpz4pfyxufdkiT/b8Xe/ZblEb XNky7F6clresfnJPblmagBjf7d3t0hUSQd/XXH6x4FP94gB11fm8ZYvMxN+u7JO97elq2i/x /pfD9Z0dz9XZJ2R+WVMa8XGbltz3tEmLrufOmd2uZNs8pTmsOaT9am/ZOlW5X/73c7KUhab1 7YrhYXqWZOHhc6Sc5aKFoP8Ono2du3IUX7LEuTx/Irvz5d+b626t/3E93Sn6+sONcn97LLPv ddW6XV009WDUlMBPp1p0FZWyD9peVfIPmcsYs6/lUcL5DA69QqNSrae8s1KLDlty35S4+j9O iaU4I9FQi7moOBEARPFKA7kDAAA= X-CMS-MailID: 20250128194830eucas1p134d566631b5622c85d843f5d811c3c00 X-Msg-Generator: CA X-RootMTR: 20250128194830eucas1p134d566631b5622c85d843f5d811c3c00 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194830eucas1p134d566631b5622c85d843f5d811c3c00 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The T-Head TH1520 SoC uses an E902 co-processor running Always-On (AON) firmware to manage power, clock, and other system resources [1]. This patch introduces a driver implementing the AON firmware protocol, allowing the Linux kernel to communicate with the firmware via mailbox channels. Through an RPC-based interface, the kernel can initiate power state transitions, update resource configurations, and perform other AON-related tasks. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [1] Signed-off-by: Michal Wilczynski --- MAINTAINERS | 2 + drivers/firmware/Kconfig | 9 + drivers/firmware/Makefile | 1 + drivers/firmware/thead,th1520-aon.c | 268 ++++++++++++++++++ .../linux/firmware/thead/thead,th1520-aon.h | 197 +++++++++++++ 5 files changed, 477 insertions(+) create mode 100644 drivers/firmware/thead,th1520-aon.c create mode 100644 include/linux/firmware/thead/thead,th1520-aon.h diff --git a/MAINTAINERS b/MAINTAINERS index 002eaae363aa..9a98b52fffdc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20346,10 +20346,12 @@ F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c +F: drivers/firmware/thead,th1520-aon.c F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h +F: include/linux/firmware/thead/thead,th1520-aon.h RNBD BLOCK DRIVERS M: Md. Haris Iqbal diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 71d8b26c4103..4d84288cc290 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -212,6 +212,15 @@ config SYSFB_SIMPLEFB If unsure, say Y. +config TH1520_AON_PROTOCOL + tristate "Always-On firmware protocol" + depends on ARCH_THEAD || COMPILE_TEST + help + Power, clock, and resource management capabilities on the TH1520 SoC are + managed by the E902 core. Firmware running on this core communicates with + the kernel through the Always-On protocol, using hardware mailbox as a medium. + Say yes if you need such capabilities. + config TI_SCI_PROTOCOL tristate "TI System Control Interface (TISCI) Message Protocol" depends on TI_MESSAGE_MANAGER diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 7a8d486e718f..5db9c042430c 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_RASPBERRYPI_FIRMWARE) += raspberrypi.o obj-$(CONFIG_FW_CFG_SYSFS) += qemu_fw_cfg.o obj-$(CONFIG_SYSFB) += sysfb.o obj-$(CONFIG_SYSFB_SIMPLEFB) += sysfb_simplefb.o +obj-$(CONFIG_TH1520_AON_PROTOCOL) += thead,th1520-aon.o obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o diff --git a/drivers/firmware/thead,th1520-aon.c b/drivers/firmware/thead,th1520-aon.c new file mode 100644 index 000000000000..fc2fe32c8a54 --- /dev/null +++ b/drivers/firmware/thead,th1520-aon.c @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#include +#include +#include +#include +#include +#include + +#define MAX_RX_TIMEOUT (msecs_to_jiffies(3000)) +#define MAX_TX_TIMEOUT 500 + +struct th1520_aon_chan { + struct platform_device *pd; + struct mbox_chan *ch; + struct th1520_aon_rpc_ack_common ack_msg; + struct mbox_client cl; + struct completion done; + + /* make sure only one RPC is performed at a time */ + struct mutex transaction_lock; +}; + +struct th1520_aon_msg_req_set_resource_power_mode { + struct th1520_aon_rpc_msg_hdr hdr; + u16 resource; + u16 mode; + u16 reserved[10]; +} __packed __aligned(1); + +/* + * This type is used to indicate error response for most functions. + */ +enum th1520_aon_error_codes { + LIGHT_AON_ERR_NONE = 0, /* Success */ + LIGHT_AON_ERR_VERSION = 1, /* Incompatible API version */ + LIGHT_AON_ERR_CONFIG = 2, /* Configuration error */ + LIGHT_AON_ERR_PARM = 3, /* Bad parameter */ + LIGHT_AON_ERR_NOACCESS = 4, /* Permission error (no access) */ + LIGHT_AON_ERR_LOCKED = 5, /* Permission error (locked) */ + LIGHT_AON_ERR_UNAVAILABLE = 6, /* Unavailable (out of resources) */ + LIGHT_AON_ERR_NOTFOUND = 7, /* Not found */ + LIGHT_AON_ERR_NOPOWER = 8, /* No power */ + LIGHT_AON_ERR_IPC = 9, /* Generic IPC error */ + LIGHT_AON_ERR_BUSY = 10, /* Resource is currently busy/active */ + LIGHT_AON_ERR_FAIL = 11, /* General I/O failure */ + LIGHT_AON_ERR_LAST +}; + +static int th1520_aon_linux_errmap[LIGHT_AON_ERR_LAST] = { + 0, /* LIGHT_AON_ERR_NONE */ + -EINVAL, /* LIGHT_AON_ERR_VERSION */ + -EINVAL, /* LIGHT_AON_ERR_CONFIG */ + -EINVAL, /* LIGHT_AON_ERR_PARM */ + -EACCES, /* LIGHT_AON_ERR_NOACCESS */ + -EACCES, /* LIGHT_AON_ERR_LOCKED */ + -ERANGE, /* LIGHT_AON_ERR_UNAVAILABLE */ + -EEXIST, /* LIGHT_AON_ERR_NOTFOUND */ + -EPERM, /* LIGHT_AON_ERR_NOPOWER */ + -EPIPE, /* LIGHT_AON_ERR_IPC */ + -EBUSY, /* LIGHT_AON_ERR_BUSY */ + -EIO, /* LIGHT_AON_ERR_FAIL */ +}; + +static inline int th1520_aon_to_linux_errno(int errno) +{ + if (errno >= LIGHT_AON_ERR_NONE && errno < LIGHT_AON_ERR_LAST) + return th1520_aon_linux_errmap[errno]; + + return -EIO; +} + +static void th1520_aon_rx_callback(struct mbox_client *c, void *rx_msg) +{ + struct th1520_aon_chan *aon_chan = + container_of(c, struct th1520_aon_chan, cl); + struct th1520_aon_rpc_msg_hdr *hdr = + (struct th1520_aon_rpc_msg_hdr *)rx_msg; + u8 recv_size = sizeof(struct th1520_aon_rpc_msg_hdr) + hdr->size; + + if (recv_size != sizeof(struct th1520_aon_rpc_ack_common)) { + dev_err(c->dev, "Invalid ack size, not completing\n"); + return; + } + + memcpy(&aon_chan->ack_msg, rx_msg, recv_size); + complete(&aon_chan->done); +} + +/** + * th1520_aon_call_rpc() - Send an RPC request to the TH1520 AON subsystem + * @aon_chan: Pointer to the AON channel structure + * @msg: Pointer to the message (RPC payload) that will be sent + * + * This function sends an RPC message to the TH1520 AON subsystem via mailbox. + * It takes the provided @msg buffer, formats it with version and service flags, + * then blocks until the RPC completes or times out. The completion is signaled + * by the `aon_chan->done` completion, which is waited upon for a duration + * defined by `MAX_RX_TIMEOUT`. + * + * Return: + * * 0 on success + * * -ETIMEDOUT if the RPC call times out + * * A negative error code if the mailbox send fails or if AON responds with + * a non-zero error code (converted via th1520_aon_to_linux_errno()). + */ +int th1520_aon_call_rpc(struct th1520_aon_chan *aon_chan, void *msg) +{ + struct th1520_aon_rpc_msg_hdr *hdr = msg; + int ret; + + mutex_lock(&aon_chan->transaction_lock); + reinit_completion(&aon_chan->done); + + RPC_SET_VER(hdr, TH1520_AON_RPC_VERSION); + RPC_SET_SVC_ID(hdr, hdr->svc); + RPC_SET_SVC_FLAG_MSG_TYPE(hdr, RPC_SVC_MSG_TYPE_DATA); + RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NEED_ACK); + + ret = mbox_send_message(aon_chan->ch, msg); + if (ret < 0) { + dev_err(aon_chan->cl.dev, "RPC send msg failed: %d\n", ret); + goto out; + } + + if (!wait_for_completion_timeout(&aon_chan->done, MAX_RX_TIMEOUT)) { + dev_err(aon_chan->cl.dev, "RPC send msg timeout\n"); + mutex_unlock(&aon_chan->transaction_lock); + return -ETIMEDOUT; + } + + ret = aon_chan->ack_msg.err_code; + +out: + mutex_unlock(&aon_chan->transaction_lock); + + return th1520_aon_to_linux_errno(ret); +} +EXPORT_SYMBOL_GPL(th1520_aon_call_rpc); + +/** + * th1520_aon_power_update() - Change power state of a resource via TH1520 AON + * @aon_chan: Pointer to the AON channel structure + * @rsrc: Resource ID whose power state needs to be updated + * @power_on: Boolean indicating whether the resource should be powered on (true) + * or powered off (false) + * + * This function requests the TH1520 AON subsystem to set the power mode of the + * given resource (@rsrc) to either on or off. It constructs the message in + * `struct th1520_aon_msg_req_set_resource_power_mode` and then invokes + * th1520_aon_call_rpc() to make the request. If the AON call fails, an error + * message is logged along with the specific return code. + * + * Return: + * * 0 on success + * * A negative error code in case of failures (propagated from + * th1520_aon_call_rpc()). + */ +int th1520_aon_power_update(struct th1520_aon_chan *aon_chan, u16 rsrc, + bool power_on) +{ + struct th1520_aon_msg_req_set_resource_power_mode msg = {}; + struct th1520_aon_rpc_msg_hdr *hdr = &msg.hdr; + int ret; + + hdr->svc = TH1520_AON_RPC_SVC_PM; + hdr->func = TH1520_AON_PM_FUNC_SET_RESOURCE_POWER_MODE; + hdr->size = TH1520_AON_RPC_MSG_NUM; + + RPC_SET_BE16(&msg.resource, 0, rsrc); + RPC_SET_BE16(&msg.resource, 2, + (power_on ? TH1520_AON_PM_PW_MODE_ON : + TH1520_AON_PM_PW_MODE_OFF)); + + ret = th1520_aon_call_rpc(aon_chan, &msg); + if (ret) + dev_err(aon_chan->cl.dev, "failed to power %s resource %d ret %d\n", + power_on ? "up" : "off", rsrc, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(th1520_aon_power_update); + +static int th1520_aon_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct th1520_aon_chan *aon_chan; + struct mbox_client *cl; + int ret; + struct platform_device_info pdevinfo = { + .name = "th1520-pd", + .id = PLATFORM_DEVID_AUTO, + .parent = dev, + }; + + aon_chan = devm_kzalloc(dev, sizeof(*aon_chan), GFP_KERNEL); + if (!aon_chan) + return -ENOMEM; + + cl = &aon_chan->cl; + cl->dev = dev; + cl->tx_block = true; + cl->tx_tout = MAX_TX_TIMEOUT; + cl->rx_callback = th1520_aon_rx_callback; + + aon_chan->ch = mbox_request_channel_byname(cl, "aon"); + if (IS_ERR(aon_chan->ch)) + return dev_err_probe(dev, PTR_ERR(aon_chan->ch), + "Failed to request aon mbox chan\n"); + + mutex_init(&aon_chan->transaction_lock); + init_completion(&aon_chan->done); + + platform_set_drvdata(pdev, aon_chan); + + aon_chan->pd = platform_device_register_full(&pdevinfo); + ret = PTR_ERR_OR_ZERO(aon_chan->pd); + if (ret) { + dev_err(dev, "Failed to register child device 'th1520-pd': %d\n", ret); + goto free_mbox_chan; + } + + ret = devm_of_platform_populate(dev); + if (ret) + goto unregister_pd; + + return 0; + +unregister_pd: + platform_device_unregister(aon_chan->pd); +free_mbox_chan: + mbox_free_channel(aon_chan->ch); + + return ret; +} + +static void th1520_aon_remove(struct platform_device *pdev) +{ + struct th1520_aon_chan *aon_chan = platform_get_drvdata(pdev); + + platform_device_unregister(aon_chan->pd); + mbox_free_channel(aon_chan->ch); +} + +static const struct of_device_id th1520_aon_match[] = { + { .compatible = "thead,th1520-aon" }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, th1520_aon_match); + +static struct platform_driver th1520_aon_driver = { + .driver = { + .name = "th1520-aon", + .of_match_table = th1520_aon_match, + }, + .probe = th1520_aon_probe, + .remove = th1520_aon_remove, +}; +module_platform_driver(th1520_aon_driver); + +MODULE_AUTHOR("Michal Wilczynski "); +MODULE_DESCRIPTION("T-HEAD TH1520 Always-On firmware driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/firmware/thead/thead,th1520-aon.h b/include/linux/firmware/thead/thead,th1520-aon.h new file mode 100644 index 000000000000..c7272599ea08 --- /dev/null +++ b/include/linux/firmware/thead/thead,th1520-aon.h @@ -0,0 +1,197 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + */ + +#ifndef _THEAD_AON_H +#define _THEAD_AON_H + +#include +#include + +#define AON_RPC_MSG_MAGIC (0xef) +#define TH1520_AON_RPC_VERSION 2 +#define TH1520_AON_RPC_MSG_NUM 7 + +extern struct th1520_aon_chan *aon_chan; + +enum th1520_aon_rpc_svc { + TH1520_AON_RPC_SVC_UNKNOWN = 0, + TH1520_AON_RPC_SVC_PM = 1, + TH1520_AON_RPC_SVC_MISC = 2, + TH1520_AON_RPC_SVC_AVFS = 3, + TH1520_AON_RPC_SVC_SYS = 4, + TH1520_AON_RPC_SVC_WDG = 5, + TH1520_AON_RPC_SVC_LPM = 6, + TH1520_AON_RPC_SVC_MAX = 0x3F, +}; + +enum th1520_aon_misc_func { + TH1520_AON_MISC_FUNC_UNKNOWN = 0, + TH1520_AON_MISC_FUNC_SET_CONTROL = 1, + TH1520_AON_MISC_FUNC_GET_CONTROL = 2, + TH1520_AON_MISC_FUNC_REGDUMP_CFG = 3, +}; + +enum th1520_aon_wdg_func { + TH1520_AON_WDG_FUNC_UNKNOWN = 0, + TH1520_AON_WDG_FUNC_START = 1, + TH1520_AON_WDG_FUNC_STOP = 2, + TH1520_AON_WDG_FUNC_PING = 3, + TH1520_AON_WDG_FUNC_TIMEOUTSET = 4, + TH1520_AON_WDG_FUNC_RESTART = 5, + TH1520_AON_WDG_FUNC_GET_STATE = 6, + TH1520_AON_WDG_FUNC_POWER_OFF = 7, + TH1520_AON_WDG_FUNC_AON_WDT_ON = 8, + TH1520_AON_WDG_FUNC_AON_WDT_OFF = 9, +}; + +enum th1520_aon_sys_func { + TH1520_AON_SYS_FUNC_UNKNOWN = 0, + TH1520_AON_SYS_FUNC_AON_RESERVE_MEM = 1, +}; + +enum th1520_aon_lpm_func { + TH1520_AON_LPM_FUNC_UNKNOWN = 0, + TH1520_AON_LPM_FUNC_REQUIRE_STR = 1, + TH1520_AON_LPM_FUNC_RESUME_STR = 2, + TH1520_AON_LPM_FUNC_REQUIRE_STD = 3, + TH1520_AON_LPM_FUNC_CPUHP = 4, + TH1520_AON_LPM_FUNC_REGDUMP_CFG = 5, +}; + +enum th1520_aon_pm_func { + TH1520_AON_PM_FUNC_UNKNOWN = 0, + TH1520_AON_PM_FUNC_SET_RESOURCE_REGULATOR = 1, + TH1520_AON_PM_FUNC_GET_RESOURCE_REGULATOR = 2, + TH1520_AON_PM_FUNC_SET_RESOURCE_POWER_MODE = 3, + TH1520_AON_PM_FUNC_PWR_SET = 4, + TH1520_AON_PM_FUNC_PWR_GET = 5, + TH1520_AON_PM_FUNC_CHECK_FAULT = 6, + TH1520_AON_PM_FUNC_GET_TEMPERATURE = 7, +}; + +struct th1520_aon_rpc_msg_hdr { + u8 ver; /* version of msg hdr */ + u8 size; /* msg size ,uinit in bytes,the size includes rpc msg header self */ + u8 svc; /* rpc main service id */ + u8 func; /* rpc sub func id of specific service, sent by caller */ +} __packed __aligned(1); + +struct th1520_aon_rpc_ack_common { + struct th1520_aon_rpc_msg_hdr hdr; + u8 err_code; +} __packed __aligned(1); + +#define RPC_SVC_MSG_TYPE_DATA 0 +#define RPC_SVC_MSG_TYPE_ACK 1 +#define RPC_SVC_MSG_NEED_ACK 0 +#define RPC_SVC_MSG_NO_NEED_ACK 1 + +#define RPC_GET_VER(MESG) ((MESG)->ver) +#define RPC_SET_VER(MESG, VER) ((MESG)->ver = (VER)) +#define RPC_GET_SVC_ID(MESG) ((MESG)->svc & 0x3F) +#define RPC_SET_SVC_ID(MESG, ID) ((MESG)->svc |= 0x3F & (ID)) +#define RPC_GET_SVC_FLAG_MSG_TYPE(MESG) (((MESG)->svc & 0x80) >> 7) +#define RPC_SET_SVC_FLAG_MSG_TYPE(MESG, TYPE) ((MESG)->svc |= (TYPE) << 7) +#define RPC_GET_SVC_FLAG_ACK_TYPE(MESG) (((MESG)->svc & 0x40) >> 6) +#define RPC_SET_SVC_FLAG_ACK_TYPE(MESG, ACK) ((MESG)->svc |= (ACK) << 6) + +#define RPC_SET_BE64(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 7] = _set_data & 0xFF; \ + data[_offset + 6] = (_set_data & 0xFF00) >> 8; \ + data[_offset + 5] = (_set_data & 0xFF0000) >> 16; \ + data[_offset + 4] = (_set_data & 0xFF000000) >> 24; \ + data[_offset + 3] = (_set_data & 0xFF00000000) >> 32; \ + data[_offset + 2] = (_set_data & 0xFF0000000000) >> 40; \ + data[_offset + 1] = (_set_data & 0xFF000000000000) >> 48; \ + data[_offset + 0] = (_set_data & 0xFF00000000000000) >> 56; \ + } while (0) + +#define RPC_SET_BE32(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 3] = (_set_data) & 0xFF; \ + data[_offset + 2] = (_set_data & 0xFF00) >> 8; \ + data[_offset + 1] = (_set_data & 0xFF0000) >> 16; \ + data[_offset + 0] = (_set_data & 0xFF000000) >> 24; \ + } while (0) + +#define RPC_SET_BE16(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 1] = (_set_data) & 0xFF; \ + data[_offset + 0] = (_set_data & 0xFF00) >> 8; \ + } while (0) + +#define RPC_SET_U8(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + data[OFFSET] = (SET_DATA) & 0xFF; \ + } while (0) + +#define RPC_GET_BE64(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u32 *)(PTR) = \ + (data[_offset + 7] | data[_offset + 6] << 8 | \ + data[_offset + 5] << 16 | data[_offset + 4] << 24 | \ + data[_offset + 3] << 32 | data[_offset + 2] << 40 | \ + data[_offset + 1] << 48 | data[_offset + 0] << 56); \ + } while (0) + +#define RPC_GET_BE32(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u32 *)(PTR) = \ + (data[_offset + 3] | data[_offset + 2] << 8 | \ + data[_offset + 1] << 16 | data[_offset + 0] << 24); \ + } while (0) + +#define RPC_GET_BE16(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u16 *)(PTR) = (data[_offset + 1] | data[_offset + 0] << 8); \ + } while (0) + +#define RPC_GET_U8(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + *(u8 *)(PTR) = (data[OFFSET]); \ + } while (0) + +/* + * Defines for SC PM Power Mode + */ +#define TH1520_AON_PM_PW_MODE_OFF 0 /* Power off */ +#define TH1520_AON_PM_PW_MODE_STBY 1 /* Power in standby */ +#define TH1520_AON_PM_PW_MODE_LP 2 /* Power in low-power */ +#define TH1520_AON_PM_PW_MODE_ON 3 /* Power on */ + +/* + * Defines for AON power islands + */ +#define TH1520_AON_AUDIO_PD 0 +#define TH1520_AON_VDEC_PD 1 +#define TH1520_AON_NPU_PD 2 +#define TH1520_AON_VENC_PD 3 +#define TH1520_AON_GPU_PD 4 +#define TH1520_AON_DSP0_PD 5 +#define TH1520_AON_DSP1_PD 6 + +int th1520_aon_call_rpc(struct th1520_aon_chan *aon_chan, void *msg); +int th1520_aon_power_update(struct th1520_aon_chan *aon_chan, u16 rsrc, + bool power_on); + +#endif /* _THEAD_AON_H */ From patchwork Tue Jan 28 19:48:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860544 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65D901E990D for ; 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Tue, 28 Jan 2025 19:48:30 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 05/18] dt-bindings: power: Add TH1520 SoC power domains Date: Tue, 28 Jan 2025 20:48:03 +0100 Message-Id: <20250128194816.2185326-6-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sf1CTZRzved937/uyY/gyuHxCi9u8UisQZdmTmSgH9Z5nd9If6RUeTH1v EGPYNkoR0wXjAAcRFsEQZ0SyI5CgbQfIRGgy0BiJhFSMwB/Hz+QQRpcBxn5Y/vf5fn48n+/3 7qFxoYUMoZMVak6pkMrFJJ+wdP7dG1YkKZNFTItQ161KDJn/0VOo1urAkMHm4KHhPhOG+l0z JLp472cKjVs1BBowVlAoq7OeRBP6YRLN6oZ56GbLWRLNFdgAssxlk6jO5qRQvcuAoa9nzQSq amoBKCfvAg/duBaLnMNdBJq4qcNRjn4VetTaRKHlgQYCld9vo5Bp+nMestftQ9ltXxA7n2Nn BrUUOz0xQbA/5s5TrHXhPME2650Uq2v+CbCNNXkkOzTQSrLnuuPYP07bMfaHqpNsdl0nxn62 FMHOXP6FZAtNNYDty7pF7RW+x99+mJMnf8QpN+1I5CdprpmII73+R8uc9cQp0MfPB340ZCSw vtSM5wM+LWSMAF5sMBBuQcjMA7iQ/65XmANwqqkaf5xoXxzzJaoBNJoqSe8wDeCZv0o9cZLZ AkeqDTy3EMxoCai9qgHuAWfGALTcPUu6XUHMbjhWa/BggnkeNoy7gBsLmCioGTkDvH2hsK29 x9Ptx+yEjUtGwusJhN1ldz0YX/Fkmcs9O0Gmjg+vf/uA8oZjYEP5976HguCk3eTj18JHzQbM i9PgiPmB77hM2Kyz+/DrcMjxcGU5eqVgI6xv2eSld8GK5UKem4ZMABz8M9C7QgAstnyFe2kB zM0Ret0vwC91Bf+VOowWXykLR6/0kEVApH/iGP0Tx+j/7z0P8BqwmktXpco4VaSC+zhcJU1V pStk4YfSUhvByte+vmx3NQHj5Gx4B8Bo0AEgjYuDBQccpTKh4LD0WAanTEtQpss5VQdYQxPi 1YLKNq1MyMikai6F445wyscqRvuFnMKCk07n5Z4LtT2sTvluw51gszE2frCopPgNxWVXr2X/ olb1VGJAyY1KvDH+nR3jnWu6Q/oPahGjiNJv64lMWx8bkXdFjR//RuuP31Eztow9yqnjV7cW 5MWMmuP8M8ujqa6yl0d5WZe2vrKrdX1YoV1Msy3tG3b3r+2P3vvMvROXakuqgEKrSMgMOVkd uuql9yuCrNFDSy57jzwsp/iAKkr9yQXNFHFbFJbcvKV3fPmQI8f+28H5jO2LPXG6pNLJsYi3 I1NeG9l37INXJUq+QPL0WzOTm3lvBiwoxJJPf78t2v+hXL/xV+eAbE9J4jprzLPxQwkuf3pi 24n7tGjhqF9j4DqemFAlSTe/iCtV0n8BHlCRmEkEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7r9JjPTDa7cUbQ4cX0Rk8XW37PY LdbsPcdkMf/IOVaLe5e2MFlc+fqezWLd0wvsFi/2NrJYXFsxl92i+dh6NouXs+6xWXzsucdq cXnXHDaLz71HGC22fW5hs1h75C67xfqv85ksFn7cymKxZMcuRou2zmWsFhdPuVrcvXeCxeLl 5R5mi7ZZ/Bb/9+xgt/h3bSOLxex3+9kttryZyGpxfG24Rcv+KSwOch7vb7Sye7x5+ZLF43DH F3aPvd8WsHjsnHWX3aNn5xlGj02rOtk87lzbw+Yx72Sgx/3u40wem5fUe7SsPcbk0f/XwOP9 vqtsHn1bVjF6XGq+zh4gFKVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CX0XhqC0vBeZ6KmXfXszQwXuLqYuTkkBAwkTj45zkziC0ksJRR4uzqVIi4 jMS17pcsELawxJ9rXWxdjFxANa8YJX6tOMQGkmATMJJ4sHw+K4gtIrCYRWLvvkqQImaBt4wS 12duBOsWFvCSeL5mPlgDi4CqxMYXXxlBbF4Be4nGB5MZITbIS+w/eBbsCk4BB4lNf1ewQFxk L/Ho7Qw2iHpBiZMzn4DFmYHqm7fOZp7AKDALSWoWktQCRqZVjCKppcW56bnFhnrFibnFpXnp esn5uZsYgell27Gfm3cwznv1Ue8QIxMH4yFGCQ5mJRHe2HMz0oV4UxIrq1KL8uOLSnNSiw8x mgLdPZFZSjQ5H5jg8kriDc0MTA1NzCwNTC3NjJXEed0un08TEkhPLEnNTk0tSC2C6WPi4JRq YJLNq/kWw+XnYNho9nO+ZO6/LME10luu7nauOHNNwEzz6mll6zVv475NiIuVeVWR+Dy6ZOFr VYW3hTdeLA/c5nj4SWHNwVkfFxV2qAsyLtNMnGVXrev9qvChXOm856unc298++hmaFiheSxD CN/MhP+/O9mzYk3LOOa7VH8JnCvl/rppt9gNxyj3HYesbDIlJC4oKFxZlpzC670q8VKhverR OduutjAte7zBpEEoWe4mt1iscvZHl63n2ELNTBrkb7KaCn5PO16urResmsGX9fl/zq/qV/+u 7OVk89v4OL7+/EnJpWI/Au5werW1MKeaC7hc4zK2iuRumRSW6fey1su6orzz9PZTPMJu+5uU WIozEg21mIuKEwGyxImtuAMAAA== X-CMS-MailID: 20250128194831eucas1p258522118b2f21abd8f6d4cdde277fe07 X-Msg-Generator: CA X-RootMTR: 20250128194831eucas1p258522118b2f21abd8f6d4cdde277fe07 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194831eucas1p258522118b2f21abd8f6d4cdde277fe07 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add power domain ID's for the TH1520 SoC power domains. Signed-off-by: Michal Wilczynski --- MAINTAINERS | 1 + .../dt-bindings/power/thead,th1520-power.h | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 include/dt-bindings/power/thead,th1520-power.h diff --git a/MAINTAINERS b/MAINTAINERS index 9a98b52fffdc..4106b0e26589 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20351,6 +20351,7 @@ F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h +F: include/dt-bindings/power/thead,th1520-power.h F: include/linux/firmware/thead/thead,th1520-aon.h RNBD BLOCK DRIVERS diff --git a/include/dt-bindings/power/thead,th1520-power.h b/include/dt-bindings/power/thead,th1520-power.h new file mode 100644 index 000000000000..8395bd1459f3 --- /dev/null +++ b/include/dt-bindings/power/thead,th1520-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2022 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#ifndef __DT_BINDINGS_POWER_TH1520_H +#define __DT_BINDINGS_POWER_TH1520_H + +#define TH1520_AUDIO_PD 0 +#define TH1520_VDEC_PD 1 +#define TH1520_NPU_PD 2 +#define TH1520_VENC_PD 3 +#define TH1520_GPU_PD 4 +#define TH1520_DSP0_PD 5 +#define TH1520_DSP1_PD 6 + +#endif From patchwork Tue Jan 28 19:48:04 2025 Content-Type: text/plain; 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Tue, 28 Jan 2025 19:48:32 +0000 (GMT) X-AuditID: cbfec7f4-c0df970000004fb9-10-67993491db44 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 12.BB.19654.09439976; Tue, 28 Jan 2025 19:48:32 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194831eusmtip143f0d921494e2f4f578bdda147f34f65~e8wWYl26z2620826208eusmtip1n; Tue, 28 Jan 2025 19:48:31 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 06/18] pmdomain: thead: Add power-domain driver for TH1520 Date: Tue, 28 Jan 2025 20:48:04 +0100 Message-Id: <20250128194816.2185326-7-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se1BUZRjG+845e86BXDouO/ENlRZFo5VA4jhfE4LMZHOgaRSnEbXQtjiz OMBCe8CwmAkGdlMuCg4lLsYtdJdVJLfdDTZgi8suGpKAwU7jIg4gF7nIRSMRiN1D5X+/932f 73ned+ajcYmZ9KWPKFI4pUKW4Ed6Embb379vKdx2Vh5kO/MKau+rxJBpUUOhS42dGCpr7RSh /m4jhm4+mCbR5eEbFBptzCRQr+47CmXZakk0pukn0Uxevwj1WM6RaC6/FSDzXDaJalqdFKp9 UIahihkTgarqLACpT1wQoa5ru5Czv51AYz15OFJrnkErDXUUWu69QqCSKSuFjBOFImSviUbZ 1iJi5wZ22qGi2ImxMYJtOT5PsY0Pywm2XuOk2Lz6DsAa9CdI9lZvA8mWXo1ib+faMfbHqq/Y 7Bobxp5aCmKnm/4g2ZNGPWC7s/qoPZKDniGxXMKRo5wyMPRjz7iJil4quTsybTpXi2eAuR05 wIOGzDZYfN8hygGetITRAdj3bSYpFPMAVl9TE0IxB2DGctfqhHY/0V+KFvpaAE1OKxCKCQBv 3KvCXb4ksxUOaMvcvlJGRUBVW6ZbhTMjAJqHzpEulTezG3Z0dGAuJhh/aBh9SLhYzITBjB+m SGHDjdD663W3qwezExqWdGua9fDq2SE346uaLFMJ7gqAzBVPOP5oQCTs+g60NT0t+HjDcbuR Evh5uFJfhgmcBAdMs7jA6bA+z77Gb8NbnY/cJ+PMZlhrCRTa4dBi+B4T3L2gY3K9sIEXPG0+ gwttMTyulgjqV+E3efn/hXbqzGuhLJyeayUKwEuaJ27RPHGL5v/ccoDrgQ+XyifKOX6rgvs8 gJcl8qkKecCnSYkGsPq1f1u2z9cB7fhMQDPAaNAMII37ScUxncVyiThWduwLTpl0WJmawPHN 4Dma8PMRV1pVcgkjl6Vw8RyXzCn/nWK0h28GFkKDohe01vgguC84si1mSaTYHvqsRf2WXM// PGi453VHGrF/JPx++1Nppa2Oi5U+7RqzczK/5HST7u6BEXZQGjhTMOydu284+LMsauHdQ5+8 v5HaG13RsyOCPzy7e8FnQfZhSKzBVtjCFLz3S/2BDQFh61Lkm079lRjmOHRscSzcIyI+Kp20 m7587N+2Ik3f49h/vqMcL+WLZ4sUDcuzofbImMuTpRWFOfkj+q7r1M2XtyyG/LSppcEr9KiR NKY13X7R9EF+VN3C3epdcY9Fuj99kyXqr/XVKvn5TFux9GIyP793KXhwqZrebMr8qH30YPa6 0u2S5Snn0OvGC3dOit/w9yP4ONmbr+FKXvYPXav0PEkEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7oTTGamG3zYbmRx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEv483Ca+wFl7wq3ncvZ25g/GzbxcjBISFgIrFqTXgXIxeHkMBSRomp/y6y dzFyAsVlJK51v2SBsIUl/lzrYoMoesUo8WfzTmaQBJuAkcSD5fNZQWwRgcUsEnv3VYIUMQu8 ZZS4PnMjWLewgK/Ez+8XwKayCKhKbHrxDSzOK2Av0bDhHRvEBnmJ/QfPgg3lFHCQ2PR3BViN EFDNo7cz2CDqBSVOznwCFmcGqm/eOpt5AqPALCSpWUhSCxiZVjGKpJYW56bnFhvpFSfmFpfm pesl5+duYgSml23Hfm7Zwbjy1Ue9Q4xMHIyHGCU4mJVEeGPPzUgX4k1JrKxKLcqPLyrNSS0+ xGgKdPdEZinR5HxggssriTc0MzA1NDGzNDC1NDNWEudlu3I+TUggPbEkNTs1tSC1CKaPiYNT qoFJOcbm1sM8x4tOliefm88+1dAm2Mz1UeXLnfcGHasU5JSjzO+FZHpOnTTxfJEja8nRE7Gp hzv2x35uviAm8W56y1Yuz9R9fJMm/8jx2CRVGizWPcU1Tu7dueOeU2Z8d2NbuvT0w4awZlet p5M7nzzzFNZvKJKUdf6VWWzQZLPmm+f13SfSjFVjJN+c8G55XrD88FNlxrblIp6fU1IZ5xs8 Cbu83CbnF1f9/fnWMqqWofvD9t1scU5/s0+3xHDRtpshr/ZdDfr9IdvKMeCepunK/4unRS/d doPXdWbftF3HUlfMffpFT83q/A0+4VdydY+O/+Getbdq3rSG67YHhb/wlOvyJWw1manEJGwp /fOJEktxRqKhFnNRcSIApX+kMrgDAAA= X-CMS-MailID: 20250128194832eucas1p15db9ed3575703812ecc0374ffc5b2861 X-Msg-Generator: CA X-RootMTR: 20250128194832eucas1p15db9ed3575703812ecc0374ffc5b2861 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194832eucas1p15db9ed3575703812ecc0374ffc5b2861 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The T-Head TH1520 SoC contains multiple power islands that can be programmatically turned on and off using the AON (Always-On) protocol and a hardware mailbox [1]. The relevant mailbox driver has already been merged into the mainline kernel in commit 5d4d263e1c6b ("mailbox: Introduce support for T-head TH1520 Mailbox driver"); Introduce a power-domain driver for the TH1520 SoC, which is using AON firmware protocol to communicate with E902 core through the hardware mailbox. This way it can send power on/off commands to the E902 core. The interaction with AUDIO power island e.g trying to turn it OFF proved to crash the firmware running on the E902 core. Introduce the workaround to disable interacting with the power island. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [1] Signed-off-by: Michal Wilczynski --- MAINTAINERS | 1 + drivers/pmdomain/Kconfig | 1 + drivers/pmdomain/Makefile | 1 + drivers/pmdomain/thead/Kconfig | 12 ++ drivers/pmdomain/thead/Makefile | 2 + drivers/pmdomain/thead/th1520-pm-domains.c | 193 +++++++++++++++++++++ 6 files changed, 210 insertions(+) create mode 100644 drivers/pmdomain/thead/Kconfig create mode 100644 drivers/pmdomain/thead/Makefile create mode 100644 drivers/pmdomain/thead/th1520-pm-domains.c diff --git a/MAINTAINERS b/MAINTAINERS index 4106b0e26589..33c804f1a60f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20350,6 +20350,7 @@ F: drivers/firmware/thead,th1520-aon.c F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c +F: drivers/pmdomain/thead/ F: include/dt-bindings/clock/thead,th1520-clk-ap.h F: include/dt-bindings/power/thead,th1520-power.h F: include/linux/firmware/thead/thead,th1520-aon.h diff --git a/drivers/pmdomain/Kconfig b/drivers/pmdomain/Kconfig index 23c64851a5b0..91f04ace35d4 100644 --- a/drivers/pmdomain/Kconfig +++ b/drivers/pmdomain/Kconfig @@ -16,6 +16,7 @@ source "drivers/pmdomain/st/Kconfig" source "drivers/pmdomain/starfive/Kconfig" source "drivers/pmdomain/sunxi/Kconfig" source "drivers/pmdomain/tegra/Kconfig" +source "drivers/pmdomain/thead/Kconfig" source "drivers/pmdomain/ti/Kconfig" source "drivers/pmdomain/xilinx/Kconfig" diff --git a/drivers/pmdomain/Makefile b/drivers/pmdomain/Makefile index a68ece2f4c68..7030f44a49df 100644 --- a/drivers/pmdomain/Makefile +++ b/drivers/pmdomain/Makefile @@ -14,6 +14,7 @@ obj-y += st/ obj-y += starfive/ obj-y += sunxi/ obj-y += tegra/ +obj-y += thead/ obj-y += ti/ obj-y += xilinx/ obj-y += core.o governor.o diff --git a/drivers/pmdomain/thead/Kconfig b/drivers/pmdomain/thead/Kconfig new file mode 100644 index 000000000000..c7a1ac0c61dc --- /dev/null +++ b/drivers/pmdomain/thead/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config TH1520_PM_DOMAINS + tristate "Support TH1520 Power Domains" + depends on TH1520_AON_PROTOCOL || !TH1520_AON_PROTOCOL + select REGMAP_MMIO + help + This driver enables power domain management for the T-HEAD + TH-1520 SoC. On this SoC there are number of power domains, + which can be managed independently. For example GPU, NPU, + and DPU reside in their own power domains which can be + turned on/off. diff --git a/drivers/pmdomain/thead/Makefile b/drivers/pmdomain/thead/Makefile new file mode 100644 index 000000000000..adfdf5479c68 --- /dev/null +++ b/drivers/pmdomain/thead/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_TH1520_PM_DOMAINS) += th1520-pm-domains.o diff --git a/drivers/pmdomain/thead/th1520-pm-domains.c b/drivers/pmdomain/thead/th1520-pm-domains.c new file mode 100644 index 000000000000..7cf4ea519623 --- /dev/null +++ b/drivers/pmdomain/thead/th1520-pm-domains.c @@ -0,0 +1,193 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#include +#include +#include +#include + +#include + +struct th1520_power_domain { + struct th1520_aon_chan *aon_chan; + struct generic_pm_domain genpd; + u32 rsrc; +}; + +struct th1520_power_info { + const char *name; + u32 rsrc; + bool disabled; +}; + +/* + * The AUDIO power domain is marked as disabled to prevent the driver from + * managing its power state. Direct AON firmware calls to control this power + * island trigger a firmware bug causing system instability. Until this + * firmware issue is resolved, the AUDIO power domain must remain disabled + * to avoid crashes. + */ +static const struct th1520_power_info th1520_pd_ranges[] = { + [TH1520_AUDIO_PD] = {"audio", TH1520_AON_AUDIO_PD, true }, + [TH1520_VDEC_PD] = { "vdec", TH1520_AON_VDEC_PD, false }, + [TH1520_NPU_PD] = { "npu", TH1520_AON_NPU_PD, false }, + [TH1520_VENC_PD] = { "venc", TH1520_AON_VENC_PD, false }, + [TH1520_GPU_PD] = { "gpu", TH1520_AON_GPU_PD, false }, + [TH1520_DSP0_PD] = { "dsp0", TH1520_AON_DSP0_PD, false }, + [TH1520_DSP1_PD] = { "dsp1", TH1520_AON_DSP1_PD, false } +}; + +static inline struct th1520_power_domain * +to_th1520_power_domain(struct generic_pm_domain *genpd) +{ + return container_of(genpd, struct th1520_power_domain, genpd); +} + +static int th1520_pd_power_on(struct generic_pm_domain *domain) +{ + struct th1520_power_domain *pd = to_th1520_power_domain(domain); + + return th1520_aon_power_update(pd->aon_chan, pd->rsrc, true); +} + +static int th1520_pd_power_off(struct generic_pm_domain *domain) +{ + struct th1520_power_domain *pd = to_th1520_power_domain(domain); + + return th1520_aon_power_update(pd->aon_chan, pd->rsrc, false); +} + +static struct generic_pm_domain *th1520_pd_xlate(const struct of_phandle_args *spec, + void *data) +{ + struct generic_pm_domain *domain = ERR_PTR(-ENOENT); + struct genpd_onecell_data *pd_data = data; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = to_th1520_power_domain(pd_data->domains[i]); + if (pd->rsrc == spec->args[0]) { + domain = &pd->genpd; + break; + } + } + + return domain; +} + +static struct th1520_power_domain * +th1520_add_pm_domain(struct device *dev, const struct th1520_power_info *pi) +{ + struct th1520_power_domain *pd; + int ret; + + pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); + if (!pd) + return ERR_PTR(-ENOMEM); + + pd->rsrc = pi->rsrc; + pd->genpd.power_on = th1520_pd_power_on; + pd->genpd.power_off = th1520_pd_power_off; + pd->genpd.name = pi->name; + + ret = pm_genpd_init(&pd->genpd, NULL, true); + if (ret) + return ERR_PTR(ret); + + return pd; +} + +static void th1520_pd_init_all_off(struct generic_pm_domain **domains, + struct device *dev) +{ + int ret; + int i; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = to_th1520_power_domain(domains[i]); + + ret = th1520_aon_power_update(pd->aon_chan, pd->rsrc, false); + if (ret) + dev_err(dev, + "Failed to initially power down power domain %s\n", + pd->genpd.name); + } +} + +static int th1520_pd_probe(struct platform_device *pdev) +{ + struct generic_pm_domain **domains; + struct genpd_onecell_data *pd_data; + struct th1520_aon_chan *aon_chan; + struct device *dev = &pdev->dev; + int i; + + aon_chan = dev_get_drvdata(dev->parent); + if (!aon_chan) { + dev_err(dev, "Failed to get AON channel from parent\n"); + return -EINVAL; + } + + domains = devm_kcalloc(dev, ARRAY_SIZE(th1520_pd_ranges), + sizeof(*domains), GFP_KERNEL); + if (!domains) + return -ENOMEM; + + pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL); + if (!pd_data) + return -ENOMEM; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = th1520_add_pm_domain(dev, &th1520_pd_ranges[i]); + if (IS_ERR(pd)) + return PTR_ERR(pd); + + pd->aon_chan = aon_chan; + domains[i] = &pd->genpd; + dev_dbg(dev, "added power domain %s\n", pd->genpd.name); + } + + pd_data->domains = domains; + pd_data->num_domains = ARRAY_SIZE(th1520_pd_ranges); + pd_data->xlate = th1520_pd_xlate; + + /* + * Initialize all power domains to off to ensure they start in a + * low-power state. This allows device drivers to manage power + * domains by turning them on or off as needed. + */ + th1520_pd_init_all_off(domains, dev); + + return of_genpd_add_provider_onecell(dev->parent->of_node, pd_data); +} + +static struct platform_driver th1520_pd_driver = { + .driver = { + .name = "th1520-pd", + }, + .probe = th1520_pd_probe, +}; +module_platform_driver(th1520_pd_driver); + +MODULE_AUTHOR("Michal Wilczynski "); +MODULE_DESCRIPTION("T-HEAD TH1520 SoC power domain controller"); +MODULE_LICENSE("GPL"); From patchwork Tue Jan 28 19:48:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860543 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCA071F37DC for ; Tue, 28 Jan 2025 19:48:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 28 Jan 2025 19:48:32 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 07/18] riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs Date: Tue, 28 Jan 2025 20:48:05 +0100 Message-Id: <20250128194816.2185326-8-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SbUxTVxjHc+69vfe2irtUFo5u2QJRiS68qR9OguJL3Hb34sL8gA7YpBmX wqAFWsDh2AShiFA2ZCxqYRYdgwZBoEKlCHYitBWx4Z1uA8YGysoYjFGMgwCjtG5++53/eZ7z e57k0LhQR26lY6XJnEwqivcmBYTO+I/Ft2jvZXFApTYImYeuYahxSUWh6lYLhtTtFh4a7W3A UP/CLIluPOqm0O+tmQQa1HxLoSxjLYlsqlESzSlHeaivuZRE8wXtAOnms0lU0z5CodoFNYau zjUSqLypGaCc8xU81NP5OhoZNRPI1qfEUY7qBbTa0kShlcF6ApXMGCjUMH2Bh0w1x1G2oZg4 +Ao7a1VQ7LTNRrD3cu0U2/qkjGD1qhGKVeq7AKutOk+yw4MtJHvl/vvsL/kmjL1ZfobNrjFi 7FfLAezsnQGS/bKhCrC9WUNUiDBMsC+Ki49N5WT+wZGCmJKaLiyxmP+p8nY3mQEeUHmAT0Nm L6xQn8XygIAWMhoAzyluAOfBDuBS05DrMA+g9soM71nL6k8a0sFCphJAdZWvk6cB1PzxmoNJ Zjccq1TzHM0ejIKAio7M9ZdwZhJA3UTpevdm5m1oHn+KO5hgtsOicj1wsBtzALbkqXCn7VVo uPtwnfnMQahd1hDOGnd4//LEOuNrNVmNJbhDAJkaAexSDri2OwJ7hjMxJ2+GU6YGV/4yXNWr XXkCHGv82yVLh3qlycVBcNiyuDYovSbYCWub/Z3xITjQVIA7YshsgtY/3Z0jbIJFuouu2A3m 5gid1TvgN8qC/6QWjc4lZeF0tY1XCLxUzy2jem4Z1f/eMoBXAU8uRS4Rc/I9Uu6Un1wkkadI xX4fJ0i0YO1rP1gxLTQBzdScXxvAaNAGII17e7h9aLkkFrpFidJOc7KEk7KUeE7eBl6iCW9P t2sGhVjIiEXJXBzHJXKyZ7cYzd+agXmNn4v1ayO8L0Qv/9Wx+11ayJYvhayEfNSvL46+VGst Hqh/x55U8ES68bA9hjt5avG01DPp64sH8O6wrp5K02SRwB5+yxCwz+rrM7njRL2pL+NWp7ni i6XryIcOjPtxZUyTNBif9uLGMUPoYVFmWeJURODots+5laPcrmiyk+91PGJmIKrNf3wu7Q6z 4ZPC5WMPk0O7fMKrfSMm76lvA2vdZ28FbK/79aw9/Y069oMOw6HFUFi4IcNmjezwcG/RbMv/ XiYx9Dc/nYiN/CHuveuB+9ONN+35Yd89ku1/M2hLakyuR/dvfElw75GRE0cfW86E73wMkHEL 2vPzXT1RmmoODvcm5DGiwF24TC76F71bPNJJBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGKsWRmVeSWpSXmKPExsVy+t/xu7qTTGamG/xew2Fx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvY/baM0wFUzgrenZfYGtgPM3excjJISFgIvH/1gq2LkYuDiGBpYwSn76t gUrISFzrfskCYQtL/LnWBVX0ilHi7oMfbCAJNgEjiQfL57OC2CICi1kk9u6rBCliFnjLKHF9 5kawbmEBL4kTj38wg9gsAqoSk5bsZASxeQXsJfZ0zWKG2CAvsf/gWTCbU8BBYtPfFWC9QkA1 j97OYIOoF5Q4OfMJWJwZqL5562zmCYwCs5CkZiFJLWBkWsUoklpanJueW2yoV5yYW1yal66X nJ+7iRGYYLYd+7l5B+O8Vx/1DjEycTAeYpTgYFYS4Y09NyNdiDclsbIqtSg/vqg0J7X4EKMp 0N0TmaVEk/OBKS6vJN7QzMDU0MTM0sDU0sxYSZzX7fL5NCGB9MSS1OzU1ILUIpg+Jg5OqQam jFeKB1Wv1AilM2jsDtYP/NBQtV9o4e0cvdApQesdDxRzvBd8devrkn3/G0p2Tfr7K3yDVGFl H+OOI7rGniceFTdtW/FISu0Re87Ts7Nb+mYZZjMZTwwrX/w62/hL+BT1ZWmTHn49uINrY+Kk cLGFzTY/DWtklmyrurvDavKU30EezEfvfD+yZb0xW/1U1V+7WlUlYyf9eXYoeC7XCd3+XcLT TN835i0+XC9kYPTmaOPefbve/Z3OySL7Rfjhe5GFz+PYcq5v0O/j9TMUED+z8YpH9OLftg3N ZueTGc+sOmVRcv5R8ZesIGbhsg/6p55N3vEy9PnGV2sWS60VaE3j0Tz+4XD9DhfXGqEo/xcX pZRYijMSDbWYi4oTAWPpytO5AwAA X-CMS-MailID: 20250128194834eucas1p2f7581075b9f238c84e83c5fa210bc3ea X-Msg-Generator: CA X-RootMTR: 20250128194834eucas1p2f7581075b9f238c84e83c5fa210bc3ea X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194834eucas1p2f7581075b9f238c84e83c5fa210bc3ea References: <20250128194816.2185326-1-m.wilczynski@samsung.com> T-Head SoCs feature separate power domains (power islands) for major components like the GPU, Audio, and NPU. To manage the power states of these components effectively, the kernel requires generic power domain support. This commit enables `CONFIG_PM_GENERIC_DOMAINS` for T-Head SoCs, allowing the power domain driver for these components to be compiled and integrated. This ensures proper power management and energy efficiency on T-Head platforms. By selecting `PM_GENERIC_DOMAINS`, we provide the necessary framework for the power domain drivers to function correctly on RISC-V architecture with T-Head SoCs. Signed-off-by: Michal Wilczynski --- arch/riscv/Kconfig.socs | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 1916cf7ba450..83833ded8908 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -53,6 +53,7 @@ config ARCH_THEAD bool "T-HEAD RISC-V SoCs" depends on MMU && !XIP_KERNEL select ERRATA_THEAD + select PM_GENERIC_DOMAINS if PM help This enables support for the RISC-V based T-HEAD SoCs. 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Tue, 28 Jan 2025 19:48:35 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp2.samsung.com (KnoxPortal) with ESMTP id 20250128194835eusmtrp210959b5e9e63902a97141e75018c9021~e8waG72z13008430084eusmtrp2b; Tue, 28 Jan 2025 19:48:35 +0000 (GMT) X-AuditID: cbfec7f5-ed1d670000004fad-d9-67993494bf6f Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 04.BB.19654.39439976; Tue, 28 Jan 2025 19:48:35 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194834eusmtip1f0ed1d8aced5134e4dfe40876a885aec~e8wYybosw0291602916eusmtip1a; Tue, 28 Jan 2025 19:48:34 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 08/18] dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller Date: Tue, 28 Jan 2025 20:48:06 +0100 Message-Id: <20250128194816.2185326-9-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0xTdxTH/fXe3lua1F0KCz8QmTZophsgk+jPMBU21DuSRYyZLnuxZtxU Iq+0MofbBMNjgFXQwOxrludkDY8BbUc7sAqMFoQOkac853A8woYVMG5IGXBx87/P+Z7vyfec 5PAwoZ7w4kXHnWGkceIYEcHHjS1//+qXF6SU7CrNDEC2viIOMiyqSFTeYOcgbbOdi0a69BzU vTBLoMqHnSSabLiAo96y70iU2lJFoCnVCIEc8hEuumfWEGjuUjNAxrk0AlU0D5OoakHLQYUO A45K6swAZWR9z0V32w6h4REbjqbuyTGUoXoJLdfXkcjZW40j9V8WEulnrnCRteIkSrPk4SE+ 9Gx/OknPTE3hdFPmPEk3PCnAaZNqmKTlpnZA1+iyCHqot56gr7ceo0cvWjl0bUkynVbRwqFz lnbRszd7CPqyXgfortQ+MkL4Af/NKCYm+nNGGnDgU/6pPkdEQvWmLxYte1JAtkc2cOFBKggO KopANuDzhFQZgLlPJzC2mAdQM+DkssUcgAOKevB8pMLYTbKNGwBm/dZDsMUMgN2l5fiqi6De gGM3tGvj7lQ6DtN/ubCWglETABrHNcSqy406AXUK/QrzeDi1DTqNvquygDoI5zWPuGzcK9By uwNbZRcqBNYsleGsxxW2KsfXGFvxpBrUGOuv4MOumjCWw+Azk41k2Q1OW/Xr7A2XTVoOy/Fw zPB4ffYraJJb1zkYDtn/WVsNo3bAKnMAK4fC0VozvipDaiPs/9OV3WAjvGq8hrGyAGZmCFn3 dpgvv/RfqL3MuB5Kw0lTOzcXbFW9cIvqhVtU/+cWAEwHPJhEWayEke2OY876y8SxssQ4if9n 8bE1YOWx7zitC3WgbNrh3wg4PNAIIA8TuQs+tiskQkGUOOkcI42PlCbGMLJGsImHizwERZZ0 iZCSiM8wpxkmgZE+73J4Ll4pnOMnv3Uf5B9sFW2o2hE+jZ5KC3ZueNRqGA033Ur+0lG8zyq7 dXrzw4Scn/0iRtKfHFc/SH59t7zp/rOL0XeKDedsyZ6lrl4hhTfj/DqLj7yVetiZMVrI4OLg ifFcc1R/o3hve8fhE015+W3ej9sG33ZbbvQI3et8L7by95LAYI/igcB39niJx+WVUHR20fqa /X5K7TfVt79+t0eh1ir/0ARNthz6iJsQbt6Gn89XV+VYJuWd4HKk0rP62Pvlgs1DW2ajCkJS 7urCfNupT64l9Q9c6fA8+sDH6+qPP6S9HCEPzfIWlu73rXT58CfhVsf5A7GM0DKW1D5sa+Ye VeYs7d/3qk/kFhEuOyUO3IlJZeJ/ATFSKGRHBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrEKsWRmVeSWpSXmKPExsVy+t/xu7qTTWamG8ybKGtx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEv4/rHgIKN0hW/95s1MHaJdzFyckgImEis3XaFvYuRi0NIYCmjxLbjp9gg EjIS17pfskDYwhJ/rnWxQRS9YpTYfGcOE0iCTcBI4sHy+awgtojAYhaJvfsqQYqYBd4ySlyf uRGom4NDWCBEYt3iGhCTRUBV4t82FZByXgF7iS9zPrBCzJeX2H/wLDOIzSngILHp7wqwvUJA NY/ezmCDqBeUODnzCVicGai+eets5gmMArOQpGYhSS1gZFrFKJJaWpybnltspFecmFtcmpeu l5yfu4kRmFi2Hfu5ZQfjylcf9Q4xMnEwHmKU4GBWEuGNPTcjXYg3JbGyKrUoP76oNCe1+BCj KdDZE5mlRJPzgaktryTe0MzA1NDEzNLA1NLMWEmcl+3K+TQhgfTEktTs1NSC1CKYPiYOTqkG pq5/ga4tW0t2r9I+FHrhsc/aMqmjZkWeEVH+PBfeZPPfbvdZz/Rfxkn2d+DHDwkvJ23+W/Mp d4N/UXvSP9GT3y9vPRZfOXuVzntzaUvPlf8qFrD6Jequ0DJbfO+qh7bFTbl1Sk7hjD1ZPjs3 Kx+Vnbq92lpg+9J9dnsLkq0Ut5ZMLWh0Ov8i6brKJlaD+y2OZ+Wquzqv/NjfF5DrXXNwfvaa uKM/hM9N3y3SvDv9hN3/Q9L5vGLr82/6Jm78YbPHT7NPUWXtZs9709qWVVVyNrwU6NtZanow T/mMrvIJGfe9GgXPrcLLjDS3LEuO1Zv+zH+inXB7U18n49puieQTFRKbXFJU38tMf55k0s6l xFKckWioxVxUnAgAm9ewd7UDAAA= X-CMS-MailID: 20250128194835eucas1p29b16bee72365f321e1056fc4d9d44345 X-Msg-Generator: CA X-RootMTR: 20250128194835eucas1p29b16bee72365f321e1056fc4d9d44345 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194835eucas1p29b16bee72365f321e1056fc4d9d44345 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add a YAML schema for the T-HEAD TH1520 SoC reset controller. This controller manages resets for subsystems such as the GPU within the TH1520 SoC. Signed-off-by: Michal Wilczynski --- .../bindings/reset/thead,th1520-reset.yaml | 44 +++++++++++++++++++ MAINTAINERS | 2 + .../dt-bindings/reset/thead,th1520-reset.h | 15 +++++++ 3 files changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml create mode 100644 include/dt-bindings/reset/thead,th1520-reset.h diff --git a/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml b/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml new file mode 100644 index 000000000000..f2e91d0add7a --- /dev/null +++ b/Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/thead,th1520-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 SoC Reset Controller + +description: + The T-HEAD TH1520 reset controller is a hardware block that asserts/deasserts + resets for SoC subsystems. + +maintainers: + - Michal Wilczynski + +properties: + compatible: + enum: + - thead,th1520-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + rst: reset-controller@ffef528000 { + compatible = "thead,th1520-reset"; + reg = <0xff 0xef528000 0x0 0x1000>; + #reset-cells = <1>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 33c804f1a60f..b4e21d814481 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20344,6 +20344,7 @@ F: Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml F: Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml +F: Documentation/devicetree/bindings/reset/thead,th1520-reset.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c F: drivers/firmware/thead,th1520-aon.c @@ -20353,6 +20354,7 @@ F: drivers/pinctrl/pinctrl-th1520.c F: drivers/pmdomain/thead/ F: include/dt-bindings/clock/thead,th1520-clk-ap.h F: include/dt-bindings/power/thead,th1520-power.h +F: include/dt-bindings/reset/thead,th1520-reset.h F: include/linux/firmware/thead/thead,th1520-aon.h RNBD BLOCK DRIVERS diff --git a/include/dt-bindings/reset/thead,th1520-reset.h b/include/dt-bindings/reset/thead,th1520-reset.h new file mode 100644 index 000000000000..6bc445c5e39c --- /dev/null +++ b/include/dt-bindings/reset/thead,th1520-reset.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#ifndef _DT_BINDINGS_TH1520_RESET_H +#define _DT_BINDINGS_TH1520_RESET_H + +#define TH1520_RESET_ID_GPU 0 +#define TH1520_RESET_ID_NPU 1 +#define TH1520_RESET_ID_WDT0 2 +#define TH1520_RESET_ID_WDT1 3 + +#endif /* _DT_BINDINGS_TH1520_RESET_H */ From patchwork Tue Jan 28 19:48:07 2025 Content-Type: text/plain; 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Tue, 28 Jan 2025 19:48:36 +0000 (GMT) X-AuditID: cbfec7f5-e59c770000004fad-da-67993495c733 Received: from eusmtip1.samsung.com ( [203.254.199.221]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id F5.BB.19654.49439976; Tue, 28 Jan 2025 19:48:36 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250128194835eusmtip15c3f1bbeec8f39b0feab98990e3558e5~e8waCiFjz0819608196eusmtip1L; Tue, 28 Jan 2025 19:48:35 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 09/18] reset: thead: Add TH1520 reset controller driver Date: Tue, 28 Jan 2025 20:48:07 +0100 Message-Id: <20250128194816.2185326-10-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Se0xbZRz1u/f23lIt3HVk+8SJGTqXEWRsLuaDbWbP5E5idEZcojHa0JvC eHS2oGIMDNqSgUUeYZl0YHG8ChlDoFSeowKjgNCNV7sIBVy2lSICHYXhY8yWy3T/nd855/ed 80s+Pi4ykgH82MQkVp4ojg8iBYSx90/LaxcPFEnD7tu3oT7bFQw1/a2l0NUOC4Z0PRYemhox YGhsZZFE1+7dotBsRzqBrPoSCil760jk1E6RyKWZ4qHR1mISLef0AGRcVpGotsdOoboVHYZ+ cDURqLy5FaDMrEoeGh44iexTfQRyjmpwlKn1Q4/bmym0bq0n0OWFTgoZ5vN5yFx7Bqk6C4kj gczibTXFzDudBNN9wU0xHaulBNOitVOMpmUQMA01WSQzaW0nme/7TzPT35gxprE8jVHV9mJM 7qMwZvH6OMl8a6gBzIjSRr0r+lBwSMLGx37Oyve++akgxth/k3cu8+CXJWWp50Hjvmzgw4f0 AXh/2EBkAwFfROsB/MfcjXODG8BfhwYpblj2KCYX8WTljmmaxwlVAHZrft90zQNou1pFel0k vR/OVOk2XP60moDqG+nAO+C0A0Dj3WKPi8/fSr8FK9pSvAsEvQu2/XSL58VC+gh06fJ4XNxL sPPnIdyLfTx8wyM9wXm2wP6iuxsY93iUTZc3ikO6XuBpkUtxyyeg+cbs5kNb4ZzZsMnvgI9b dBiHZXCm6QHO4a9hi8a8iQ/CSctfGz1xeg+sa93L0Ufhkn6O8NKQ9oW3/9jCVfCFBcZLOEcL 4YVMEed+FV7U5PwXatEbN0MZqLROgDywU/vUMdqnjtH+n1sK8BqwnU1WJEhZxeuJ7BehCnGC IjlRGhotS2gAnq/9y7p5pRno51yhXQDjgy4A+XiQv/Bjy3dSkVAiTvmKlcs+kSfHs4ou8AKf CNouvNKplopoqTiJjWPZc6z8iYrxfQLOY8wH8w/O9DizbWfLD0tmw9LiIqpH92ebhJKaieHu Z8UL2xSSkxEDGVhp5L33Zk+nPBRnlb2f55ehjI4KwQTX3hmLs7vN0KUhqh+eXSs9pBrKHeyI raCOq1/J0Cwl9w8EzsW8/GNtfk4hNk2v+U5YOz7ru7MjI35XdHPk8+sF/bujJBZVQEhO8HMB zySMFVkrSiscSVnyBv1afmSzItUv/NiQeqd9xLBQeSL4sMM3/yNefmPBxKS7zVngaH/D4ZYB GeMsqT6+eHPctPh217j/knt3uOlFv1Orkb9FrB/jWQfHbOFle4prKqNXJwu7lVji0VMhjqh0 vD6NDb8+k8oGBhGKGPG+YFyuEP8LAcK3VkkEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCKsWRmVeSWpSXmKPExsVy+t/xu7pTTGamG1y+YmRx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvY9vJ86wFbdYVcxfXNTBuNuxi5OSQEDCReHTgPmsXIxeHkMBSRolTX5Yx QiRkJK51v2SBsIUl/lzrYoMoesUo0XV+BlgRm4CRxIPl81lBbBGBxSwSe/dVghQxC7xllLg+ cyNQNweHsICXxNLdlSA1LAKqEru3XwCr5xVwkPg4fwIrxAJ5if0HzzKD2JxA8U1/V4AtFhKw l3j0dgYbRL2gxMmZT8DizED1zVtnM09gFJiFJDULSWoBI9MqRpHU0uLc9NxiI73ixNzi0rx0 veT83E2MwOSy7djPLTsYV776qHeIkYmD8RCjBAezkghv7LkZ6UK8KYmVValF+fFFpTmpxYcY TYHunsgsJZqcD0xveSXxhmYGpoYmZpYGppZmxkrivGxXzqcJCaQnlqRmp6YWpBbB9DFxcEo1 MPF1hh5LzTbdWjNfKqSt9uPCFzwNrmqPz0Tdm3Fck3GG6Jzj8/as/Ny3KMuyVqDr4KMOGROH YvnG+/nfLkyy35Tza5rI9LS19Z13XdNUF5SqFnvu5Z8j2rZ37+6CkjnLm9dv+5FiyzqRX/1l r5Qi35cz0W3tmptNdvFxl7ZHPt0Z+FFqUbDSrZY/dRMmVYYcvXF45VyOkA77ybNKKz1TORbw /Vir2e3os3SVn7YQh8ypbQ29y/eY75LZwR3z30z3zLEnLyZmMq287NOwzCrqpVrs9wenpx8Q 2rRVhvfvl6Y/GmEy4ifeNUvsMHzId0ph+trolPl/829vX2x67pHpEnVOHmeODQtev7pSIHZy UYASS3FGoqEWc1FxIgCCaRZQtwMAAA== X-CMS-MailID: 20250128194836eucas1p151c4fc83a17173fd1b79bfc959976301 X-Msg-Generator: CA X-RootMTR: 20250128194836eucas1p151c4fc83a17173fd1b79bfc959976301 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194836eucas1p151c4fc83a17173fd1b79bfc959976301 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add reset controller driver for the T-HEAD TH1520 SoC that manages hardware reset lines for various subsystems. The driver currently implements support for GPU reset control, with infrastructure in place to extend support for NPU and Watchdog Timer resets in future updates. Signed-off-by: Michal Wilczynski --- MAINTAINERS | 1 + drivers/reset/Kconfig | 10 ++ drivers/reset/Makefile | 1 + drivers/reset/reset-th1520.c | 178 +++++++++++++++++++++++++++++++++++ 4 files changed, 190 insertions(+) create mode 100644 drivers/reset/reset-th1520.c diff --git a/MAINTAINERS b/MAINTAINERS index b4e21d814481..d71b8c68ae48 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20352,6 +20352,7 @@ F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c F: drivers/pmdomain/thead/ +F: drivers/reset/reset-th1520.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h F: include/dt-bindings/power/thead,th1520-power.h F: include/dt-bindings/reset/thead,th1520-reset.h diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5b3abb6db248..fa0943c3d1de 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -272,6 +272,16 @@ config RESET_SUNXI help This enables the reset driver for Allwinner SoCs. +config RESET_TH1520 + tristate "T-HEAD 1520 reset controller" + depends on ARCH_THEAD || COMPILE_TEST + select REGMAP_MMIO + help + This driver provides support for the T-HEAD TH1520 SoC reset controller, + which manages hardware reset lines for SoC components such as the GPU. + Enable this option if you need to control hardware resets on TH1520-based + systems. + config RESET_TI_SCI tristate "TI System Control Interface (TI-SCI) reset driver" depends on TI_SCI_PROTOCOL || (COMPILE_TEST && TI_SCI_PROTOCOL=n) diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 677c4d1e2632..d6c2774407ae 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -35,6 +35,7 @@ obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o +obj-$(CONFIG_RESET_TH1520) += reset-th1520.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o obj-$(CONFIG_RESET_TI_TPS380X) += reset-tps380x.o diff --git a/drivers/reset/reset-th1520.c b/drivers/reset/reset-th1520.c new file mode 100644 index 000000000000..48afbc9f1cdd --- /dev/null +++ b/drivers/reset/reset-th1520.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#include +#include +#include +#include + +#include + + /* register offset in VOSYS_REGMAP */ +#define TH1520_GPU_RST_CFG 0x0 +#define TH1520_GPU_RST_CFG_MASK GENMASK(2, 0) + +/* register values */ +#define TH1520_GPU_SW_GPU_RST BIT(0) +#define TH1520_GPU_SW_CLKGEN_RST BIT(1) + +struct th1520_reset_priv { + struct reset_controller_dev rcdev; + struct regmap *map; + struct mutex gpu_seq_lock; /* protects gpu assert/deassert sequence */ +}; + +static inline struct th1520_reset_priv * +to_th1520_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct th1520_reset_priv, rcdev); +} + +static void th1520_rst_gpu_enable(struct regmap *reg, + struct mutex *gpu_seq_lock) +{ + int val; + + mutex_lock(gpu_seq_lock); + + /* if the GPU is not in a reset state it, put it into one */ + regmap_read(reg, TH1520_GPU_RST_CFG, &val); + if (val) + regmap_update_bits(reg, TH1520_GPU_RST_CFG, + TH1520_GPU_RST_CFG_MASK, 0x0); + + /* rst gpu clkgen */ + regmap_set_bits(reg, TH1520_GPU_RST_CFG, TH1520_GPU_SW_CLKGEN_RST); + + /* + * According to the hardware manual, a delay of at least 32 clock + * cycles is required between de-asserting the clkgen reset and + * de-asserting the GPU reset. Assuming a worst-case scenario with + * a very high GPU clock frequency, a delay of 1 microsecond is + * sufficient to ensure this requirement is met across all + * feasible GPU clock speeds. + */ + udelay(1); + + /* rst gpu */ + regmap_set_bits(reg, TH1520_GPU_RST_CFG, TH1520_GPU_SW_GPU_RST); + + mutex_unlock(gpu_seq_lock); +} + +static void th1520_rst_gpu_disable(struct regmap *reg, + struct mutex *gpu_seq_lock) +{ + mutex_lock(gpu_seq_lock); + + regmap_update_bits(reg, TH1520_GPU_RST_CFG, TH1520_GPU_RST_CFG_MASK, 0x0); + + mutex_unlock(gpu_seq_lock); +} + +static int th1520_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) +{ + struct th1520_reset_priv *priv = to_th1520_reset(rcdev); + + switch (id) { + case TH1520_RESET_ID_GPU: + th1520_rst_gpu_disable(priv->map, &priv->gpu_seq_lock); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int th1520_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) +{ + struct th1520_reset_priv *priv = to_th1520_reset(rcdev); + + switch (id) { + case TH1520_RESET_ID_GPU: + th1520_rst_gpu_enable(priv->map, &priv->gpu_seq_lock); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int th1520_reset_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + unsigned int index = reset_spec->args[0]; + + /* currently, only GPU reset is implemented in this driver */ + if (index == TH1520_RESET_ID_GPU) + return index; + + return -EOPNOTSUPP; +} + +static const struct reset_control_ops th1520_reset_ops = { + .assert = th1520_reset_assert, + .deassert = th1520_reset_deassert, +}; + +static const struct regmap_config th1520_reset_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .fast_io = true, +}; + +static int th1520_reset_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct th1520_reset_priv *priv; + void __iomem *base; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + + priv->map = devm_regmap_init_mmio(dev, base, + &th1520_reset_regmap_config); + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + + mutex_init(&priv->gpu_seq_lock); + + priv->rcdev.owner = THIS_MODULE; + priv->rcdev.nr_resets = 1; + priv->rcdev.ops = &th1520_reset_ops; + priv->rcdev.of_node = dev->of_node; + priv->rcdev.of_xlate = th1520_reset_xlate; + priv->rcdev.of_reset_n_cells = 1; + + return devm_reset_controller_register(dev, &priv->rcdev); +} + +static const struct of_device_id th1520_reset_match[] = { + { .compatible = "thead,th1520-reset" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, th1520_reset_match); + +static struct platform_driver th1520_reset_driver = { + .driver = { + .name = "th1520-reset", + .of_match_table = th1520_reset_match, + }, + .probe = th1520_reset_probe, +}; +module_platform_driver(th1520_reset_driver); + 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20250128194836eusmtip17d32b73588c20ebc10d406239e436948~e8wbTFR8q0756107561eusmtip1Q; Tue, 28 Jan 2025 19:48:36 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 10/18] drm/imagination: Add reset controller support for GPU initialization Date: Tue, 28 Jan 2025 20:48:08 +0100 Message-Id: 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Kc+1XOhyImNYUH/1lCk3Ds4U5AwwvV0475fbmUzpDXvyDxyuXH565e3Die5rUp8wGzJ4rldi Kc5INNRiLipOBABUgEkKuAMAAA== X-CMS-MailID: 20250128194838eucas1p1829115b2b05d209a7c277eccf56e0b90 X-Msg-Generator: CA X-RootMTR: 20250128194838eucas1p1829115b2b05d209a7c277eccf56e0b90 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194838eucas1p1829115b2b05d209a7c277eccf56e0b90 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Certain platforms, such as the T-Head TH1520 and Banana Pi BPI-F3, require a controlled GPU reset sequence during the power-up procedure to ensure proper initialization. Without this reset, the GPU may remain in an undefined state, potentially leading to stability or performance issues. This commit integrates a dedicated reset controller within the drm/imagination driver. By doing so, the driver can coordinate the necessary reset operations as part of the normal GPU bring-up process, improving reliability and ensuring that the hardware is ready for operation. Signed-off-by: Michal Wilczynski --- drivers/gpu/drm/imagination/pvr_device.c | 21 +++++++++++++++++++++ drivers/gpu/drm/imagination/pvr_device.h | 9 +++++++++ drivers/gpu/drm/imagination/pvr_power.c | 12 +++++++++++- 3 files changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imagination/pvr_device.c b/drivers/gpu/drm/imagination/pvr_device.c index 1704c0268589..ef73e95157ee 100644 --- a/drivers/gpu/drm/imagination/pvr_device.c +++ b/drivers/gpu/drm/imagination/pvr_device.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -120,6 +121,21 @@ static int pvr_device_clk_init(struct pvr_device *pvr_dev) return 0; } +static int pvr_device_reset_init(struct pvr_device *pvr_dev) +{ + struct drm_device *drm_dev = from_pvr_device(pvr_dev); + struct reset_control *reset; + + reset = devm_reset_control_get_optional_exclusive(drm_dev->dev, NULL); + if (IS_ERR(reset)) + return dev_err_probe(drm_dev->dev, PTR_ERR(reset), + "failed to get gpu reset line\n"); + + pvr_dev->reset = reset; + + return 0; +} + /** * pvr_device_process_active_queues() - Process all queue related events. * @pvr_dev: PowerVR device to check @@ -509,6 +525,11 @@ pvr_device_init(struct pvr_device *pvr_dev) if (err) return err; + /* Get the reset line for the GPU */ + err = pvr_device_reset_init(pvr_dev); + if (err) + return err; + /* Explicitly power the GPU so we can access control registers before the FW is booted. */ err = pm_runtime_resume_and_get(dev); if (err) diff --git a/drivers/gpu/drm/imagination/pvr_device.h b/drivers/gpu/drm/imagination/pvr_device.h index 6d0dfacb677b..f6576c08111c 100644 --- a/drivers/gpu/drm/imagination/pvr_device.h +++ b/drivers/gpu/drm/imagination/pvr_device.h @@ -131,6 +131,15 @@ struct pvr_device { */ struct clk *mem_clk; + /** + * @reset: Optional reset line. + * + * This may be used on some platforms to provide a reset line that needs to be de-asserted + * after power-up procedure. It would also need to be asserted after the power-down + * procedure. + */ + struct reset_control *reset; + /** @irq: IRQ number. */ int irq; diff --git a/drivers/gpu/drm/imagination/pvr_power.c b/drivers/gpu/drm/imagination/pvr_power.c index ba7816fd28ec..e39460d594bd 100644 --- a/drivers/gpu/drm/imagination/pvr_power.c +++ b/drivers/gpu/drm/imagination/pvr_power.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -252,6 +253,8 @@ pvr_power_device_suspend(struct device *dev) clk_disable_unprepare(pvr_dev->sys_clk); clk_disable_unprepare(pvr_dev->core_clk); + err = reset_control_assert(pvr_dev->reset); + err_drm_dev_exit: drm_dev_exit(idx); @@ -282,16 +285,23 @@ pvr_power_device_resume(struct device *dev) if (err) goto err_sys_clk_disable; + err = reset_control_deassert(pvr_dev->reset); + if (err) + goto err_mem_clk_disable; + if (pvr_dev->fw_dev.booted) { err = pvr_power_fw_enable(pvr_dev); if (err) - goto err_mem_clk_disable; + goto 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dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski , Krzysztof Kozlowski Subject: [PATCH v4 11/18] dt-bindings: gpu: Add 'resets' property for GPU initialization Date: Tue, 28 Jan 2025 20:48:09 +0100 Message-Id: <20250128194816.2185326-12-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0xTZxj2O+f0nNKleFpgfCiRrdEtzq0wh8kXLwxQl7Ptz0y2ubAQqHpS 2LiYVlSUgIxyL27oHFBULpFZLh0bo4wiHa4rFFQaUKxOS2FhOFpgHXIZ4JBBD9v897zP+3zv 87xvPj4uvkZu4McnHWMVSbIECSkgWroWrK+VhpbJQx6O7kDd96oxpH+ioVCD0YqhCrOVhxy3 mzE0MOsm0TejfRQaM2YSyKa9RKGsrkYSOTUOEhnH9RSaUjt46E7bRRJNF5kBaplWkUhnHqRQ 42wFhqqm9AS60toGUE7+1zzUf2M/GnR0E8h5R42jHM16tNzeSqGntu8IVP5HB4WaJ4p5yKI7 iFQdXxLhQYz7fjbFTDidBPNz3gzFGOcqCcagGaQYteEWYJrq8knGbmsnmcs9B5ihQgvGfH8l g1HpujDm86UQxv3jXZI521wHmNtZ96j3xFGC3UfYhPjjrCI4LFYQV7zUSRx9RJ3sNDqwM6CP LABefEiHQsOIHhQAAV9MawHs+VOHc8UMgKaBepIrpgFcepC/IuN7nvQVfMDxVwG8mFu1JpoA MM95FludS9Lb4fDVCt5qw5fOJmB2Z6bHBKcrMFi/WIavqnzoKHitxu7BBL0F6rUmTyohHQ5H KnWASxgEO37q9Wi8VvimJS3BaUSwp+w3D8ZXNFn6ck9wSOsF0Fxox7is++Di+U3cHB/osjRT HA6Ey4YKjMPJcFj/GOdwGjSoLWt4F7RbF8nVMTi9FTa2BXN0BOwfzV67hDe8PyniEnjDcy0l OEcLYV6OmFO/BC+oi/4ztWpb1kwZODTWQH0BXtQ8s4vmmV00//tWArwO+LMpykQ5q3wjiT0h VcoSlSlJcunh5MQmsPK/bz61zLYCrWtKagIYH5gA5OMSX2G0tVQuFh6RpZ5iFckxipQEVmkC G/mExF9Y3ZEtF9Ny2TH2U5Y9yir+7WJ8rw1nsIBNsRHrxWMyP/rWy8RQgkp74HldmDsgsE50 ujqEl5778K1CcwH50bodo03+te+LBPud0T9Qj3dORlbFRMYeGn91o6Q41ytN/EJPXBV9OrDc IsL/Mrw9d644NKLXW+eX9tl89+WT3wZk3Ex9c3MqGogGg+lffej3cX9a+bgoLnLEPfG79uCp +rDaw9KgqBnXo+C7xSf2RGzuZbc7DnXYoizpPqpCw7x958KTDNveOfEFl35W+IvLETopC+bt Dnx3GY98znw95u+S+K7xtgZsVyponN+j3hYd/mAh2S5ZXicqpXxtZb/ue+fGcEMmuc1yqbay 6JP2kr3Xa5T849KtNcGuLRJCGSd7/RVcoZT9A7mJXt1OBAAA X-Brightmail-Tracker: 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To support this, add a 'resets' property to the GPU device tree bindings. This ensures the GPU can be properly initialized on these platforms. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Michal Wilczynski --- Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 256e252f8087..bb607d4b1e07 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -37,6 +37,9 @@ properties: power-domains: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg From patchwork Tue Jan 28 19:48:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860757 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50FB81F76DA for ; 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Tue, 28 Jan 2025 19:48:39 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 12/18] dt-bindings: gpu: Add support for T-HEAD TH1520 GPU Date: Tue, 28 Jan 2025 20:48:10 +0100 Message-Id: <20250128194816.2185326-13-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sf1CTdRy+7/u+vO9YjV4GJ9+wrOiSgysg1PPbWVM6617zzLrKLo2Lnbw3 yMFgAwnLS9tGohMMNGGMjYyTuZozYotxDE4E5g8cPzR+lCMkiYHYjp+CBDT2Yvnf83ye5/M8 38/dl4cLrWQ4LzU9i5Wni6URJJ+wtc61v6RdXyqJ83yPocs9ZzBknddS6EeHC0OGZlcA6u+q wdDNaS+Jzg91UMjjOEygbmM5hZStFhKNaPtJNK7pD0A36nQkmjzeDJBtUkUic7ObQpZpA4a+ G7cSqLK2DqC8/LMBqPPqG8jdf5lAIzc0OMrTPoGW6msptNj9E4HK/m6kUM3YNwHIaf4QqRpP ElvWMN5eNcWMjYwQzKUjUxTjmKkgGLvWTTEaextgqk35JHOru55k9FfeZf445sSYnyu/ZFTm VowpXIhjvA2/kkxBjQkwXcoe6h3hbv6ryaw0dT8rjxUl8VPydbKMypDPfimKOgR0QUdBIA/S 62F9kRI/Cvg8IW0EsK3jGsaRKQAHO28SHJkEsGDMRTxcOXW1neSEKgBd160BHBkDsK9wGF92 kXQ8HKgy+IVQWk1AdcthsExwehhA2x0duewKoXfCKb2DWsYE/QKcKb/g7xDQW6DRU0xxfc/A xovX/amBvnn1gnHFEwyvlN7xY9znUVrL/GdA2syHxQ+MvmWej2yFHZZ9XE4IHHXWrGQ+BZfs BozDMjhgncA5/AW0a5wreBO85XpALsfgdBS01MVy4wR48VgfwaUHwd57wdwLgmCR7TTOjQXw SJ6Qc6+FpzTH/yt1GW0rpQzsuz9HnADPaR+5RfvILdr/eysAbgJhbLYiTcIq4tPZnBiFOE2R nS6J2StLqwa+n31t0TlVC6pGx2OaAMYDTQDy8IhQQaKrRCIUJItzD7By2SfybCmraAKreURE mOBMo1oipCXiLHYfy2aw8ocqxgsMP4R9fPotZ/LGnlfYnTmFia97og+W8vNyxEkJzW9nLdxP Ek58TrUHK5fiz7aofjhguhDZ6zCtXhs/qJeKpiMn5tybvx4UdIp26GfVCfzfZW5Frid4+PYu yrAxbevsn5tEe+9lvLctVbNrsKNB9Fvzs9/Gecx2CeqMKikKmX1NoXfmDO2hVmVLu4rnw9YV EPslkYHm7aJh77nzmdufzggaBfyh8KnFNysea4qiY/vOvfjRuuilwsT6tMEK9eb3Z/7KlOw+ 2Mb2ZkqsGzDLPx+0PP/kfKRZ/ZW05NK2enW5TnY3ZUNuS9kOE1tu7F91smfgU5f37rTy8VBV 6qyhDKwplO5pUN2OIBQp4pejcblC/C/4WXvaSAQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMKsWRmVeSWpSXmKPExsVy+t/xu7ozTGamG2zdbm1x4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvo3NOfsES4YrtkzQbGOfwdTFyckgImEhMPXWerYuRi0NIYCmjxP9p35gh EjIS17pfskDYwhJ/rnVBFb1ilPjx+AhYgk3ASOLB8vmsILaIwGIWib37KkGKmAXeMkpcn7kR qIiDQ1jAV+LaHzGQGhYBVYlvczeA9fIKOEiseDGZHWKBvMT+g2fBFnMCxTf9XQFWIyRgL/Ho 7Qw2iHpBiZMzn4DFmYHqm7fOZp7AKDALSWoWktQCRqZVjCKppcW56bnFRnrFibnFpXnpesn5 uZsYgall27GfW3Ywrnz1Ue8QIxMH4yFGCQ5mJRHe2HMz0oV4UxIrq1KL8uOLSnNSiw8xmgLd PZFZSjQ5H5jc8kriDc0MTA1NzCwNTC3NjJXEedmunE8TEkhPLEnNTk0tSC2C6WPi4JRqYJLS XCL8oe9BY2S8aOCdDBnuyQK3GBQuV9+z/2m1+eyG3bd2+q84NCvwi+7FO9b6t7sTXjNOd9E0 cOeaMeUR71sVu2D37w3THvXM9vqfyrYv4aXzk96yfL9PHBuqSoNW7zFcxpD0Vjhv56mz/LbR YRxW9nfNv/YfOaUp1rT98tMgnp9MElL/9y2M9nqck6XXP7d1bsz+7ytX+7w4vZVhJf/FSx/S ZLRv2Knse/u872dAgXnG89Ur+CYx7lldtlSbLZbZR91p/eIFrhwc/xcpPLii37Fo/wK2uVsv SKxWEN2X1BB74q3x7dDtKSsmNM2IbP3/zCmA7e3l0OxJt6T6Z771tDvbNUWvbNOSXSvCav8r sRRnJBpqMRcVJwIABgSGkLYDAAA= X-CMS-MailID: 20250128194841eucas1p29048dc05a26475d8323a7a318a8c7a25 X-Msg-Generator: CA X-RootMTR: 20250128194841eucas1p29048dc05a26475d8323a7a318a8c7a25 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194841eucas1p29048dc05a26475d8323a7a318a8c7a25 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add bindings for the PowerVR BXM-4-64 GPU integrated in the T-HEAD TH1520 SoC. This GPU requires two clocks. Document the integration details including clock, reset, power domain and interrupt assignments. Add a dt-bindings example showing the proper usage of the compatible string "thead,th1520-gpu" along with "img,img-bxm". Signed-off-by: Michal Wilczynski --- .../bindings/gpu/img,powervr-rogue.yaml | 39 +++++++++++++++++-- 1 file changed, 35 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index bb607d4b1e07..b0d9635704d8 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -12,10 +12,15 @@ maintainers: properties: compatible: - items: - - enum: - - ti,am62-gpu - - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable + oneOf: + - items: + - enum: + - ti,am62-gpu + - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable + - items: + - enum: + - thead,th1520-gpu + - const: img,img-bxm reg: maxItems: 1 @@ -60,6 +65,17 @@ allOf: clocks: maxItems: 1 + - if: + properties: + compatible: + contains: + const: thead,th1520-gpu + then: + properties: + clocks: + minItems: 2 + maxItems: 2 + examples: - | #include @@ -74,3 +90,18 @@ examples: interrupts = ; power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; }; + + #include + #include + #include + + gpu: gpu@fff0000 { + compatible = "thead,th1520-gpu", "img,img-bxm"; + reg = <0xfff0000 0x1000>; + interrupt-parent = <&plic>; + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_GPU_CORE>, <&clk CLK_GPU_CFG_ACLK>; + clock-names = "core", "mem"; + power-domains = <&pd TH1520_GPU_PD>; + resets = <&rst TH1520_RESET_ID_GPU>; + }; From patchwork Tue Jan 28 19:48:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860540 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B37EA1F790F for ; Tue, 28 Jan 2025 19:48:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.118.77.11 ARC-Seal: i=1; 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Tue, 28 Jan 2025 19:48:40 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 13/18] drm/imagination: Add support for IMG BXM-4-64 GPU Date: Tue, 28 Jan 2025 20:48:11 +0100 Message-Id: <20250128194816.2185326-14-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01SbUxTZxjNe+/tvZduwKU6fe2cmyS6sURgRLd3EZmLLLtuCRkmi9mHw0Zu KgKFtJbBZhxYPh0IOAEpzFZG+JpIRinSAhKw0KKjyIdFHJT+QATluziHAq5wcfPfOec5z3ue k7w0LrpGiukI2UlOLpNEeZNCor5jsXtX0e5Cqf9othBZBkowpH+mptCVZiuGNCarANl76zDU /3iGRFfv36bQeHMSgWwVv1JI1VFDogm1nURzmXYB6jMWk8iZZQKo3plMomrTMIVqHmswdHlO T6DSBiNAqRllAtRz8xM0bLcQaKIvE0epak/0vKmBQiu2PwhUNN1CobrJXAEyVx9GyS0XiP3b 2Jm7KRQ7OTFBsDfSFyi2+W8twRrUwxSbafgTsLVVGSQ7ZGsi2UudoezIz2aM1ZX+xCZXd2Bs 9rI/O3P9Dsmeq6sCbK9qgPpC9LUwMJyLiojj5H5BR4XHzeWjWOzvdHzXvRE8Eaios8CNhsxu mPpgBjsLhLSIqQBQe/U2zpMFAPNL6gQ8cQLYmD+IvVhpTOwi+UE5gEt5xRRPJgF0pLULVl0k EwAd5Zq19Y1MCgFT2pPAKsGZBwDWjxaTq64NzOfwYsnw2rsEswPqDJ1gFbsz+2HSVAPg896E La1d+Cp2c+m1yxUE7/GCnYWjaxh3eVT6orXLIVMthN1ncnB+ORheGdSuP7QBPjTXrffeCp8b NOuFYqBDP7/uPwUNmeZ1vBcOWZ+6DqVdAT6wxujHyx/D7HvTazJkPODdKS/+BA94vr4A52V3 mJ4q4t07YV5m1n+h1op6jLewcMUalgO2q1/qon6pi/r/WC3Aq8BmTqmIlnKKABn3va9CEq1Q yqS+x2Kia4Hrb99aMS80gPKHc75tAKNBG4A07r3R/Yj1olTkHi5J+IGTx4TJlVGcog28ThPe m91LWlKkIkYqOclFclwsJ38xxWg3cSIW6KkMUafZOstOn8pT+izGdZosOVUZh57J9BXJsXsc lUt954e2hs23Li1kV3ZHPHoLqEIY+5448dGgE41f3RzfV1ii80pX4rYxk9Y63P/RLBk/9iRx cuqybbZN0Z9lvD+fNRpckN+D274U5pI94p0dW8p2/fVj7Imc7krNb9fpiWUf/RFL0LXFaeO4 JOKMSh95Z+9i6NPZ+e881Wl+6f8U6HKNvQ5l/EAzcfDC22LLubJfnI++CXQOdo9YSi1WwYGx 9OBPsxI02zwS37glLd1y8NumA9rtre+/pju279KHsqjPQp6Yb5yeDqWdPZsCXkmdivdqj9QL ajYdTnrVH36QEP6ON6E4LnnvXVyukPwLKTdAAUoEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGKsWRmVeSWpSXmKPExsVy+t/xu7qzTGamGzz5LGxx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEv4/jyJ0wFqzkqzt66z9zA2MzexcjJISFgIrG74SxbFyMXh5DAUkaJxj/P 2SASMhLXul+yQNjCEn+udUEVvWKUaLu3jxEkwSZgJPFg+XxWEFtEYDGLxN59lSBFzAJvGSWu z9wI1i0s4C0xY9FdJhCbRUBVYvPOk2DNvAIOEo1vdzBCbJCX2H/wLDOIzQkU3/R3BVivkIC9 xKO3M9gg6gUlTs58AhZnBqpv3jqbeQKjwCwkqVlIUgsYmVYxiqSWFuem5xYb6hUn5haX5qXr JefnbmIEJphtx35u3sE479VHvUOMTByMhxglOJiVRHhjz81IF+JNSaysSi3Kjy8qzUktPsRo CnT3RGYp0eR8YIrLK4k3NDMwNTQxszQwtTQzVhLndbt8Pk1IID2xJDU7NbUgtQimj4mDU6qB aemz94aa91/Ldu+3XCZdU/lNvT5pcuqViKS9uvUM/Y0X3v1S3vJExuD4p+3ftiTemTsh6xpj Y/Jsbr6/O3ZnzpT13LPnw1T/1P+v1VzE7StO3uh2iK7kKTq9kq9HUf2ttNmx/2+OzxXy/19r sXXvl6ywTTwZFwvdGSI90l+KXJtdtVBn5r4Phq+bnTVXTBaub05/tONov9nZT15HHWobuHeZ OXvPvh1xTLB5w33dtbdiG08E/zhwoSckvm5Zku1R98VfQlck64TY3Laa/7PDNlA7vzrn2dOc 1HUT5ppsfGcmMtPe4r/k5HTuwER+/075u+3Bq2d9tOFT2J++wnR7k3NDstbpSmYp7+c+/14t UGIpzkg01GIuKk4EAGMYpVy5AwAA X-CMS-MailID: 20250128194842eucas1p2aa8df6d985786c17432feca390861918 X-Msg-Generator: CA X-RootMTR: 20250128194842eucas1p2aa8df6d985786c17432feca390861918 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194842eucas1p2aa8df6d985786c17432feca390861918 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The IMG BXM-4-64 GPU is integrated into the T-Head TH1520 SoC. This commit adds the compatible string "img,img-bxm" to the device tree match table in the drm/imagination driver, enabling support for this GPU. By including this GPU in the compatible devices list, the driver can initialize and manage the BXM-4-64 GPU on the TH1520 SoC, providing graphics acceleration capabilities upstream. Signed-off-by: Michal Wilczynski --- drivers/gpu/drm/imagination/pvr_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/imagination/pvr_drv.c b/drivers/gpu/drm/imagination/pvr_drv.c index 0639502137b4..cbd7f5d37cc4 100644 --- a/drivers/gpu/drm/imagination/pvr_drv.c +++ b/drivers/gpu/drm/imagination/pvr_drv.c @@ -1474,6 +1474,7 @@ static void pvr_remove(struct platform_device *plat_dev) static const struct of_device_id dt_match[] = { { .compatible = "img,img-axe", .data = NULL }, + { .compatible = "img,img-bxm", .data = NULL }, {} }; MODULE_DEVICE_TABLE(of, dt_match); From patchwork Tue Jan 28 19:48:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860756 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99D091F8678 for ; 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Tue, 28 Jan 2025 19:48:42 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 14/18] drm/imagination: Enable PowerVR driver for RISC-V Date: Tue, 28 Jan 2025 20:48:12 +0100 Message-Id: <20250128194816.2185326-15-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01SfUxTVxzNfe/1vVcG+ChsXFGc1I/BEipMt12jYzI28zLjnJnOxGRzDbwU IgVsZXMNOBgf0lLmYDho+ZQQQTZkMFpoERmfheE6BaQkSpEF0WodKV8JM8AorZv/nXN+53fP +SWXxgUtZAAdl3CWkyWI44WkB6HvW/oztHSPRhLWYBCgfksVhnTPtBT6ud2MoYoeMw9Zh5ox NLIwQ6JrD25R6FF7OoFGa8solNHXQCKb1koih9rKQ8PGUhLN5fUApJ/LJFF9zziFGhYqMHTZ oSNQdasRoGzlFR66/fsHaNzaTyDbsBpH2doNaPV6K4VWRhsJVPJ3B4Wa7fk8ZKo/gTI7CokD W9iZsSyKtdtsBNudM0+x7YuVBGvQjlOs2nATsE11SpK9N3qdZMsHjrITuSaM/bX6Gzazvg9j Ly6HsTM37pDsd811gB3KsFAfC0567I/h4uO+5GS7Ir7wiP3NOIslGelz+VPLeBq4QKkAn4bM HqidHCJVwIMWMLUAanKXCBeZB9AxMoW7yByABaq7xPOVhZlr7kENgJnacspF7ABabCbc6SKZ N+D9mgqec+DHZBEwqzcdOAnOPARQP1W6FknTvswheOWG1LlAMDvghO4v0om9mAPwqqrI3fBV 2NH5x/qj/DW9abmWcHl84IBmah3ja54MXcl6JcjUe8BFhw13Lb8P+61t7t6+8LGp2f3oZrhq qMBcOBHe1826/SnQoDa58T54z/zPek+cCYENxl0uORJOjHXjThky3nDsqY+rgjcs0Be5ZS+Y ky1wuXfCS+q8/0LNtXp3KAs1hSvY9yBI+8Ix2heO0f6fWwnwOuDPJculEk4ensB9JZKLpfLk BIkoOlHaBNb+9uCKabYVlD12iLoARoMuAGlc6Of1mblYIvCKEX+t4GSJp2TJ8Zy8C2yiCaG/ V1VHlkTASMRnudMcl8TJnk8xmh+QhinUQUFhB4+knJj0DGjfmzztH2w7+jQsWocde/d2YNQr b3+bXvvSQH/hmbdypi19P9069WxQMegXIorYfOSJuYbMNcbUnDwuagstCwn2+fFCZPUdluys jJ19uDV6APs8pSg2amTHSvnenuKD5zJM8pcfnbfHtRm3vendmtX7abOs7p2UyFRPXwM/MDFK 2tR32bLFvqjcBBuDu/idBYG7FcoIZcv2alPe9h+Ku0vSAjYe/yX1iXV+lVdGDkf6dKqKy+4m Ne5X7+zXLelunhZdRccW9MaPej2n415LD226lHpo8sOiB4EKtLEgOm1DCz/ncHhyS/6+9z4R 7q7SnD9TIwzPpQO2Cgl5rDj8dVwmF/8LQzAUxkoEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7qzTWamG0xt1bQ4cX0Rk8XW37PY LdbsPcdkMf/IOVaLe5e2MFlc+fqezWLd0wvsFi/2NrJYXFsxl92i+dh6NouXs+6xWXzsucdq cXnXHDaLz71HGC22fW5hs1h75C67xfqv85ksFn7cymKxZMcuRou2zmWsFhdPuVrcvXeCxeLl 5R5mi7ZZ/Bb/9+xgt/h3bSOLxex3+9kttryZyGpxfG24Rcv+KSwOch7vb7Sye7x5+ZLF43DH F3aPvd8WsHjsnHWX3aNn5xlGj02rOtk87lzbw+Yx72Sgx/3u40wem5fUe7SsPcbk0f/XwOP9 vqtsHn1bVjF6XGq+zh4gFKVnU5RfWpKqkJFfXGKrFG1oYaRnaGmhZ2RiqWdobB5rZWSqpG9n k5Kak1mWWqRvl6CXcWDXJ6aCXRwVE5/8ZW5gbGfvYuTkkBAwkfj6fh1zFyMXh5DAUkaJjafW sEIkZCSudb9kgbCFJf5c62KDKHrFKPHoZyszSIJNwEjiwfL5YA0iAotZJPbuqwQpYhZ4yyhx feZGoG4ODmEBb4ll+3JBalgEVCXub33EBmLzCjhIrOyaDnWFvMT+g2fBZnICxTf9XQG2WEjA XuLR2xlQ9YISJ2c+AYszA9U3b53NPIFRYBaS1CwkqQWMTKsYRVJLi3PTc4uN9IoTc4tL89L1 kvNzNzEC08u2Yz+37GBc+eqj3iFGJg7GQ4wSHMxKIryx52akC/GmJFZWpRblxxeV5qQWH2I0 Bbp7IrOUaHI+MMHllcQbmhmYGpqYWRqYWpoZK4nzsl05nyYkkJ5YkpqdmlqQWgTTx8TBKdXA ZCV1punatg0ydvccXbZILt4oVDhTbcrPddVFbaVHHXad+Tm35NXrDMP+K3fzV/v7eXbLbtyr VLeJPWF/t6+/sqfW3tLgsDahZ+E5Uc+Nr93a9uX3jA/reT8JFdiKpRhw9AVlu8hkKk1W2Xzi /69pq/hNHjYtf7DLvtNwiqOehm8DX8DpuR+YNE3OsTXs/6e6SzjhlHZB5W+Prdv/5rLUdDit Lq51EvF/WX/+5aLzK5n2hfzufBD7TTNKiLnzqiPbsWXMSX4eQkHJgcLTgzbPXr/P1Wv1Srkt 2hmFWmyzD0ZoX1sh8caNM3pJzooIDoEdaasWaM5/9+iZaeq3P9JvjQucPu6aOrPRP8pEJcla iaU4I9FQi7moOBEAyO0/yLgDAAA= X-CMS-MailID: 20250128194843eucas1p28e5e735e526a153138c3539a9ceeec07 X-Msg-Generator: CA X-RootMTR: 20250128194843eucas1p28e5e735e526a153138c3539a9ceeec07 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194843eucas1p28e5e735e526a153138c3539a9ceeec07 References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Several RISC-V boards feature Imagination GPUs that are compatible with the PowerVR driver. An example is the IMG BXM-4-64 GPU on the Lichee Pi 4A board. This commit adjusts the driver's Kconfig dependencies to allow the PowerVR driver to be compiled on the RISC-V architecture. By enabling compilation on RISC-V, we expand support for these GPUs, providing graphics acceleration capabilities and enhancing hardware compatibility on RISC-V platforms. Signed-off-by: Michal Wilczynski --- drivers/gpu/drm/imagination/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/imagination/Kconfig b/drivers/gpu/drm/imagination/Kconfig index 3bfa2ac212dc..5f218896114c 100644 --- a/drivers/gpu/drm/imagination/Kconfig +++ b/drivers/gpu/drm/imagination/Kconfig @@ -3,7 +3,7 @@ config DRM_POWERVR tristate "Imagination Technologies PowerVR (Series 6 and later) & IMG Graphics" - depends on ARM64 + depends on (ARM64 || RISCV) depends on DRM depends on PM select DRM_EXEC From patchwork Tue Jan 28 19:48:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860539 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 466961F78FC for ; Tue, 28 Jan 2025 19:48:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 28 Jan 2025 19:48:43 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 15/18] riscv: dts: thead: Add device tree VO clock controller Date: Tue, 28 Jan 2025 20:48:13 +0100 Message-Id: <20250128194816.2185326-16-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUxTVxjGc+69vfdSVrgUP05008g2WZcNlDByNqYB93XjmJskug/mRrfe FCJQ08IEdQjSNiJl6JxsLTCQ6Sg4QBEaIEJDLS2Uz6FUDFCVMCcMhA5wUxRGaXX+93ve87x5 njc5NC40kGvo+KRkTp4kTggg+YTBcr/n1aJQrXTTeOdrqO1aKYbq5nUU+q2pG0PF5m4ecvTV Yujq3BSJqv7opdCdpkwC2fVFFMqyVJNoTOcgkVPj4KErjYUkmsk1A2SYUZKo0jxMoeq5Ygyd dtYR6Ex9I0Dq7F956HfbO2jY0UagsSsaHKl1vmjxUj2FFuwXCFRw10ih2okTPGSt/BgpjT8Q EevYqQEVxU6MjRHs5aOzFNt0r4RgG3TDFKtp6ARsTUU2yQ7ZL5Hsz+072Rs5Voy9eOYwq6y0 YGzeo03sVHM/yX5XWwHYvqxr1EfCz/hvSriE+G84efDWWH7cdI4W32ejUquPXCQzQCF5DHjR kAmFV9V2/Bjg00JGD+DYfL5HzAJozP8Fc7mEzAyAD7XrH28MKo08t6kMwHyNgXKLCQDN1zWE y0UyIfBmWfGyawWjIqCqNRO4BM78CaBh1J3uz0RDdd8Qz8UE8yK81Vy4tE3TAiYC/tMU7I5b D40tXbiLvZbGNY/0ywECxg+2a0eXGV/yZNUVLPeGTDkfTnc94LmX34YDzlOUm/3huLXWw8/C xYZizM0yeLPub9zNh2CDxurhcDjU/YB09cEZEaxu9PSJhJbxh7hrDBkfODDp567gA783/OgZ C+BRtdDt3ghPaXKfhHbrDZ5QFvbMZ2PHwQbdU8fonjpG939uCcArwGouRZEo5RQhSdz+IIU4 UZGSJA36WpZYA5a+dseCdbYelI07g0wAo4EJQBoPWCHY0/2TVCiQiNMOcHLZl/KUBE5hAmtp ImC1oNSokgoZqTiZ28tx+zj541eM9lqTgdWvGxGdlt0Oa0Mxhem4X2pz/gns8PFXrKVlM/bk 1lRb1WzmKC9iw8lzobaq3DuD+7eUmCJ3bIx5KdNr896qwHNh770b23vvhYQC5cE9I2/gpfBQ yydROW2RfbHRB3enOoqy83qHL7C28qz7273luySB1XGarTfiXl9p6SuMOKsSLaj47f2E3fnB 55JVLc894wjJjdYfieffDvh0pKs0RjOjJXFZQzMRpJVUpvtvWxk+nWYbBLsmd1z+d20dztP3 726d6/D99q0Pz/91fehu1fnJ5LjA/jBdOCtfFdwTJTJvzyvPOZB2a/4rekvnyZ2pHRMZyrMi X+9c0xfp73v7RJU/v0gHEIo48eaXcblC/B9aaJPfSQQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMKsWRmVeSWpSXmKPExsVy+t/xu7pzTWamG0zNszhxfRGTxdbfs9gt 1uw9x2Qx/8g5Vot7l7YwWVz5+p7NYt3TC+wWL/Y2slhcWzGX3aL52Ho2i5ez7rFZfOy5x2px edccNovPvUcYLbZ9bmGzWHvkLrvF+q/zmSwWftzKYrFkxy5Gi7bOZawWF0+5Wty9d4LF4uXl HmaLtln8Fv/37GC3+HdtI4vF7Hf72S22vJnIanF8bbhFy/4pLA5yHu9vtLJ7vHn5ksXjcMcX do+93xaweOycdZfdo2fnGUaPTas62TzuXNvD5jHvZKDH/e7jTB6bl9R7tKw9xuTR/9fA4/2+ q2wefVtWMXpcar7OHiAUpWdTlF9akqqQkV9cYqsUbWhhpGdoaaFnZGKpZ2hsHmtlZKqkb2eT kpqTWZZapG+XoJfxoXsmc8Ep9or1TZvZGhjnsHUxcnJICJhI3G7ZzwpiCwksZZQ4elsWIi4j ca37JQuELSzx51oXUD0XUM0rRomHqzqYQRJsAkYSD5bPB2sWEVjMIrF3XyVIEbPAW0aJ6zM3 gnULCwRIbF10FWwbi4CqxMN9c4DiHBy8Ag4S3/fqQyyQl9h/8CzYTE6g8Ka/K1ggDrKXePR2 Blgrr4CgxMmZT8DizED1zVtnM09gFJiFJDULSWoBI9MqRpHU0uLc9NxiI73ixNzi0rx0veT8 3E2MwNSy7djPLTsYV776qHeIkYmD8RCjBAezkghv7LkZ6UK8KYmVValF+fFFpTmpxYcYTYHO nsgsJZqcD0xueSXxhmYGpoYmZpYGppZmxkrivGxXzqcJCaQnlqRmp6YWpBbB9DFxcEo1MDFd +5qyQ0w9Nlu5w7r0uFuj+pJz97fu0tq3e797unNoR+vWV9KJCQeleA6uljrwMP7I9kmb9b/r 2vkfCmSbO4VpweYE1WNb+46EbeGsFPyVor2omXnpqd9S89h4/7Jt6dR0jhDVirvIe6Jt/epo NfX9+mm5y69PD3r3cFNA6rIO7T+8Yb9lpDeqm7wMcrlsId3TKParvWPjhU1ejr2zS7L3K227 b/M3x138wN74LUGPl0s+rOX7qxfXUPH38UOZlbz/M240132NLCw1qdhu/cVE+4rbWtnXZ1vY t07IuF7Mb1BpoNfm4XlKTt1l/2K9YBMLP7vDixV4nzAb/qko9/i86oqyyzbzW1d1LKO+KrEU ZyQaajEXFScCAA22fAm2AwAA X-CMS-MailID: 20250128194845eucas1p1c05f74ffbfc62da048615f7dd2781b4b X-Msg-Generator: CA X-RootMTR: 20250128194845eucas1p1c05f74ffbfc62da048615f7dd2781b4b X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194845eucas1p1c05f74ffbfc62da048615f7dd2781b4b References: <20250128194816.2185326-1-m.wilczynski@samsung.com> VO clocks reside in a different address space from the AP clocks on the T-HEAD SoC. Add the device tree node of a clock-controller to handle VO address space as well. Signed-off-by: Michal Wilczynski --- arch/riscv/boot/dts/thead/th1520.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 527336417765..d4cba0713cab 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -489,6 +489,13 @@ clk: clock-controller@ffef010000 { #clock-cells = <1>; }; + clk_vo: clock-controller@ffef528050 { + compatible = "thead,th1520-clk-vo"; + reg = <0xff 0xef528050 0x0 0xfb0>; + clocks = <&clk CLK_VIDEO_PLL>; + #clock-cells = <1>; + }; + dmac0: dma-controller@ffefc00000 { compatible = "snps,axi-dma-1.01a"; reg = <0xff 0xefc00000 0x0 0x1000>; From patchwork Tue Jan 28 19:48:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860755 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AB43F1E7C10 for ; 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Tue, 28 Jan 2025 19:48:44 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 16/18] riscv: dts: thead: Introduce power domain nodes with aon firmware Date: Tue, 28 Jan 2025 20:48:14 +0100 Message-Id: <20250128194816.2185326-17-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02Se0xTVxjAc+69vbcF6i4VwxlMlpFIIhugjm1nGRLc2HKzaeKyGB/MaZFr IfJKC1v3iiKUZ3VCJYOCqxpUbHgEBg2FAhGQAs6yFkddoBU2GBaKBEpFdOAol23+9/u+8/te yeHjogYygJ+UmsFKU8XJwaQXoetdHgzTRJZLdnRPeqM+61UMNT9TU6im3YQhTY+Jh+yWJgzd c8+RqG7yVwo9bM8i0HD1JQpl99aTyKG2k2heaeehodZKErnO9QCkc+WQqLbHRqF6twZDV+ab CVTV0gpQbsF1HjIPfIhs9j4COYaUOMpVv4SeG1ootDrcQKCKR50UanIW85Cx9iDK6bxIxAQx c/cVFON0OAimO3+RYtofXyYYvdpGMUr9L4Bp1BaQzOiwgWR+6v+UeVBkxJifq04zObW9GPPD yg5mruM3kjnfpAWMJdtK7Rcd8YpKYJOTvmSlEdHHvRINA7dA+m2B/Jn6HnEGuKlCIOBDOhJm r/5BFAIvvoiuBvCirZvHBYsADufreB5LRLsALDNvKQTUekXDbk65AaC1zbmhOAFUnWc9TNK7 4NgNzXofP1pBQMXtLOAJcHoKQN1EJemxNtNHYf6iGfMwQW+DpTrD+kpCOgbOPi0iufVehZ23 7uIeFqzlG1eqCc7xhf3lE+uMrznZzRU45zd4wcGRtziOhTdXBgHHm+G0sWnj5Ffgc70G4zgN jjUvbNR+B/VK4wa/B0dNT9d24K/13w7rWyM8COk90DVzhMNN8P6sL7fAJlii+xHn0kKYnyvi eoTAUuW5/2aaqnUYpzDQcn3PBfCa+oVL1C9cov5/6mWAa4E/mylLkbCynansV+EycYosM1US fiItpRGs/eo7q8aFFnBpej68C2B80AUgHw/2Ex41lUlEwgTx19+w0rRj0sxkVtYFAvlEsL/w aqdCIqIl4gz2FMums9J/XzG+IOAMdiiuXhd1J3Z8oKdB+/rBtMdxU+acgMp3HIVXnNTZQ75R fSKXr3zRZ6x44a+S8Q/ch2OQsX/sUejUn1qVI/Bh/FZxpHpflWpv4r5vW/Lk79dF+32cpbCc bCvwj/ep4X2/FGwqmoyMSM6QfV77QHygsTlKFXpyqvQA2/FZHjuz1BYmWB6qUu4+bW2L9ft9 S+AUEFRceLMEh4Y4mzhUm0AN1nzh3xpkTwrRbC0+9va44GzZ4RojPRLtfXzZEv+kZMh7dvYT TVCQdtf+iQ6gLw2vzLz2buzfWmt6qWpk4u6M5EnYtG2bvChBU2ZuVAlj3Et5e2+eKreeiBr1 GQ75qO6Nl+XBhCxRvDMUl8rE/wD7onZJRAQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrMKsWRmVeSWpSXmKPExsVy+t/xu7rzTGamG2x+KWxx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvY8+pg4wFRzkrfs+6wtLA+JW9i5GdQ0LARGKjbRcjF4eQwFJGicbb11i7 GDmBwjIS17pfskDYwhJ/rnWxgdhCAq8YJc5siAex2QSMJB4snw9WLyKwmEVi775KkEHMAm8Z Ja7P3AjWLCwQLbFi53SwZhYBVYmp2/awg9i8Ag4Sb391s0EskJfYf/AsM4jNCRTf9HcFC8Qy e4lHb2ewQdQLSpyc+QQszgxU37x1NvMERoFZSFKzkKQWMDKtYhRJLS3OTc8tNtQrTswtLs1L 10vOz93ECEwt24793LyDcd6rj3qHGJk4GA8xSnAwK4nwxp6bkS7Em5JYWZValB9fVJqTWnyI 0RTo7onMUqLJ+cDkllcSb2hmYGpoYmZpYGppZqwkzut2+XyakEB6YklqdmpqQWoRTB8TB6dU A1Ng0fol9yT/yRfvaXl+vUg7/62wwcR+iYo1V3Um/U38EBCwnE+R9fTUSTZdhX8i2jykeObd LeDcIPt6+7dXy87+8Kq/MGfBwZjw4neX21sYttT/vyY378oHr/n3Gf7osPPev/JE+KVNQqeL jKrVEgeOfWsXeiRd6z0hsbnT6Vf2zfi4Lp7sqdNO92vqbT31Z3r49BupeSJ55lnxG9X0JB58 ZE3v8C5tO5/d1TlbUO9tKOvfNWs/cweVdN5Zbbp12mUPo6w5wppmltYLxP9ENL+dPq9/wVt+ pmZ/46PLGc0X1FxPkv1/p4n507KiU4aq7srz9V6c+KNxuuV4jUbcFJdpbMxnDissrw0NWDu3 5LISS3FGoqEWc1FxIgCyIjBltgMAAA== X-CMS-MailID: 20250128194846eucas1p1bb40288d32401ecd32410f05a811cc3b X-Msg-Generator: CA X-RootMTR: 20250128194846eucas1p1bb40288d32401ecd32410f05a811cc3b X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194846eucas1p1bb40288d32401ecd32410f05a811cc3b References: <20250128194816.2185326-1-m.wilczynski@samsung.com> The DRM Imagination GPU requires a power-domain driver. In the T-HEAD TH1520 SoC implements power management capabilities through the E902 core, which can be communicated with through the mailbox, using firmware protocol. Add AON node, which servers as a power-domain controller. Signed-off-by: Michal Wilczynski --- arch/riscv/boot/dts/thead/th1520.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index d4cba0713cab..2f5389579abc 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -6,6 +6,7 @@ #include #include +#include / { compatible = "thead,th1520"; @@ -229,6 +230,13 @@ stmmac_axi_config: stmmac-axi-config { snps,blen = <0 0 64 32 0 0 0>; }; + aon: aon { + compatible = "thead,th1520-aon"; + mboxes = <&mbox_910t 1>; + mbox-names = "aon"; + #power-domain-cells = <1>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; From patchwork Tue Jan 28 19:48:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860538 Received: from mailout1.w1.samsung.com (mailout1.w1.samsung.com [210.118.77.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3ACE1F91DC for ; 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Tue, 28 Jan 2025 19:48:46 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 17/18] riscv: dts: thead: Introduce reset controller node Date: Tue, 28 Jan 2025 20:48:15 +0100 Message-Id: <20250128194816.2185326-18-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUxTVxjGPffe3ntLqF4qxiNTJyWwsCm6YfTEzQlGljvDEjaXbc4QrXpX GOUjLTi2sAxWShArDhwoLV92jXYE5GOUAgFxFUEEikMsLqHANiYDWhGhDkbE0V7m/O/3POd5 87xvcmhcbCb96NiEZE6RIJVLSC+ioWOhb1v5ziLZjppMIbo1qMeQaVFLocpWK4bK2q0CNNxf j6EB1zSJrv55h0J/tWYQyGYsoZCqo5pEE9phEs1ohgXobnMxiWbPtgPUMJtJoqp2O4WqXWUY ujRjIpChsRmgrNOXBeiX2xHIPnyLQBN3NTjK0q5Bz1oaKbRkqyWQ7mEbheodeQLUWfUxymz7 ngjbzE7fV1OsY2KCYG9kz1Fs65Nygm3S2ilW09QD2LqK0yQ7ZGsh2dKu99mRM50Y+5PhGzaz qgNjzz3dwU5fu0eyufUVgO1XDVJR4k+93jrJyWNPcYrtbx/zitHc0VNJk3TqE/MYlQ5qqBwg pCGzE9Y0TwlygBctZowA2sw9JC/mAMx13sR5MQvgOUPp8xGHq2dl5AqAJT8UrQgHgGdq7Z4U ybwBR6+UeR58GTUB1TczgFvgzDiADWPFpDu1lomElnGdwM0EEwgf140v+zQtYsLgVMVrfN3L sO3nXtzNwmW77qmRcLOI8YFdRWMexpczKpPOsytkar2gSZcu4IcPwAcTrYDntXCys37lho3w WVMZxnMiHDU9xnlOg02azhV+Ew5Z//HsgzPBsLp5O2+Hw1yDWeC2IbMa3nf68CushvkNF3De FsHsLDGfDoIFmrPPS63GhpVSFk7ZW8B3wF/7wjHaF47R/t9bDvAKsJ5LUcbLOGVoAvdFiFIa r0xJkIWcSIyvA8t/u3up09UIjJMzIRaA0cACII1LfEXR1osyseik9MuvOEXiUUWKnFNawEs0 IVkv0repZWJGJk3m4jguiVP894rRQr90LHpvpDCu49GRVWEPzjt3e0dUL+wLiQ5gN4n1Q92v bBgwR80F38jeINdVVpZuiwi/9m3mQ6Ur46MRS86pVL/9dfKv37kYOlv7m7WbsK0a8N/Y0n75 R/X8ewElB64b8vV9qVVJKm9g2dp7vbywN3/+UMCxwaDAoL60Xz/cVL1nnpI5FtT+eQX3AvJs v3+QSDrHbgvrfQs+G2VyYgxbD6b5KVN3O5Wylm6XUbJHsqvo8N7zF+IiF6b7R9ZF7Tv+d0/g FlFhzPFPDob/wR3+fNG8JkeeMhpZmF3ZqjohX0pOuuqjotIvSfeHdumKpWhoiyPWe/FQ3uCj zVnBodiRde8e3eU9k2GSEMoY6euv4gql9F/6qVNNSgQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrKKsWRmVeSWpSXmKPExsVy+t/xu7rzTWamG/zaq25x4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvo+fCIvaCVxwV37Y/YW9g3MDexcjJISFgIvHm6xnWLkYuDiGBpYwS8zdt ZINIyEhc637JAmELS/y51sUGUfSKUeLLzm5WkASbgJHEg+XzwWwRgcUsEnv3VYIUMQu8ZZS4 PnMjWLewgI/EoeezwYpYBFQlPm16DjSJg4NXwEHi9SptiAXyEvsPnmUGsTmBwpv+rgBrFRKw l3j0dgbYQbwCghInZz4BizMD1Tdvnc08gVFgFpLULCSpBYxMqxhFUkuLc9Nzi430ihNzi0vz 0vWS83M3MQLTy7ZjP7fsYFz56qPeIUYmDsZDjBIczEoivLHnZqQL8aYkVlalFuXHF5XmpBYf YjQFOnsis5Rocj4wweWVxBuaGZgamphZGphamhkrifOyXTmfJiSQnliSmp2aWpBaBNPHxMEp 1cBkcFXZ/NuKnOTie5P2yV40/dCxIWOTSkVwovaMF8Jt/rKrWJa5fji4IU1jq6vy3lO9oQsO xka7XLwrd0DimZwy25mHel9/x4ZsuTTJyvnqEb852vMYamPe2x2ssvjwn4dlSkW+i8z0DfVP sq8qr222kpI4uIyxwPLeuzVNNzcc380rc+dsuGtM8uOjx+/scls7d4bPoQL7rlcsCcZnl98O eptZMy+uWnbK3lmvjGQi0gS+WBapaWVwi5w/sXVXrPtulWe7RQ7FiUuv+fq+mzX8ZcePEnZu gWRZqdp91b9UVLqjuQsynWq+Ob5QKZ79mft7jd0+Jrs4VTu7hXWSstd2Si2YrOB16/B68a+M X+qVWIozEg21mIuKEwHo8d57uAMAAA== X-CMS-MailID: 20250128194847eucas1p29f83672bd54d3e8ba76c1d5f53f1dc4b X-Msg-Generator: CA X-RootMTR: 20250128194847eucas1p29f83672bd54d3e8ba76c1d5f53f1dc4b X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194847eucas1p29f83672bd54d3e8ba76c1d5f53f1dc4b References: <20250128194816.2185326-1-m.wilczynski@samsung.com> T-HEAD TH1520 SoC requires to put the GPU out of the reset state as part of the power-up sequence. Signed-off-by: Michal Wilczynski --- arch/riscv/boot/dts/thead/th1520.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 2f5389579abc..bdbb1b985b0b 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -7,6 +7,7 @@ #include #include #include +#include / { compatible = "thead,th1520"; @@ -497,6 +498,12 @@ clk: clock-controller@ffef010000 { #clock-cells = <1>; }; + rst: reset-controller@ffef528000 { + compatible = "thead,th1520-reset"; + reg = <0xff 0xef528000 0x0 0x4f>; + #reset-cells = <1>; + }; + clk_vo: clock-controller@ffef528050 { compatible = "thead,th1520-clk-vo"; reg = <0xff 0xef528050 0x0 0xfb0>; From patchwork Tue Jan 28 19:48:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 860754 Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 05DAB1F91DE for ; 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Tue, 28 Jan 2025 19:48:47 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, p.zabel@pengutronix.de, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [PATCH v4 18/18] riscv: dts: thead: Add GPU node to TH1520 device tree Date: Tue, 28 Jan 2025 20:48:16 +0100 Message-Id: <20250128194816.2185326-19-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128194816.2185326-1-m.wilczynski@samsung.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA02SfUxbVRjGc+69vfdSZd6WEU4AURsdkUVWCZrjZgi6Oe9kkLG4kJgIdHBX mKWQFpybRkv4EGonY6GZFBhY2fisndB2fMpkSDemdYMJiMDYHOFj3SiDkm1mVMpF3X/P+7y/ c573PTk0LraQgXS6MptTKWUKCSkkbP0PHa8YI8vlUn1ZGLo0YsSQ9W8DhZq7HRiq7nMI0OSg BUPX3Qsk+n76KoVmu3MJNFxfRaG8fjOJ5gyTJFrUTQrQUEcliZaO9wFkW8onkalvgkJmdzWG vl20Eqi2rQOgwuKzAnRt4B00MXmJQHNDOhwVGp5Bnq42Cq0O/0Cgins9FLI4SwXIbkpA+T1l RHQIuzBaQLHOuTmCvVi0TLHdKzUE226YoFhd+y+AbWksJtnx4S6SPX05nr3xlR1jW2u/YPNN /Rhb8ljKLvz4O8l+bWkE7GDeCLVP/IHwzVROkf4xp9oWlSxMa/VMYVkzwk++y0vSgDu0FtA0 ZCKh5qZEC4S0mKkHcEA3S/HFMoBV2mKSL5YAXNGXEFrgs37Cfm5ewDfqADyjsW9QTgBLmyvX KZKJgFN11evUZqaAgAU/5wJvgTMzANpuV5Jeyo+Jh+5qJ+adhGBegmNng7y2LxMNS1tLBHzc c7Dnp19xr/ZZ81se1xM8I4KXy2+va3yNybNW4DxvEkKXO5HXu2Cj8fTGPX5w3m6heB0MPe3V GK8z4ZT1/sbZz2C7zr6hd8BxxyPSOxrOvAzNHdt4+y34191WjH+7TXD0roifYBM8aTuF87Yv LCoU8/QWqNcd/y/UUW/bCGXhoCeXPAFeMDyxi+GJXQz/59YAvBEEcDnqDDmnjlByR8LVsgx1 jlIenpKZ0QLWPvaVVftyG6ibXwzvBRgNegGkcclm3w8d38jFvqmyo8c4VWaSKkfBqXtBEE1I AnyNPQVyMSOXZXMfcVwWp/q3i9E+gRosI7jkS1ckXeIISWxuiqnzO5Clp5NvBk4PWbfqnQPv N9zYZb/oeu9RXIw5Fo90hV4Y2psymrJVmy/d4fx8xWN7mDKe1FmzpDGf3zc/diRmzy37ikNU tHO8Qvrg6tMXnFX3T/52KGX/dmnT6xEW9cxhSdinz1aEbG9QnDrW9G5CnH+qCY53US216rnV O2PlQZ5DV/yvR6/8EW/O14nSog4qY3d3vtig1xgdBTMJwScOu/zzcqzDlQE1B4LLotNvZTu6 joadUSQO7S27Nli2ADtytLPGN5Zj7zG7G3ZqXnM/H1fxdub5c1GhyaLYxpHQXsVTDX8agTvQ FJSgjDrYKZ1+gPVJCHWa7NUwXKWW/QN5kRGYRwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrCKsWRmVeSWpSXmKPExsVy+t/xu7oLTWamG1yaKWFx4voiJoutv2ex W6zZe47JYv6Rc6wW9y5tYbK48vU9m8W6pxfYLV7sbWSxuLZiLrtF87H1bBYvZ91js/jYc4/V 4vKuOWwWn3uPMFps+9zCZrH2yF12i/Vf5zNZLPy4lcViyY5djBZtnctYLS6ecrW4e+8Ei8XL yz3MFm2z+C3+79nBbvHv2kYWi9nv9rNbbHkzkdXi+Npwi5b9U1gc5Dze32hl93jz8iWLx+GO L+wee78tYPHYOesuu0fPzjOMHptWdbJ53Lm2h81j3slAj/vdx5k8Ni+p92hZe4zJo/+vgcf7 fVfZPPq2rGL0uNR8nT1AKErPpii/tCRVISO/uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/O JiU1J7MstUjfLkEvY/P/B0wFz7kqFjfHNzC+5uhi5OSQEDCROL7hFWsXIxeHkMBSRon5m++y QiRkJK51v2SBsIUl/lzrYoMoesUo8fbGFnaQBJuAkcSD5fPBGkQEFrNI7N1XCVLELPCWUeL6 zI1g3cIC/hKPzyxj6mLk4GARUJW4tUwaJMwr4CAxcXM/1DJ5if0HzzKD2JxA8U1/V4C1CgnY Szx6O4MNol5Q4uTMJ2BxZqD65q2zmScwCsxCkpqFJLWAkWkVo0hqaXFuem6xoV5xYm5xaV66 XnJ+7iZGYHLZduzn5h2M81591DvEyMTBeIhRgoNZSYQ39tyMdCHelMTKqtSi/Pii0pzU4kOM pkBnT2SWEk3OB6a3vJJ4QzMDU0MTM0sDU0szYyVxXrfL59OEBNITS1KzU1MLUotg+pg4OKUa mHYc7fJ+IbxXSjL07v1FwZOer4pNyj9tF/f/+/7XvonJB79P1QsT3+Uzubon+e0cBecJ7ZM2 bL/R9EXogbblLsktazpjeiUt0zmmHJ4Ylff4ZHHdqv/O8qk3fSouB/UxeAV4cxoZL7cOZ49b zlda/+VUe9bq9osRqxQ3FO+KFE2dH6Z72qf9aIPNfvf79xYss9qkr/Nob8eS7vI3DPqa78X5 6gNmvfPcu/m7aX/w4cVxUT87BFWPaf6seVhVd3rC5Qbzv+tUdZOr+LZWzONUXy65eKny16O3 hD/UtW7yE3Y/tKPL4OTOlcbbWErVl31KLWnn3RfMfjk62qvz0qZjat5C7+alOclu+Wm+WH2C kxJLcUaioRZzUXEiAHobLJy3AwAA X-CMS-MailID: 20250128194849eucas1p1c957dedd293b3091d8dfb35bdfa1fb0c X-Msg-Generator: CA X-RootMTR: 20250128194849eucas1p1c957dedd293b3091d8dfb35bdfa1fb0c X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250128194849eucas1p1c957dedd293b3091d8dfb35bdfa1fb0c References: <20250128194816.2185326-1-m.wilczynski@samsung.com> Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD TH1520 SoC used by the Lichee Pi 4A board. This node enables support for the GPU using the drm/imagination driver. By adding this node, the kernel can recognize and initialize the GPU, providing graphics acceleration capabilities on the Lichee Pi 4A and other boards based on the TH1520 SoC. Signed-off-by: Michal Wilczynski --- arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index bdbb1b985b0b..b4b3add0d98d 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -498,6 +498,18 @@ clk: clock-controller@ffef010000 { #clock-cells = <1>; }; + gpu: gpu@ffef400000 { + compatible = "thead,th1520-gpu", "img,img-bxm"; + reg = <0xff 0xef400000 0x0 0x100000>; + interrupt-parent = <&plic>; + interrupts = <102 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk_vo CLK_GPU_CORE>, + <&clk_vo CLK_GPU_CFG_ACLK>; + clock-names = "core", "mem"; + power-domains = <&aon TH1520_GPU_PD>; + resets = <&rst TH1520_RESET_ID_GPU>; + }; + rst: reset-controller@ffef528000 { compatible = "thead,th1520-reset"; reg = <0xff 0xef528000 0x0 0x4f>;