From patchwork Sat Dec 28 23:10:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182503 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4641089ild; Sat, 28 Dec 2019 15:14:15 -0800 (PST) X-Google-Smtp-Source: APXvYqyphc2rvL1iUici/WQwUXdmGHvtJ2Gnb1z7aVBVbWyL6bjJh+E9T7Fva9X7xJSGk0XYgo2m X-Received: by 2002:a37:e317:: with SMTP id y23mr48893064qki.431.1577574855718; Sat, 28 Dec 2019 15:14:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574855; cv=none; d=google.com; s=arc-20160816; b=zqIlpNdQaf32atTPdV4cfB1y8Phix/XRSZhvxw2LUiIb4rsuVSqcJ6Wq1CbNSsry0G +165gaBPj//sUzKzHxyIGCoy60s7vgV+O+0LNMFibtWnSvLitdFcDr11we0TQILnoqCr Qfpd4DTNiRU1t3tTdkWOuruZkEB4iCWmzxBYncgrNFLxwU8478BnA6VDtdfxajTnxxw3 qChNjLbp3ccDDXCHtUlc6lYU5it/2wFZgE4xmSPboOA+9nu+IZiYfS64gmJIa2bXDubT KdN6qCKKqdjzs0vR1XQzPDvbP6hxTGNKWS8HuC3Po//ZAiX/BUmnqDypb6R3Ypv3xCrN de3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=TefutcrMB9pareM/zxzC1lVLnwDD302zB/fR5vwwqMc=; b=aD2ko0b5HZLPZ9vvxHTyXx08L1Z1wRP7XydD7vLnd4v2yKTpjn/9pywSUEUO7Ta6tp 2gnuUqo6vsSJxj5bKoqN6m1VGZrjCx/ovx6Gcb7A1g6pIrV+6AnHWy0v2fsJI6Vww9b7 lsm+aDbaMpajA1ghu22itVab8UHV7XBZnku7EEnYCErvIv4hp9o2/++1t3oPImFweo17 r7+gCKujJ6fgQPjvnzpuDOjMDeSO9TUxVZ2W3d/+IK6TtXTU1MoFPUlG4Js1eCqBF3mQ mG0eICfUMxugdURfA5/OX+BE8oAu/ga7RM3QuSjqXINkVb0Qgk3OjsepbgekSMdO3Ozb NMOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=He482V05; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/29] target/xtensa: Use probe_access for itlb_hit_test Date: Sun, 29 Dec 2019 10:10:56 +1100 Message-Id: <20191228231124.18307-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We don't actually need the result of the read, only to probe that the memory mapping exists. This is exactly what probe_access does. This is also the only user of any cpu_ld*_code_ra function. Removing this allows the interface to be removed shortly. Acked-by: Max Filippov Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/xtensa/mmu_helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.20.1 diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index f15bff306f..b01ff9399a 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -63,10 +63,11 @@ void HELPER(itlb_hit_test)(CPUXtensaState *env, uint32_t vaddr) { /* - * Attempt the memory load; we don't care about the result but + * Probe the memory; we don't care about the result but * only the side-effects (ie any MMU or other exception) */ - cpu_ldub_code_ra(env, vaddr, GETPC()); + probe_access(env, vaddr, 1, MMU_INST_FETCH, + cpu_mmu_index(env, true), GETPC()); } void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v) From patchwork Sat Dec 28 23:10:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182500 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4639317ild; Sat, 28 Dec 2019 15:11:57 -0800 (PST) X-Google-Smtp-Source: APXvYqywJqLTR9cLm4zwznGtt0yOyK7K60ceLAgS/X6KBC1Qu2SG+DOeFupH4qaWiiJq+rmNcZbk X-Received: by 2002:a05:6830:1e11:: with SMTP id s17mr62788356otr.343.1577574717363; Sat, 28 Dec 2019 15:11:57 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574717; cv=none; d=google.com; s=arc-20160816; b=bUag2lDJcn7x9yJSODvTbBnv39yCjerKJ2cPCvi561nmh4MkA3y9fCjX7pYdgdIdgN ktAm0yoj4TOO3jNasx0ltkk1lKZdQfUaQtNap1zfVPVq1pdaVMI3ifqMmDJ+NTZPlXXi evd2TRIxnwHGqQ93GxsyKIedxlhLU5OxI/szqL7gDJ+/ky0UCLsMYKMr36T2FYD/RgUF LoYRurIYAyfJP/GoZc/T2i0sX3ubMfzXJcwJgktV9ljKYkRsmhLbhLLy/bijPwHXMpd1 RVoLfnxwk4pBNBBlPVKVJZFe99g/7EE1UTughvqsys0bHmlPn0FDn/MAq7Wligqvb1P0 /sfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=iCXuMC6wO9f+VoJnhE3lUwa5BRgmWcB+z6z3m9aJPKQ=; b=kAht3V+Ac+EdUpPYZWYbKA/d5Uuiv550oVhWweI8k4KXVAkUWULGHhCv5FQCOSSjWD 19YXGfCrg0cEcWS+V3WY/Yfy3C7/BoSiQi4YsKTaTvYYK9+UO3KnzEpAoba0yzRU2Olg 1THClGqdXAD3oAMh7PfqQLxqRqbvx0OIBEkcZm+7OLT4pykwsTRJv7c3VMSCs5o4aHim iV0yYuRvsDQyfz8X6/vD5T2GU/LkFXMXbMPWNSU2izgE+jBPWKwQ9gFh+MWlOb9OF8vN e7qa9z9m4YD3BE//zkJZg87ecui2D9oMsbJC4iHhCDlUsHWnKBtxXy5JsAPQXmDuc+nw 3XJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="VccT/pFK"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:40 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/29] cputlb: Use trace_mem_get_info instead of trace_mem_build_info Date: Sun, 29 Dec 2019 10:10:57 +1100 Message-Id: <20191228231124.18307-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" In the cpu_ldst templates, we already require a MemOp, and it is cleaner and clearer to pass that instead of 3 separate arguments describing the memory operation. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/cpu_ldst_template.h | 22 +++++++++++----------- include/exec/cpu_ldst_useronly_template.h | 12 ++++++------ 2 files changed, 17 insertions(+), 17 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index 54b5e858ce..0ad5de3ef9 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -86,9 +86,9 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, RES_TYPE res; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; + MemOp op = MO_TE | SHIFT; #if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, false, mmu_idx); + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -96,9 +96,9 @@ glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(entry->ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr, - oi, retaddr); + oi, retaddr); } else { uintptr_t hostaddr = addr + entry->addend; res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr); @@ -125,9 +125,9 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, int res; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, true, MO_TE, false, mmu_idx); + MemOp op = MO_TE | MO_SIGN | SHIFT; +#ifndef SOFTMMU_CODE_ACCESS + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -135,7 +135,7 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(entry->ADDR_READ != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op & ~MO_SIGN, mmu_idx); res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX), MMUSUFFIX)(env, addr, oi, retaddr); } else { @@ -167,9 +167,9 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, CPUTLBEntry *entry; target_ulong addr; int mmu_idx = CPU_MMU_INDEX; - TCGMemOpIdx oi; + MemOp op = MO_TE | SHIFT; #if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, true, mmu_idx); + uint16_t meminfo = trace_mem_get_info(op, mmu_idx, true); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); #endif @@ -177,7 +177,7 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, entry = tlb_entry(env, mmu_idx, addr); if (unlikely(tlb_addr_write(entry) != (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - oi = make_memop_idx(SHIFT, mmu_idx); + TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi, retaddr); } else { diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h index dbdc7a845d..e5a3d1983a 100644 --- a/include/exec/cpu_ldst_useronly_template.h +++ b/include/exec/cpu_ldst_useronly_template.h @@ -70,8 +70,8 @@ glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); clear_helper_retaddr(); #else - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, false, - MMU_USER_IDX); + MemOp op = MO_TE | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); #endif @@ -102,8 +102,8 @@ glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); clear_helper_retaddr(); #else - uint16_t meminfo = trace_mem_build_info(SHIFT, true, MO_TE, false, - MMU_USER_IDX); + MemOp op = MO_TE | MO_SIGN | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); @@ -131,8 +131,8 @@ static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr, RES_TYPE v) { - uint16_t meminfo = trace_mem_build_info(SHIFT, false, MO_TE, true, - MMU_USER_IDX); + MemOp op = MO_TE | SHIFT; + uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, true); trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); glue(glue(st, SUFFIX), _p)(g2h(ptr), v); qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); From patchwork Sat Dec 28 23:10:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182507 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4643250ild; Sat, 28 Dec 2019 15:17:06 -0800 (PST) X-Google-Smtp-Source: APXvYqw2lqYOAhnrNINhdjdIIyhoq8a7vsM0iQerWiiljVwIKwbdqALQD7LwDwZbhVKdThvP240v X-Received: by 2002:ad4:59c2:: with SMTP id el2mr43643659qvb.152.1577575026739; Sat, 28 Dec 2019 15:17:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575026; cv=none; d=google.com; s=arc-20160816; b=Jwch/M2J8l+AcSU10Uk0qTfeYoF8nx2N++noB/L6bp894MGKY6IRPrKYYyHdboSMO+ x59M5h8Fn9DqP6aLSf2t+Slo63ug/nItqAiZv4FbElcQRTuE/PtqGym8Ajz9gLERQLFB ecXI/gpHvn+qJYIWYlkuDHKt4chkNf72sXh88pHkkyZZ5zJPq1XEtR28VyLmow7BzSsq oZnXKOoXSH6WSIkDP5G5MsbZFj6Wa1RRR4JR0PFhw1f+oYcIEZ1vqmwGDcaL+6Y2zo1O st+PC4hmDMk8VfZZxDV8YgJyU2AQwuHYKC4Y92hAE1JbDFd6NESnqS/iqqzqC6dmdI2t iE9Q== ARC-Message-Signature: i=1; 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:43 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/29] trace: Remove trace_mem_build_info_no_se_[bl]e Date: Sun, 29 Dec 2019 10:10:58 +1100 Message-Id: <20191228231124.18307-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::52e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It is easy for the atomic helpers to use trace_mem_build_info directly, without resorting to symbol pasting. For this usage, we cannot use trace_mem_get_info, because the MemOp does not support 16-byte accesses. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- accel/tcg/atomic_template.h | 67 +++++++++++++------------------------ trace/mem-internal.h | 17 ---------- 2 files changed, 24 insertions(+), 60 deletions(-) -- 2.20.1 diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index 837676231f..26969487d6 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -64,13 +64,10 @@ the ATOMIC_NAME macro, and redefined below. */ #if DATA_SIZE == 1 # define END -# define MEND _be /* either le or be would be fine */ #elif defined(HOST_WORDS_BIGENDIAN) # define END _be -# define MEND _be #else # define END _le -# define MEND _le #endif ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, @@ -79,8 +76,8 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); #if DATA_SIZE == 16 @@ -99,8 +96,8 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS) { ATOMIC_MMU_DECLS; DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_ld_pre(env, addr, info); val = atomic16_read(haddr); @@ -114,8 +111,8 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, { ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, true, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, true, + ATOMIC_MMU_IDX); atomic_trace_st_pre(env, addr, info); atomic16_set(haddr, val); @@ -130,8 +127,8 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); ret = atomic_xchg__nocheck(haddr, val); @@ -147,10 +144,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ DATA_TYPE ret; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, \ + ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ ret = atomic_##X(haddr, val); \ ATOMIC_MMU_CLEANUP; \ @@ -183,10 +178,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ XDATA_TYPE cmp, old, new, val = xval; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, 0, false, \ + ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ smp_mb(); \ cmp = atomic_read__nocheck(haddr); \ @@ -213,7 +206,6 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) #endif /* DATA SIZE >= 16 */ #undef END -#undef MEND #if DATA_SIZE > 1 @@ -221,10 +213,8 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) within the ATOMIC_NAME macro. */ #ifdef HOST_WORDS_BIGENDIAN # define END _le -# define MEND _le #else # define END _be -# define MEND _be #endif ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, @@ -233,9 +223,8 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; DATA_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); #if DATA_SIZE == 16 @@ -254,9 +243,8 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr EXTRA_ARGS) { ATOMIC_MMU_DECLS; DATA_TYPE val, *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_ld_pre(env, addr, info); val = atomic16_read(haddr); @@ -270,9 +258,8 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, { ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - true, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, true, + ATOMIC_MMU_IDX); val = BSWAP(val); atomic_trace_st_pre(env, addr, info); @@ -289,9 +276,8 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ATOMIC_MMU_DECLS; DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; ABI_TYPE ret; - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, - false, - ATOMIC_MMU_IDX); + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, false, + ATOMIC_MMU_IDX); atomic_trace_rmw_pre(env, addr, info); ret = atomic_xchg__nocheck(haddr, BSWAP(val)); @@ -307,10 +293,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ DATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ DATA_TYPE ret; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, \ + false, ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ ret = atomic_##X(haddr, BSWAP(val)); \ ATOMIC_MMU_CLEANUP; \ @@ -341,10 +325,8 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \ ATOMIC_MMU_DECLS; \ XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \ XDATA_TYPE ldo, ldn, old, new, val = xval; \ - uint16_t info = glue(trace_mem_build_info_no_se, MEND)(SHIFT, \ - false, \ - ATOMIC_MMU_IDX); \ - \ + uint16_t info = trace_mem_build_info(SHIFT, false, MO_BSWAP, \ + false, ATOMIC_MMU_IDX); \ atomic_trace_rmw_pre(env, addr, info); \ smp_mb(); \ ldn = atomic_read__nocheck(haddr); \ @@ -378,7 +360,6 @@ GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new) #endif /* DATA_SIZE >= 16 */ #undef END -#undef MEND #endif /* DATA_SIZE > 1 */ #undef BSWAP diff --git a/trace/mem-internal.h b/trace/mem-internal.h index 0a32aa22ca..8b72b678fa 100644 --- a/trace/mem-internal.h +++ b/trace/mem-internal.h @@ -47,21 +47,4 @@ static inline uint16_t trace_mem_get_info(MemOp op, mmu_idx); } -/* Used by the atomic helpers */ -static inline -uint16_t trace_mem_build_info_no_se_be(int size_shift, bool store, - TCGMemOpIdx oi) -{ - return trace_mem_build_info(size_shift, false, MO_BE, store, - get_mmuidx(oi)); -} - -static inline -uint16_t trace_mem_build_info_no_se_le(int size_shift, bool store, - TCGMemOpIdx oi) -{ - return trace_mem_build_info(size_shift, false, MO_LE, store, - get_mmuidx(oi)); -} - #endif /* TRACE__MEM_INTERNAL_H */ From patchwork Sat Dec 28 23:10:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182506 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4643075ild; Sat, 28 Dec 2019 15:16:53 -0800 (PST) X-Google-Smtp-Source: APXvYqxZ/01fRBFIHiwxkQEXMKkUn91jtBIApEJp7dv7ZvmkDaiuzQCdg42iTwco+kMBTPfHYL4J X-Received: by 2002:aed:2921:: with SMTP id s30mr43934929qtd.49.1577575013197; Sat, 28 Dec 2019 15:16:53 -0800 (PST) ARC-Seal: i=1; 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:46 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/29] target/s390x: Include tcg.h in mem_helper.c Date: Sun, 29 Dec 2019 10:10:59 +1100 Message-Id: <20191228231124.18307-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Reviewed-by: David Hildenbrand Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/s390x/mem_helper.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 2921419c27..20a84b3912 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -27,6 +27,7 @@ #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" +#include "tcg.h" #if !defined(CONFIG_USER_ONLY) #include "hw/s390x/storage-keys.h" From patchwork Sat Dec 28 23:11:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182501 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4639473ild; Sat, 28 Dec 2019 15:12:12 -0800 (PST) X-Google-Smtp-Source: APXvYqzWcQn4qTDUWovf9E7Jm+3WFm0ltLqgRAbaAuJyiJTepoQ4HlUyRFeFMUAyJMWqBP+1YmyF X-Received: by 2002:a05:6830:1e16:: with SMTP id s22mr53677645otr.340.1577574732061; Sat, 28 Dec 2019 15:12:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574732; cv=none; d=google.com; s=arc-20160816; b=A3NI0bVzC+0IzYwss/Xv1r4Yh7J5yDg0H7/WC3WgNMWrj9kcRUcsIktqXJpgv8vF6J wCQxbpqJXO9X1EMHUFPOgTGezFVFTvyWZSvqAXEmyIxoCZ+jQCDGdKgWGp90j2ZdRRAN 9hSbgR9gDovgNVcgUT3zQAMchwqYoXGhlAlK+A4yKaR7ArFS9T9pe7XRHKfNvQL9muJS CJ7Qs/dIedn5r7DG/w9HvX5CgW/+LXqgRLOH1s+ngw2l/f1120JRzzk2NxHPFNAxg6IC 1a2f3AYuf83l1P6PjGQQjL04WpVDENOOXxn32QrgPZANBnxdt7+FhxAorBmajfHlvtpd 1iDQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=IAnQiL0iMLFMCcApEq0tSytTxXGtPzjLxfXmOHANo3I=; b=MVhrTvTf5xVSRCVVFaorQyfQDkFgEoQRlE15YxJj6SA3xB4fkwTlxIQQVCnFiZ91ul kqK6B6Ka4XSlg+rV/sFjYnJdNyIUaPIyic4yFtbHQOJat6h3yU8lgSVLijluYcpOZwF3 hRTJv+/tks/vI0P4w34nh2ouBZvIP+OKRDO8rEOmH62LkmNWqxtLhEemLtSFb/cUxcl6 OP/kIkxB3JRYUE4NI8lRRc2ixCzs+KJzlnX9+uGmKcNaVMgcgg6//g2Hfkmn1wCFgotS Tk3WiOXntVERgqmUZrFqsdJFQO7DvGszeKxJ3UnXUaxQiSV6aCkEKBvTvuHKVq70UH81 S9EA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m4DZn6pq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/29] target/arm: Include tcg.h in sve_helper.c Date: Sun, 29 Dec 2019 10:11:00 +1100 Message-Id: <20191228231124.18307-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Cc: Peter Maydell Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/sve_helper.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c index fc0c1755d2..83cc7f5bb5 100644 --- a/target/arm/sve_helper.c +++ b/target/arm/sve_helper.c @@ -25,6 +25,7 @@ #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" #include "fpu/softfloat.h" +#include "tcg.h" /* Note that vector data is stored in host-endian 64-bit chunks, From patchwork Sat Dec 28 23:11:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182504 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4641496ild; Sat, 28 Dec 2019 15:14:47 -0800 (PST) X-Google-Smtp-Source: APXvYqyhUgmw0zXWQrW9r69AaH761YRUtuyMLEOA7Nf0bAF9KIA+jptf5T3BHWleD797bvj2LgJi X-Received: by 2002:a9d:6a5a:: with SMTP id h26mr66996034otn.103.1577574887535; Sat, 28 Dec 2019 15:14:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574887; cv=none; d=google.com; s=arc-20160816; b=Rlq5zWkHlxLNmeZoJ85C9EEjk/xosmb9G0xNDA4KnjhTwV6ehBWJkyp09GZMcTBqxp OPM8TB4fLT0Q2qqcYo91k+8oRRtUVrNMr3IHX650xUl8w/hD4Dy9MVfU5oTVVrNgP324 YCtqFIFAKGIla9iknr2rwb4NxgpYMrS/hnYwuy70WjjqH7lo2JK7GfnjMNcZKRu7gzgf weJj5vJJgnRUlyxWo8FgXUgxAnTvAhm4fGVGoJikDRSh2W3+0NtVugxq2mMYmzzsfKig 2zR8f2/h6PZUGJ93gcoj0MkKDbat/DjTRZa68l1GiFenEDaul0peGqP+Z/yNZCvIqzca JggA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=mulTmRahmIOLlqTACfJOIL2mZII2b44d4f9C0tQdiJE=; b=tH3j0PKhYo7oUgVJhF5gMjUgSJKJiCD5nznGJ7hHIc2jBN9wHBUQzRcOk+kBUO3tbY SATQpWbH4vMdIPzYozh3BClw+1cwZWDV9Dz/TwQIi4C2QUxv5SE3LEvZEmy9lfl3NI5B PdmrNPyrVpVImljOPPKl+GvJRsKZV0/ZIxE1YWbaMyspNNctpjuZIHVYYUlVeOHy/gZt 9uO9ePkmpqJqAnLNCrSoBf2GT80FGYk6MTdwF4GnN0sCM7IkL2GXyg9fgtu+nlPLmA0F Sw5SOCfXH+BDFDM0cfk+xCp5ukuFMEIcH0W2JGvml3ZvW6aoJ0mk+EiSojQUdbf97qCf h+yg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TPQwt2Vv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:51 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/29] accel/tcg: Include tcg.h in tcg-runtime.c Date: Sun, 29 Dec 2019 10:11:01 +1100 Message-Id: <20191228231124.18307-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- accel/tcg/tcg-runtime.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/accel/tcg/tcg-runtime.c b/accel/tcg/tcg-runtime.c index 8a1e408e31..4ab2cf7f75 100644 --- a/accel/tcg/tcg-runtime.c +++ b/accel/tcg/tcg-runtime.c @@ -30,6 +30,7 @@ #include "exec/tb-lookup.h" #include "disas/disas.h" #include "exec/log.h" +#include "tcg.h" /* 32-bit helpers */ From patchwork Sat Dec 28 23:11:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182502 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4639570ild; Sat, 28 Dec 2019 15:12:19 -0800 (PST) X-Google-Smtp-Source: APXvYqwbseujxKDKkueQDF9FQNmRzfVCOz3TOFHd0JN9gCg0u0YbZMcjCPeBXhmoTqAAMP62bcPz X-Received: by 2002:a54:4e96:: with SMTP id c22mr4922253oiy.110.1577574739463; Sat, 28 Dec 2019 15:12:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574739; cv=none; d=google.com; s=arc-20160816; b=QA8u1AvzBzUqWWIorGasouRf7ZhVdOzsydJSLAzW5JoZaToFDD/mOnmNnt1iPNCSgn Y6oMBi7u/eF+4zl+iafQKqo2kiPwL3G6jnJZM9cuI/IkWF1zGSbxQ2WX5qZWS5tJ2gvS hgyI/80ToDFM8e4p10dwq53reaR2RL3c58Hfsgy6TH8mRYCvCRrBbD87RaSzFQqvYFl6 2VJlLufCzJjmSlxjeywqu2UFb1Be8RDS6KfPk4ANhVd6dduHYqukS+KKzzxYfTtS7DNH WDadX5pojIu4G0TaMHYyIUyAwV4mlS6gEeMB/RbDqtWYGINyZIzDAX/CBrXMNo1dqr+z T7Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=e7IjWrGdGmZg7JkMhbQbAWZ0eqaluquJ5qRv97GXAjk=; b=QZolL9INeFowcHZiL6WQrv8jr2ppYELqiiuxmw+TlpMmDyv9RG3ElY80eLm04vZ/J5 4rLj3tVGNBKRAYlMQMps3/jvsm5Rh08lSuGaqz8JezrNB2d736IZdGMs1HCvDgCInI9E +ZUHolxfcCkNBoynYz9S8FsSPWgEv3mwTw3pdkxrVg+cqmSg4S0NLyUhzZ15Qi13v8Y2 xK3GOkRhtS9UbVwnD65cBcGsynfQzIOKVxBEVyDr7K4D32PPcUNHVpCxAIM7kHDCN1/l WhPKDq+9tPTAtIoTebSyjI3H+nrwSquTRCeYnc1uoTpvM2MtxpQz1ZMGewZ36uOPQFJW oGqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gq0m7DMh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f15si14310538oib.61.2019.12.28.15.12.19 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 28 Dec 2019 15:12:19 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gq0m7DMh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47062 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ilLFq-0004gi-Ca for patch@linaro.org; Sat, 28 Dec 2019 18:12:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39794) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ilLFV-0004aA-Gf for qemu-devel@nongnu.org; Sat, 28 Dec 2019 18:11:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ilLFU-00054D-AG for qemu-devel@nongnu.org; Sat, 28 Dec 2019 18:11:57 -0500 Received: from mail-pl1-x641.google.com ([2607:f8b0:4864:20::641]:38954) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ilLFU-0004zM-3x for qemu-devel@nongnu.org; Sat, 28 Dec 2019 18:11:56 -0500 Received: by mail-pl1-x641.google.com with SMTP id g6so10250840plp.6 for ; Sat, 28 Dec 2019 15:11:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e7IjWrGdGmZg7JkMhbQbAWZ0eqaluquJ5qRv97GXAjk=; b=Gq0m7DMhV1+i6cHjAH8+98rCcXg82qdLs1Efe9y5gEPhuvOAvqIK0F1mGY1s+WASPz 0QOBKJqJdGTtQOOdHO5jrNAA1wSRsu5U9qyhw/9enJJA7BXJNpqhhyB0imEWXezu0g6h jxuLOxIq09Ytkvr5zR3La18xcCRhvrMLGI/3NAUC6XJkdPLJNp0mz+z60YoTvs87tqPv 7ROUIvPNGazjE8w9wyFQWzWLoj6eiRtIF0FJtS4eklun50PzFUKgG3vZ8+xT/FLXFuBZ bbGT0KG6pykAOgEMe6r3AoORpw+UtB2VH+GV/dZwXDSyIAmINPBoPe/mIsfAfeNhA80i Bh9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e7IjWrGdGmZg7JkMhbQbAWZ0eqaluquJ5qRv97GXAjk=; b=iD3w+dihza5rwP0mgoHT9QK5PU8QWVBYLhHV2Bkc+FQhjHKwaN/ujmCZ0kG7o6kRgz ttnC5pET6E8eUOadZlSRXlV3s9aUDw+JNh6A2EaZNZXEf0m6QisOwoFwU7QOazp8JB+Y hyhbZh7I7GBl+g22pC3AnWQttlYRdYwBaUGJmUr/QRmUsJ6jRkU16YhsltKOdGJJXwnN P+DDdEtSjlPHsBEEwK4o3thF+x+PUN8qh2Pl26IYdi2EKdIl2Ainy4HjuqLdl1xIJHc1 S+J945P+RwnCX0zTFYZcvFqENhNeaT2Q/+Ikzbs9cWtaDHDyxUCu8tJr1RWWKwRvxyWp +psw== X-Gm-Message-State: APjAAAXixli9pm4t5N8t/T2gPkEZYFZsg+b/ZFkxdYXg0A5CG0UMZGH9 /W8/0ovrWI2nXUVuI3rBLCNWNWW9FiE= X-Received: by 2002:a17:90a:191a:: with SMTP id 26mr35282365pjg.111.1577574714835; Sat, 28 Dec 2019 15:11:54 -0800 (PST) Received: from localhost.localdomain (194-223-58-9.tpgi.com.au. [194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:54 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/29] linux-user: Include tcg.h in syscall.c Date: Sun, 29 Dec 2019 10:11:02 +1100 Message-Id: <20191228231124.18307-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on tcg.h being included indirectly. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/syscall.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 171c0caef3..34825f15bf 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -115,6 +115,7 @@ #include "user/syscall-trace.h" #include "qapi/error.h" #include "fd-trans.h" +#include "tcg.h" #ifndef CLONE_IO #define CLONE_IO 0x80000000 /* Clone io context */ From patchwork Sat Dec 28 23:11:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182505 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4641576ild; Sat, 28 Dec 2019 15:14:53 -0800 (PST) X-Google-Smtp-Source: APXvYqxzlS4071FIIQ7SF5DFs2vLQdFZeGuTyDW2hTCgUGHC6sfFngGSYgTNj7RNNwA5DSQBrSgs X-Received: by 2002:a9d:5c02:: with SMTP id o2mr57207256otk.176.1577574893928; Sat, 28 Dec 2019 15:14:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577574893; cv=none; d=google.com; s=arc-20160816; b=IbbEnGTjQOZXnfH6/a81HLVprS68oNhMZzenhQUgBFohf9ViC2tZSyQF7Razv2YZEJ 6wRl3ggjtLIeMvaAhqnNVqKsVXDj4wVhh/c6j/eSVGAIXinNTOQr0nZs/LBaSudKHXd9 /vsMCIwz2ynWJ8lm5tw2Jt0G4plX2w5JhEA1kjis2buhYcuEGkKm67mU/5P5v+rOl2Ed AyQtedf5RAOvRy1WhnfdalWsh1kUlHViKgo0EoR6rjFesto8qBvueFX7U52/F3w0WGWV Ak1k7BQYHSIlxwN3Z0u/+W/c2bPF0S4oBT18oPnPlxhiVG423UTt4S0htIBhca3JK2Qm q3lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=o4tOjWH6ALV81K/fF+oLX92Wb4vwp7buMFAa8+Hf4/8=; b=sy+AFznTGAICSDOB+29wwSIsL9yYzLKXrXf/AohtAtr2tDRltbLvVqvUNnTT8fV2mt vAEJskGQt59jbfzQSv4BfMgKC/dBVXLgU4YUMmz9nnSW5KP/9jjkYgMALQnyZw+3O/5o pjTYoR7zUNOLqIJhsBm5g3ejDhDVdxl2N3CQCvRSaoolqiAFiMQl8JbbC05G0Jjo7d5C /byX5MYV9URe8VtcFzovqHNGIIISv5tPv57zjRdRVg00pUc9c7FKHaFv1hellF2R1GqG Q0X0GYFI3++RjodG2QBR3eg3Eivexat6YDvNyCJJL+fprSAL5e+6PLH8hLqWSBF0klhN x9cA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MBnOOf7v; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/29] linux-user: Include trace-root.h in syscall-trace.h Date: Sun, 29 Dec 2019 10:11:03 +1100 Message-Id: <20191228231124.18307-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1044 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on trace-root.h being included beforehand. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/user/syscall-trace.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.20.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/include/user/syscall-trace.h b/include/user/syscall-trace.h index 9e60473643..79fd3e5aa9 100644 --- a/include/user/syscall-trace.h +++ b/include/user/syscall-trace.h @@ -10,6 +10,8 @@ #ifndef _SYSCALL_TRACE_H_ #define _SYSCALL_TRACE_H_ +#include "trace-root.h" + /* * These helpers just provide a common place for the various * subsystems that want to track syscalls to put their hooks in. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.11.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:11:59 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/29] plugins: Include trace/mem.h in api.c Date: Sun, 29 Dec 2019 10:11:04 +1100 Message-Id: <20191228231124.18307-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1041 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Code movement in an upcoming patch will show that this file was implicitly depending on trace/mem.h being included beforehand. Reported-by: Alex Bennée Signed-off-by: Richard Henderson --- plugins/api.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.20.1 diff --git a/plugins/api.c b/plugins/api.c index fa1d9f276d..cb7098ce79 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -46,6 +46,8 @@ #include "qemu/plugin-memory.h" #include "hw/boards.h" #endif +#include "trace-root.h" +#include "trace/mem.h" /* Uninstall and Reset handlers */ From patchwork Sat Dec 28 23:11:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182511 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4645843ild; Sat, 28 Dec 2019 15:20:40 -0800 (PST) X-Google-Smtp-Source: APXvYqwm137WonWOp0D0yufnJe02PjfErauhh+jrnbTHa4vhqw1N+ckSeSbujAGQ6FYTXta38Ql3 X-Received: by 2002:a9d:222f:: with SMTP id o44mr52209593ota.51.1577575240173; Sat, 28 Dec 2019 15:20:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575240; cv=none; d=google.com; s=arc-20160816; b=0yke5/lRaP5rFn8ZfV3S5Oh2BUu9AbjDecKx4+FPheDCLxBfp6f9yyqwEpmSwU8kbf 3W/LALkoa+zCyLcvqD5HIiIn9cVif9yapBLeo1dOU+TqIRSXphGPOUnT/y1YIu2olnBY 9x+4Wqw96x8UySQI4P9UthOpNQHjVICVqsWvo2WjDM+s+z43klluQHMEcdYFgIDuOecK kSjMv5/SdrkBDzwFUxPA1N9C8xphXVHlqmd3rU19wYioNrYf2vFSCrng5KVnnRO2RtNO BX27ku74ohZaIzz2CCjKGMFmCnsgoZUV0/lBruqX71iLOghxbG1KdcWf2NXw8zWkAr9p hulw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=NbXcHmPvccOg4ApdYdFLAPaKmhXfD3r1GQk/f9IlktA=; b=kBeK5HcaRNq26VfG1X5th1crg5Yt0Z2k1Pld5mE7ddoINirGPVSLBiZgRiF8s/B+43 yxXRQq/+P5hgCgy/9cehT2w9pup3zrek6/d5Q+SsD5AN6YIpT1CEXenuQx4GU7qcx+RM DuxBA2DIIypbaiJWdCMR/EnAn1OX8gBcuIPSWp+6MJxhCzSUknoiwaWp1HzpBN9nDIZh 4ygfh3E86YF3iSZaLbKjPDLnH4KeNCLiY5Lnon2nBLmobPo65mlbVC6ixnQNhdvbmz77 IkstyfcWzzvAOFgP/nEzjrwgZM9zLHMwuJNuyctw/8eaNDQY50rDu8cyv7IwfsqGnDJg z3Ww== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T4aZfH0j; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/29] cputlb: Move body of cpu_ldst_template.h out of line Date: Sun, 29 Dec 2019 10:11:05 +1100 Message-Id: <20191228231124.18307-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With the tracing hooks, the inline functions are no longer so simple. Once out-of-line, the current tlb_entry lookup is redundant with the one in the main load/store_helper. This also begins the introduction of a new target facing interface, with suffix *_mmuidx_ra. This is not yet official because the interface is not done for user-only. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. What remains in cpu_ldst_template.h are the expansions for _code, _data, and MMU_MODE_SUFFIX. Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 25 ++++++- include/exec/cpu_ldst_template.h | 125 +++++++------------------------ accel/tcg/cputlb.c | 116 ++++++++++++++++++++++++++++ 3 files changed, 166 insertions(+), 100 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index fd499f7e2f..cf8af36dbc 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -152,7 +152,7 @@ static inline void clear_helper_retaddr(void) #else -/* The memory helpers for tcg-generated code need tcg_target_long etc. */ +/* Needed for TCG_OVERSIZED_GUEST */ #include "tcg.h" static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry) @@ -185,6 +185,29 @@ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, return &env_tlb(env)->f[mmu_idx].table[tlb_index(env, mmu_idx, addr)]; } +uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); +int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra); + +void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, + int mmu_idx, uintptr_t retaddr); +void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, + int mmu_idx, uintptr_t retaddr); + #ifdef MMU_MODE0_SUFFIX #define CPU_MMU_INDEX 0 #define MEMSUFFIX MMU_MODE0_SUFFIX diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index 0ad5de3ef9..ea39e29c19 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -24,13 +24,6 @@ * License along with this library; if not, see . */ -#if !defined(SOFTMMU_CODE_ACCESS) -#include "trace-root.h" -#endif - -#include "qemu/plugin.h" -#include "trace/mem.h" - #if DATA_SIZE == 8 #define SUFFIX q #define USUFFIX q @@ -63,56 +56,40 @@ #define RES_TYPE uint32_t #endif +/* generic load/store macros */ + #ifdef SOFTMMU_CODE_ACCESS -#define ADDR_READ addr_code -#define MMUSUFFIX _cmmu -#define URETSUFFIX USUFFIX -#define SRETSUFFIX glue(s, SUFFIX) -#else -#define ADDR_READ addr_read -#define MMUSUFFIX _mmu -#define URETSUFFIX USUFFIX -#define SRETSUFFIX glue(s, SUFFIX) + +static inline RES_TYPE +glue(glue(cpu_ld, USUFFIX), _code)(CPUArchState *env, target_ulong ptr) +{ + TCGMemOpIdx oi = make_memop_idx(MO_TE | SHIFT, CPU_MMU_INDEX); + return glue(glue(helper_ret_ld, USUFFIX), _cmmu)(env, ptr, oi, 0); +} + +#if DATA_SIZE <= 2 +static inline int +glue(glue(cpu_lds, SUFFIX), _code)(CPUArchState *env, target_ulong ptr) +{ + return (DATA_STYPE)glue(glue(cpu_ld, USUFFIX), _code)(env, ptr); +} #endif -/* generic load/store macros */ +#else static inline RES_TYPE glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) { - CPUTLBEntry *entry; - RES_TYPE res; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | SHIFT; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(entry->ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); - res = glue(glue(helper_ret_ld, URETSUFFIX), MMUSUFFIX)(env, addr, - oi, retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return res; + return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, + retaddr); } static inline RES_TYPE glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) { - return glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(env, ptr, 0); + return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); } #if DATA_SIZE <= 2 @@ -121,42 +98,17 @@ glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) { - CPUTLBEntry *entry; - int res; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | MO_SIGN | SHIFT; -#ifndef SOFTMMU_CODE_ACCESS - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(entry->ADDR_READ != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op & ~MO_SIGN, mmu_idx); - res = (DATA_STYPE)glue(glue(helper_ret_ld, SRETSUFFIX), - MMUSUFFIX)(env, addr, oi, retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - res = glue(glue(lds, SUFFIX), _p)((uint8_t *)hostaddr); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return res; + return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, + retaddr); } static inline int glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) { - return glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(env, ptr, 0); + return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); } #endif -#ifndef SOFTMMU_CODE_ACCESS - /* generic store macro */ static inline void @@ -164,36 +116,15 @@ glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, RES_TYPE v, uintptr_t retaddr) { - CPUTLBEntry *entry; - target_ulong addr; - int mmu_idx = CPU_MMU_INDEX; - MemOp op = MO_TE | SHIFT; -#if !defined(SOFTMMU_CODE_ACCESS) - uint16_t meminfo = trace_mem_get_info(op, mmu_idx, true); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); -#endif - - addr = ptr; - entry = tlb_entry(env, mmu_idx, addr); - if (unlikely(tlb_addr_write(entry) != - (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))))) { - TCGMemOpIdx oi = make_memop_idx(op, mmu_idx); - glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, v, oi, - retaddr); - } else { - uintptr_t hostaddr = addr + entry->addend; - glue(glue(st, SUFFIX), _p)((uint8_t *)hostaddr, v); - } -#ifndef SOFTMMU_CODE_ACCESS - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif + glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, + retaddr); } static inline void glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, RES_TYPE v) { - glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(env, ptr, v, 0); + glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); } #endif /* !SOFTMMU_CODE_ACCESS */ @@ -204,8 +135,4 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, #undef SUFFIX #undef USUFFIX #undef DATA_SIZE -#undef MMUSUFFIX -#undef ADDR_READ -#undef URETSUFFIX -#undef SRETSUFFIX #undef SHIFT diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 98221948d6..ddd19718bf 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -34,6 +34,9 @@ #include "qemu/atomic.h" #include "qemu/atomic128.h" #include "translate-all.h" +#include "trace-root.h" +#include "qemu/plugin.h" +#include "trace/mem.h" #ifdef CONFIG_PLUGIN #include "qemu/plugin-memory.h" #endif @@ -1625,6 +1628,75 @@ tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr, return (int32_t)helper_be_ldul_mmu(env, addr, oi, retaddr); } +/* + * Load helpers for cpu_ldst.h. + */ + +static inline uint64_t cpu_load_helper(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t retaddr, + MemOp op, FullLoadHelper *full_load) +{ + uint16_t meminfo; + TCGMemOpIdx oi; + uint64_t ret; + + meminfo = trace_mem_get_info(op, mmu_idx, false); + trace_guest_mem_before_exec(env_cpu(env), addr, meminfo); + + op &= ~MO_SIGN; + oi = make_memop_idx(op, mmu_idx); + ret = full_load(env, addr, oi, retaddr); + + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo); + + return ret; +} + +uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_UB, full_ldub_mmu); +} + +int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int8_t)cpu_load_helper(env, addr, mmu_idx, ra, MO_SB, + full_ldub_mmu); +} + +uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEUW, + MO_TE == MO_LE + ? full_le_lduw_mmu : full_be_lduw_mmu); +} + +int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return (int16_t)cpu_load_helper(env, addr, mmu_idx, ra, MO_TESW, + MO_TE == MO_LE + ? full_le_lduw_mmu : full_be_lduw_mmu); +} + +uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEUL, + MO_TE == MO_LE + ? full_le_ldul_mmu : full_be_ldul_mmu); +} + +uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_load_helper(env, addr, mmu_idx, ra, MO_TEQ, + MO_TE == MO_LE + ? helper_le_ldq_mmu : helper_be_ldq_mmu); +} + /* * Store Helpers */ @@ -1854,6 +1926,50 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, store_helper(env, addr, val, oi, retaddr, MO_BEQ); } +/* + * Store Helpers for cpu_ldst.h + */ + +static inline void QEMU_ALWAYS_INLINE +cpu_store_helper(CPUArchState *env, target_ulong addr, uint64_t val, + int mmu_idx, uintptr_t retaddr, MemOp op) +{ + TCGMemOpIdx oi; + uint16_t meminfo; + + meminfo = trace_mem_get_info(op, mmu_idx, true); + trace_guest_mem_before_exec(env_cpu(env), addr, meminfo); + + oi = make_memop_idx(op, mmu_idx); + store_helper(env, addr, val, oi, retaddr, op); + + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo); +} + +void cpu_stb_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_UB); +} + +void cpu_stw_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEUW); +} + +void cpu_stl_mmuidx_ra(CPUArchState *env, target_ulong addr, uint32_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEUL); +} + +void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, + int mmu_idx, uintptr_t retaddr) +{ + cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEQ); +} + /* First set of helpers allows passing in of OI and RETADDR. This makes them callable from other helpers. */ From patchwork Sat Dec 28 23:11:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182513 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4646124ild; Sat, 28 Dec 2019 15:21:06 -0800 (PST) X-Google-Smtp-Source: APXvYqyeif3a/zFhEvDWUDwYUPUTcXKcYmb0FpmYS6prLFg8Fc35lWjQtEdac0JNqyHx/NKv6IhJ X-Received: by 2002:a9d:7e99:: with SMTP id m25mr62740738otp.212.1577575266247; Sat, 28 Dec 2019 15:21:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575266; cv=none; d=google.com; s=arc-20160816; b=GfOxw8bJD7dILfnfg322JCV0Nef4rD93hy6F/t6HwIVvNHk3ghpdQXoNRBy04zDPyA QSzR4m+KXqeAeLF3pMTint03AES1ePC81reszGmIOqcqdETfvqRAbBsc3cT+TT+0G8Ft uNT4MiJGGDNjkfjboceLU6tLfdPCT/DtfcqLEeihaMIHyuE49Aji0xApHYEH6WnQnrLJ rj3EVA4T30jTO5EbTE+RDI+W2TyDzA5yIfPPB5Jr9jV7Rk5GLhCEVGDyp6dErwAh+znI 55SEO6ThufdCPwOS96HZLtRxnaC8SEpSxPuFDsa42d7dJPmAaNVc8Q2uN0lJ2tA6k7Wq VjOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=w1Tjfb9SeZwoP+jBqe2wdJ6MBodnhM7nlLGRuc9cKpc=; b=ZB/FhcCXy3ROnG16Q1o9eGkIj+3QGMov+Vj4B1fEVTlc+m9PPiaacFgLDsoA/RVp4w OvObvSVQY65f5u2Bn2ND06PE/BLAfkj+5yq7tjH89EEjbCHuxwStuyFR3/r8fTsEEH1B MmHBHShwVSuXjUtBEes17pOyaMdUuxCIlZA1YqNOBhIz3nIe6Fm0K+79JSlILGT4x/D9 vlWKy9FesR9ZMbUjLBsloAK2XZmwxooNFkxwxpjT8YSj0VayiGO97sEP93IFK5ZKTV4J l9BJJpiKECFYgLX5ccQOIGngXVIeSoLKYRsUCMc7r1Dn2sQz2ebOj1Rp8H3oEPtiQOSP GiCQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XrU2WswT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:04 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/29] translator: Use cpu_ld*_code instead of open-coding Date: Sun, 29 Dec 2019 10:11:06 +1100 Message-Id: <20191228231124.18307-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The DO_LOAD macros replicate the distinction already performed by the cpu_ldst.h functions. Use them. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 11 --------- include/exec/translator.h | 48 +++++++++++---------------------------- 2 files changed, 13 insertions(+), 46 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index cf8af36dbc..399ff6c3da 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -129,11 +129,6 @@ static inline void clear_helper_retaddr(void) #include "exec/cpu_ldst_useronly_template.h" #undef MEMSUFFIX -/* - * Code access is deprecated in favour of translator_ld* functions - * (see translator.h). However there are still users that need to - * converted so for now these stay. - */ #define MEMSUFFIX _code #define CODE_ACCESS #define DATA_SIZE 1 @@ -455,12 +450,6 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX -/* - * Code access is deprecated in favour of translator_ld* functions - * (see translator.h). However there are still users that need to - * converted so for now these stay. - */ - #define CPU_MMU_INDEX (cpu_mmu_index(env, true)) #define MEMSUFFIX _code #define SOFTMMU_CODE_ACCESS diff --git a/include/exec/translator.h b/include/exec/translator.h index 459dd72aab..638e1529c5 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -148,41 +148,19 @@ void translator_loop_temp_check(DisasContextBase *db); /* * Translator Load Functions * - * These are intended to replace the old cpu_ld*_code functions and - * are mandatory for front-ends that have been migrated to the common - * translator_loop. These functions are only intended to be called - * from the translation stage and should not be called from helper - * functions. Those functions should be converted to encode the - * relevant information at translation time. + * These are intended to replace the direct usage of the cpu_ld*_code + * functions and are mandatory for front-ends that have been migrated + * to the common translator_loop. These functions are only intended + * to be called from the translation stage and should not be called + * from helper functions. Those functions should be converted to encode + * the relevant information at translation time. */ -#ifdef CONFIG_USER_ONLY - -#define DO_LOAD(type, name, shift) \ - do { \ - set_helper_retaddr(1); \ - ret = name ## _p(g2h(pc)); \ - clear_helper_retaddr(); \ - } while (0) - -#else - -#define DO_LOAD(type, name, shift) \ - do { \ - int mmu_idx = cpu_mmu_index(env, true); \ - TCGMemOpIdx oi = make_memop_idx(shift, mmu_idx); \ - ret = helper_ret_ ## name ## _cmmu(env, pc, oi, 0); \ - } while (0) - -#endif - -#define GEN_TRANSLATOR_LD(fullname, name, type, shift, swap_fn) \ +#define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \ static inline type \ fullname ## _swap(CPUArchState *env, abi_ptr pc, bool do_swap) \ { \ - type ret; \ - DO_LOAD(type, name, shift); \ - \ + type ret = load_fn(env, pc); \ if (do_swap) { \ ret = swap_fn(ret); \ } \ @@ -195,11 +173,11 @@ void translator_loop_temp_check(DisasContextBase *db); return fullname ## _swap(env, pc, false); \ } -GEN_TRANSLATOR_LD(translator_ldub, ldub, uint8_t, 0, /* no swap */ ) -GEN_TRANSLATOR_LD(translator_ldsw, ldsw, int16_t, 1, bswap16) -GEN_TRANSLATOR_LD(translator_lduw, lduw, uint16_t, 1, bswap16) -GEN_TRANSLATOR_LD(translator_ldl, ldl, uint32_t, 2, bswap32) -GEN_TRANSLATOR_LD(translator_ldq, ldq, uint64_t, 3, bswap64) +GEN_TRANSLATOR_LD(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) +GEN_TRANSLATOR_LD(translator_ldsw, int16_t, cpu_ldsw_code, bswap16) +GEN_TRANSLATOR_LD(translator_lduw, uint16_t, cpu_lduw_code, bswap16) +GEN_TRANSLATOR_LD(translator_ldl, uint32_t, cpu_ldl_code, bswap32) +GEN_TRANSLATOR_LD(translator_ldq, uint64_t, cpu_ldq_code, bswap64) #undef GEN_TRANSLATOR_LD #endif /* EXEC__TRANSLATOR_H */ From patchwork Sat Dec 28 23:11:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182516 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4647999ild; Sat, 28 Dec 2019 15:23:39 -0800 (PST) X-Google-Smtp-Source: APXvYqzETA0BlUBKw5c7Orc+b4wbHmox2ffoKXQvdXOK3BzGw9E9GZcO5kw9wHcWo0SK3pDQauH8 X-Received: by 2002:a05:6830:4c2:: with SMTP id s2mr67742793otd.144.1577575419884; Sat, 28 Dec 2019 15:23:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575419; cv=none; d=google.com; s=arc-20160816; b=BEyQmWHI7Q+PMuzPStSm/3VCU8+1A7fEf87AxgogfvhGGUJji789LtjiJueodvKT8c WfZWUnpOi2ffBaMT2+hLrqThhyHsah32c0wIH0sZea2NKdDGVJVQtnSmBnXmOlIoUeMe T45l7his8XlXIhUD8OlJNizlysHehBCit+2WlQz2F9vrMRKNPbX0s7tPy5ziB5a3xFn0 hH+a53XE2Mqwsoiqx/L+eiYp33KnfMHBr8W/NDMwtG/R3fUZVp7P9e8SRkOySDATy+qJ 3KgpdHZaEKNd9guxuFJUak9tqlnpsabeLdunmxqA33ezBiDxB7Tuy+BI2cbSL7jigttK OOeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=uB1yLwtWzwXzHBHtzMIQQis21sgQatB5l68T1HO/TXw=; b=iRcRAOOICrYVDEgNpWmbwdn2SqSBAa93uTolzyLpJBPHkxeUCq3Mc61jBABp7K4P03 A1EwVtM+ypjCqckh5dtlrJf+YogbjhjZ0SvEanxZtjc8THZ5RBVKKZpkHteSNWNndoNL dxBBQgFeaA9MOzMPP02wDugdkQ0uUR8pxRTbH5tnuItxSzGwNdwEqeUMIdc0wQzPw+Et kxCZASDpu9KF4Aw6H1vP6/+bLU3FIDYdgrBvNQplqvHXwZwUTXQc4J3zQYToYkBrC9ci RCCcDLNJ5ky9tN7K4wgTwAxEMAE8JeuuCYqP0NYZLX3+myRzoQQUn0ZTn70+7Vcl7xl1 GDlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Oaf0kdqG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 12/29] cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_code Date: Sun, 29 Dec 2019 10:11:07 +1100 Message-Id: <20191228231124.18307-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Markovic Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are no uses of the *_cmmu names other than the bare wrapping within the *_code inlines. Therefore rename the functions so we can drop the inlines. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. Reviewed-by: Aleksandar Markovic Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 29 ++++------ include/exec/cpu_ldst_template.h | 21 ------- tcg/tcg.h | 29 ---------- accel/tcg/cputlb.c | 94 ++++++++------------------------ docs/devel/loads-stores.rst | 4 +- 5 files changed, 36 insertions(+), 141 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 399ff6c3da..ef59ed61e4 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -450,25 +450,20 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX -#define CPU_MMU_INDEX (cpu_mmu_index(env, true)) -#define MEMSUFFIX _code -#define SOFTMMU_CODE_ACCESS +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr); -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" +static inline int cpu_ldsb_code(CPUArchState *env, abi_ptr addr) +{ + return (int8_t)cpu_ldub_code(env, addr); +} -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" - -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#undef SOFTMMU_CODE_ACCESS +static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) +{ + return (int16_t)cpu_lduw_code(env, addr); +} #endif /* defined(CONFIG_USER_ONLY) */ diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h index ea39e29c19..e400979f23 100644 --- a/include/exec/cpu_ldst_template.h +++ b/include/exec/cpu_ldst_template.h @@ -58,25 +58,6 @@ /* generic load/store macros */ -#ifdef SOFTMMU_CODE_ACCESS - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), _code)(CPUArchState *env, target_ulong ptr) -{ - TCGMemOpIdx oi = make_memop_idx(MO_TE | SHIFT, CPU_MMU_INDEX); - return glue(glue(helper_ret_ld, USUFFIX), _cmmu)(env, ptr, oi, 0); -} - -#if DATA_SIZE <= 2 -static inline int -glue(glue(cpu_lds, SUFFIX), _code)(CPUArchState *env, target_ulong ptr) -{ - return (DATA_STYPE)glue(glue(cpu_ld, USUFFIX), _code)(env, ptr); -} -#endif - -#else - static inline RES_TYPE glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, target_ulong ptr, @@ -127,8 +108,6 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); } -#endif /* !SOFTMMU_CODE_ACCESS */ - #undef RES_TYPE #undef DATA_TYPE #undef DATA_STYPE diff --git a/tcg/tcg.h b/tcg/tcg.h index 92ca10dffc..3b4f79301c 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -1290,27 +1290,6 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, TCGMemOpIdx oi, uintptr_t retaddr); -uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); -uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr); - /* Temporary aliases until backends are converted. */ #ifdef TARGET_WORDS_BIGENDIAN # define helper_ret_ldsw_mmu helper_be_ldsw_mmu @@ -1322,10 +1301,6 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_be_stw_mmu # define helper_ret_stl_mmu helper_be_stl_mmu # define helper_ret_stq_mmu helper_be_stq_mmu -# define helper_ret_lduw_cmmu helper_be_lduw_cmmu -# define helper_ret_ldsw_cmmu helper_be_ldsw_cmmu -# define helper_ret_ldl_cmmu helper_be_ldl_cmmu -# define helper_ret_ldq_cmmu helper_be_ldq_cmmu #else # define helper_ret_ldsw_mmu helper_le_ldsw_mmu # define helper_ret_lduw_mmu helper_le_lduw_mmu @@ -1336,10 +1311,6 @@ uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, # define helper_ret_stw_mmu helper_le_stw_mmu # define helper_ret_stl_mmu helper_le_stl_mmu # define helper_ret_stq_mmu helper_le_stq_mmu -# define helper_ret_lduw_cmmu helper_le_lduw_cmmu -# define helper_ret_ldsw_cmmu helper_le_ldsw_cmmu -# define helper_ret_ldl_cmmu helper_le_ldl_cmmu -# define helper_ret_ldq_cmmu helper_le_ldq_cmmu #endif uint32_t helper_atomic_cmpxchgb_mmu(CPUArchState *env, target_ulong addr, diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ddd19718bf..f0e4b0aee4 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2028,98 +2028,50 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, /* Code access functions. */ -static uint64_t full_ldub_cmmu(CPUArchState *env, target_ulong addr, +static uint64_t full_ldub_code(CPUArchState *env, target_ulong addr, TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_cmmu); + return load_helper(env, addr, oi, retaddr, MO_8, true, full_ldub_code); } -uint8_t helper_ret_ldub_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr) { - return full_ldub_cmmu(env, addr, oi, retaddr); + TCGMemOpIdx oi = make_memop_idx(MO_UB, cpu_mmu_index(env, true)); + return full_ldub_code(env, addr, oi, 0); } -int8_t helper_ret_ldsb_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_lduw_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return (int8_t) full_ldub_cmmu(env, addr, oi, retaddr); + return load_helper(env, addr, oi, retaddr, MO_TEUW, true, full_lduw_code); } -static uint64_t full_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr) { - return load_helper(env, addr, oi, retaddr, MO_LEUW, true, - full_le_lduw_cmmu); + TCGMemOpIdx oi = make_memop_idx(MO_TEUW, cpu_mmu_index(env, true)); + return full_lduw_code(env, addr, oi, 0); } -uint16_t helper_le_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_ldl_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return full_le_lduw_cmmu(env, addr, oi, retaddr); + return load_helper(env, addr, oi, retaddr, MO_TEUL, true, full_ldl_code); } -int16_t helper_le_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr) { - return (int16_t) full_le_lduw_cmmu(env, addr, oi, retaddr); + TCGMemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(env, true)); + return full_ldl_code(env, addr, oi, 0); } -static uint64_t full_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +static uint64_t full_ldq_code(CPUArchState *env, target_ulong addr, + TCGMemOpIdx oi, uintptr_t retaddr) { - return load_helper(env, addr, oi, retaddr, MO_BEUW, true, - full_be_lduw_cmmu); + return load_helper(env, addr, oi, retaddr, MO_TEQ, true, full_ldq_code); } -uint16_t helper_be_lduw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) { - return full_be_lduw_cmmu(env, addr, oi, retaddr); -} - -int16_t helper_be_ldsw_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return (int16_t) full_be_lduw_cmmu(env, addr, oi, retaddr); -} - -static uint64_t full_le_ldul_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_LEUL, true, - full_le_ldul_cmmu); -} - -uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return full_le_ldul_cmmu(env, addr, oi, retaddr); -} - -static uint64_t full_be_ldul_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_BEUL, true, - full_be_ldul_cmmu); -} - -uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return full_be_ldul_cmmu(env, addr, oi, retaddr); -} - -uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_LEQ, true, - helper_le_ldq_cmmu); -} - -uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr, - TCGMemOpIdx oi, uintptr_t retaddr) -{ - return load_helper(env, addr, oi, retaddr, MO_BEQ, true, - helper_be_ldq_cmmu); + TCGMemOpIdx oi = make_memop_idx(MO_TEQ, cpu_mmu_index(env, true)); + return full_ldq_code(env, addr, oi, 0); } diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index c74cd090e6..8a5bc912a5 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -171,8 +171,6 @@ more in line with the other memory access functions. load: ``helper_{endian}_ld{sign}{size}_mmu(env, addr, opindex, retaddr)`` -load (code): ``helper_{endian}_ld{sign}{size}_cmmu(env, addr, opindex, retaddr)`` - store: ``helper_{endian}_st{size}_mmu(env, addr, val, opindex, retaddr)`` ``sign`` @@ -192,7 +190,7 @@ store: ``helper_{endian}_st{size}_mmu(env, addr, val, opindex, retaddr)`` - ``ret`` : target endianness Regexes for git grep - - ``\`` + - ``\`` - ``\`` ``address_space_*`` From patchwork Sat Dec 28 23:11:08 2019 Content-Type: text/plain; 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 13/29] cputlb: Provide cpu_(ld, st}*_mmuidx_ra for user-only Date: Sun, 29 Dec 2019 10:11:08 +1100 Message-Id: <20191228231124.18307-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This finishes the new interface began with the previous patch. Document the interface and deprecate MMU_MODE_SUFFIX. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 80 +++++++++++++- docs/devel/loads-stores.rst | 211 ++++++++++++++++++++++++++---------- 2 files changed, 230 insertions(+), 61 deletions(-) -- 2.20.1 Reviewed-by: Aleksandar Markovic Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index ef59ed61e4..41b98ba801 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -25,9 +25,13 @@ * * The syntax for the accessors is: * - * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr) + * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr) + * cpu_ld{sign}{size}_{mmusuffix}_ra(env, ptr, retaddr) + * cpu_ld{sign}{size}_mmuidx_ra(env, ptr, mmu_idx, retaddr) * - * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val) + * store: cpu_st{size}_{mmusuffix}(env, ptr, val) + * cpu_st{size}_{mmusuffix}_ra(env, ptr, val, retaddr) + * cpu_st{size}_mmuidx_ra(env, ptr, val, mmu_idx, retaddr) * * sign is: * (empty): for 32 and 64 bit sizes @@ -40,9 +44,10 @@ * l: 32 bits * q: 64 bits * - * mmusuffix is one of the generic suffixes "data" or "code", or - * (for softmmu configs) a target-specific MMU mode suffix as defined - * in target cpu.h. + * mmusuffix is one of the generic suffixes "data" or "code", or "mmuidx". + * The "mmuidx" suffix carries an extra mmu_idx argument that specifies + * the index to use; the "data" and "code" suffixes take the index from + * cpu_mmu_index(). */ #ifndef CPU_LDST_H #define CPU_LDST_H @@ -145,6 +150,71 @@ static inline void clear_helper_retaddr(void) #undef MEMSUFFIX #undef CODE_ACCESS +/* + * Provide the same *_mmuidx_ra interface as for softmmu. + * The mmu_idx argument is ignored. + */ + +static inline uint32_t cpu_ldub_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldub_data_ra(env, addr, ra); +} + +static inline uint32_t cpu_lduw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_lduw_data_ra(env, addr, ra); +} + +static inline uint32_t cpu_ldl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldl_data_ra(env, addr, ra); +} + +static inline uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldq_data_ra(env, addr, ra); +} + +static inline int cpu_ldsb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldsb_data_ra(env, addr, ra); +} + +static inline int cpu_ldsw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + int mmu_idx, uintptr_t ra) +{ + return cpu_ldsw_data_ra(env, addr, ra); +} + +static inline void cpu_stb_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stb_data_ra(env, addr, val, ra); +} + +static inline void cpu_stw_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stw_data_ra(env, addr, val, ra); +} + +static inline void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint32_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stl_data_ra(env, addr, val, ra); +} + +static inline void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, + uint64_t val, int mmu_idx, uintptr_t ra) +{ + cpu_stq_data_ra(env, addr, val, ra); +} + #else /* Needed for TCG_OVERSIZED_GUEST */ diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst index 8a5bc912a5..03aa9e7ff8 100644 --- a/docs/devel/loads-stores.rst +++ b/docs/devel/loads-stores.rst @@ -72,31 +72,34 @@ Regexes for git grep - ``\`` - ``\`` -``cpu_{ld,st}_*`` -~~~~~~~~~~~~~~~~~ +``cpu_{ld,st}*_mmuidx_ra`` +~~~~~~~~~~~~~~~~~~~~~~~~~~ -These functions operate on a guest virtual address. Be aware -that these functions may cause a guest CPU exception to be -taken (e.g. for an alignment fault or MMU fault) which will -result in guest CPU state being updated and control longjumping -out of the function call. They should therefore only be used -in code that is implementing emulation of the target CPU. +These functions operate on a guest virtual address plus a context, +known as a "mmu index" or ``mmuidx``, which controls how that virtual +address is translated. The meaning of the indexes are target specific, +but specifying a particular index might be necessary if, for instance, +the helper requires an "always as non-privileged" access rather that +the default access for the current state of the guest CPU. -These functions may throw an exception (longjmp() back out -to the top level TCG loop). This means they must only be used -from helper functions where the translator has saved all -necessary CPU state before generating the helper function call. -It's usually better to use the ``_ra`` variants described below -from helper functions, but these functions are the right choice -for calls made from hooks like the CPU do_interrupt hook or -when you know for certain that the translator had to save all -the CPU state that ``cpu_restore_state()`` would restore anyway. +These functions may cause a guest CPU exception to be taken +(e.g. for an alignment fault or MMU fault) which will result in +guest CPU state being updated and control longjmp'ing out of the +function call. They should therefore only be used in code that is +implementing emulation of the guest CPU. + +The ``retaddr`` parameter is used to control unwinding of the +guest CPU state in case of a guest CPU exception. This is passed +to ``cpu_restore_state()``. Therefore the value should either be 0, +to indicate that the guest CPU state is already synchronized, or +the result of ``GETPC()`` from the top level ``HELPER(foo)`` +function, which is a return address into the generated code. Function names follow the pattern: -load: ``cpu_ld{sign}{size}_{mmusuffix}(env, ptr)`` +load: ``cpu_ld{sign}{size}_mmuidx_ra(env, ptr, mmuidx, retaddr)`` -store: ``cpu_st{size}_{mmusuffix}(env, ptr, val)`` +store: ``cpu_st{size}_mmuidx_ra(env, ptr, val, mmuidx, retaddr)`` ``sign`` - (empty) : for 32 or 64 bit sizes @@ -109,56 +112,151 @@ store: ``cpu_st{size}_{mmusuffix}(env, ptr, val)`` - ``l`` : 32 bits - ``q`` : 64 bits -``mmusuffix`` is one of the generic suffixes ``data`` or ``code``, or -(for softmmu configs) a target-specific MMU mode suffix as defined -in the target's ``cpu.h``. +Regexes for git grep: + - ``\`` + - ``\`` -Regexes for git grep - - ``\`` - - ``\`` +``cpu_{ld,st}*_data_ra`` +~~~~~~~~~~~~~~~~~~~~~~~~ -``cpu_{ld,st}_*_ra`` -~~~~~~~~~~~~~~~~~~~~ - -These functions work like the ``cpu_{ld,st}_*`` functions except -that they also take a ``retaddr`` argument. This extra argument -allows for correct unwinding of any exception that is taken, -and should generally be the result of GETPC() called directly -from the top level HELPER(foo) function (i.e. the return address -in the generated code). +These functions work like the ``cpu_{ld,st}_mmuidx_ra`` functions +except that the ``mmuidx`` parameter is taken from the current mode +of the guest CPU, as determined by ``cpu_mmu_index(env, false)``. These are generally the preferred way to do accesses by guest -virtual address from helper functions; see the documentation -of the non-``_ra`` variants for when those would be better. - -Calling these functions with a ``retaddr`` argument of 0 is -equivalent to calling the non-``_ra`` version of the function. +virtual address from helper functions, unless the access should +be performed with a context other than the default. Function names follow the pattern: -load: ``cpu_ld{sign}{size}_{mmusuffix}_ra(env, ptr, retaddr)`` +load: ``cpu_ld{sign}{size}_data_ra(env, ptr, ra)`` -store: ``cpu_st{sign}{size}_{mmusuffix}_ra(env, ptr, val, retaddr)`` +store: ``cpu_st{size}_data_ra(env, ptr, val, ra)`` + +``sign`` + - (empty) : for 32 or 64 bit sizes + - ``u`` : unsigned + - ``s`` : signed + +``size`` + - ``b`` : 8 bits + - ``w`` : 16 bits + - ``l`` : 32 bits + - ``q`` : 64 bits + +Regexes for git grep: + - ``\`` + - ``\`` + +``cpu_{ld,st}*_data`` +~~~~~~~~~~~~~~~~~~~~~ + +These functions work like the ``cpu_{ld,st}_data_ra`` functions +except that the ``retaddr`` parameter is 0, and thus does not +unwind guest CPU state. + +This means they must only be used from helper functions where the +translator has saved all necessary CPU state. These functions are +the right choice for calls made from hooks like the CPU ``do_interrupt`` +hook or when you know for certain that the translator had to save all +the CPU state anyway. + +Function names follow the pattern: + +load: ``cpu_ld{sign}{size}_data(env, ptr)`` + +store: ``cpu_st{size}_data(env, ptr, val)`` + +``sign`` + - (empty) : for 32 or 64 bit sizes + - ``u`` : unsigned + - ``s`` : signed + +``size`` + - ``b`` : 8 bits + - ``w`` : 16 bits + - ``l`` : 32 bits + - ``q`` : 64 bits Regexes for git grep - - ``\`` - - ``\`` + - ``\`` + - ``\`` -``helper_*_{ld,st}*mmu`` -~~~~~~~~~~~~~~~~~~~~~~~~ +``cpu_ld*_code`` +~~~~~~~~~~~~~~~~ + +These functions perform a read for instruction execution. The ``mmuidx`` +parameter is taken from the current mode of the guest CPU, as determined +by ``cpu_mmu_index(env, true)``. The ``retaddr`` parameter is 0, and +thus does not unwind guest CPU state, because CPU state is always +synchronized while translating instructions. Any guest CPU exception +that is raised will indicate an instruction execution fault rather than +a data read fault. + +In general these functions should not be used directly during translation. +There are wrapper functions that are to be used which also take care of +plugins for tracing. + +Function names follow the pattern: + +load: ``cpu_ld{sign}{size}_code(env, ptr)`` + +``sign`` + - (empty) : for 32 or 64 bit sizes + - ``u`` : unsigned + - ``s`` : signed + +``size`` + - ``b`` : 8 bits + - ``w`` : 16 bits + - ``l`` : 32 bits + - ``q`` : 64 bits + +Regexes for git grep: + - ``\`` + +``translator_ld*`` +~~~~~~~~~~~~~~~~~~ + +These functions are a wrapper for ``cpu_ld*_code`` which also perform +any actions required by any tracing plugins. They are only to be +called during the translator callback ``translate_insn``. + +There is a set of functions ending in ``_swap`` which, if the parameter +is true, returns the value in the endianness that is the reverse of +the guest native endianness, as determined by ``TARGET_WORDS_BIGENDIAN``. + +Function names follow the pattern: + +load: ``translator_ld{sign}{size}(env, ptr)`` + +swap: ``translator_ld{sign}{size}_swap(env, ptr, swap)`` + +``sign`` + - (empty) : for 32 or 64 bit sizes + - ``u`` : unsigned + - ``s`` : signed + +``size`` + - ``b`` : 8 bits + - ``w`` : 16 bits + - ``l`` : 32 bits + - ``q`` : 64 bits + +Regexes for git grep + - ``\`` + +``helper_*_{ld,st}*_mmu`` +~~~~~~~~~~~~~~~~~~~~~~~~~ These functions are intended primarily to be called by the code generated by the TCG backend. They may also be called by target -CPU helper function code. Like the ``cpu_{ld,st}_*_ra`` functions -they perform accesses by guest virtual address; the difference is -that these functions allow you to specify an ``opindex`` parameter -which encodes (among other things) the mmu index to use for the -access. This is necessary if your helper needs to make an access -via a specific mmu index (for instance, an "always as non-privileged" -access) rather than using the default mmu index for the current state -of the guest CPU. +CPU helper function code. Like the ``cpu_{ld,st}_mmuidx_ra`` functions +they perform accesses by guest virtual address, with a given ``mmuidx``. -The ``opindex`` parameter should be created by calling ``make_memop_idx()``. +These functions specify an ``opindex`` parameter which encodes +(among other things) the mmu index to use for the access. This parameter +should be created by calling ``make_memop_idx()``. The ``retaddr`` parameter should be the result of GETPC() called directly from the top level HELPER(foo) function (or 0 if no guest CPU state @@ -166,8 +264,9 @@ unwinding is required). **TODO** The names of these functions are a bit odd for historical reasons because they were originally expected to be called only from -within generated code. We should rename them to bring them -more in line with the other memory access functions. +within generated code. We should rename them to bring them more in +line with the other memory access functions. The explicit endianness +is the only feature they have beyond ``*_mmuidx_ra``. load: ``helper_{endian}_ld{sign}{size}_mmu(env, addr, opindex, retaddr)`` From patchwork Sat Dec 28 23:11:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182519 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4649588ild; Sat, 28 Dec 2019 15:25:57 -0800 (PST) X-Google-Smtp-Source: APXvYqwvqRedgAyQ2Qpm3UACRZw3opLwNYiI+EUwwx/UCD2I4gQT3/RsWytuW23BomNF/zjBgQz1 X-Received: by 2002:a05:6830:1f89:: with SMTP id v9mr62054887otr.90.1577575556986; Sat, 28 Dec 2019 15:25:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575556; cv=none; d=google.com; s=arc-20160816; b=U0wEHtP9U9+lT58/LKEfTvUcRUaLHgRD7SsyWhRIFmjIIXRSWE0Dw8u3eJQLWMIc8T CVp0A72rVWz5EK27p7h6CFyb9idQyVS5DeFzCXRLS57mZ1oXLeg2xLvqlbaDn9C1+AFR SiXFrUuU/yOvmoYtZNpCTO15CgqHIJAoS1FGfR1CWM5TtD2G/c/NBd9ppz6rxo0cAKYL MwNq8tMJSQSjDNIwNltok894Icpbrdi67ugD3VPnZv2fnyimcUQKHDTHjYqlFAbwCKn6 iuRHxq8w9XMioqvMXQcnJqFoTQkFlYfIWiVE8ncj94B2X0sC4hRfmfzsKpBCnlTsM++C bzQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ldCBPIWc8mhUIrG4FNbVFhLO4ifRLpZg7PBUswXT7Cc=; b=BWbq9sPDHUm8Rq1pdDjRRLg9Lw6W5hQk/8tE3pllkc9iSXC1s6wpCLBOpUD/6AO8gz OAukBYkkntmlN749fPw62O5ivbtuG8RTQaDcIhJMFz7eg4ZjAjAGobOBeOMYs9q+E42i VrshbmE0hMdZyR+AwDLjA36HvLXydUD2kcKxuNRM22FoD2ER8BZDiPkGONim7ZS6y3ck 8knN1CqaTuKCer2la8d0Gpgany0O60hHkuiQd6iP91rtlqGrC4Web3XooVAstqklY44g vpsLr91FqZQlCKFZEPu0ApjFtTV4IIwQ6XqJU0ou9lgGTAvE07b5rFJyi6OuOTy75DsY 3SXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=rAvUPbul; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:13 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 14/29] target/i386: Use cpu_*_mmuidx_ra instead of templates Date: Sun, 29 Dec 2019 10:11:09 +1100 Message-Id: <20191228231124.18307-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , Eduardo Habkost Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not use exec/cpu_ldst_{,useronly_}template.h directly, but instead use the functional interface. Cc: Eduardo Habkost Acked-by: Paolo Bonzini Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/i386/seg_helper.c | 56 ++++++++++++++++++++-------------------- 1 file changed, 28 insertions(+), 28 deletions(-) -- 2.20.1 diff --git a/target/i386/seg_helper.c b/target/i386/seg_helper.c index 87a627f9dc..b96de068ca 100644 --- a/target/i386/seg_helper.c +++ b/target/i386/seg_helper.c @@ -37,37 +37,37 @@ # define LOG_PCALL_STATE(cpu) do { } while (0) #endif -#ifdef CONFIG_USER_ONLY -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" +/* + * TODO: Convert callers to compute cpu_mmu_index_kernel once + * and use *_mmuidx_ra directly. + */ +#define cpu_ldub_kernel_ra(e, p, r) \ + cpu_ldub_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) +#define cpu_lduw_kernel_ra(e, p, r) \ + cpu_lduw_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) +#define cpu_ldl_kernel_ra(e, p, r) \ + cpu_ldl_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) +#define cpu_ldq_kernel_ra(e, p, r) \ + cpu_ldq_mmuidx_ra(e, p, cpu_mmu_index_kernel(e), r) -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" +#define cpu_stb_kernel_ra(e, p, v, r) \ + cpu_stb_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) +#define cpu_stw_kernel_ra(e, p, v, r) \ + cpu_stw_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) +#define cpu_stl_kernel_ra(e, p, v, r) \ + cpu_stl_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) +#define cpu_stq_kernel_ra(e, p, v, r) \ + cpu_stq_mmuidx_ra(e, p, v, cpu_mmu_index_kernel(e), r) -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" +#define cpu_ldub_kernel(e, p) cpu_ldub_kernel_ra(e, p, 0) +#define cpu_lduw_kernel(e, p) cpu_lduw_kernel_ra(e, p, 0) +#define cpu_ldl_kernel(e, p) cpu_ldl_kernel_ra(e, p, 0) +#define cpu_ldq_kernel(e, p) cpu_ldq_kernel_ra(e, p, 0) -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX -#else -#define CPU_MMU_INDEX (cpu_mmu_index_kernel(env)) -#define MEMSUFFIX _kernel -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif +#define cpu_stb_kernel(e, p, v) cpu_stb_kernel_ra(e, p, v, 0) +#define cpu_stw_kernel(e, p, v) cpu_stw_kernel_ra(e, p, v, 0) +#define cpu_stl_kernel(e, p, v) cpu_stl_kernel_ra(e, p, v, 0) +#define cpu_stq_kernel(e, p, v) cpu_stq_kernel_ra(e, p, v, 0) /* return non zero if error */ static inline int load_segment_ra(CPUX86State *env, uint32_t *e1_ptr, From patchwork Sat Dec 28 23:11:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182512 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4646043ild; Sat, 28 Dec 2019 15:21:01 -0800 (PST) X-Google-Smtp-Source: APXvYqwdMCseFm2R5qP9sf8XjCSy0qhbvhZsw/qvkU1oFc/GlI7VGM8Y3I38Gxim9pb83Nqkmjzn X-Received: by 2002:a9d:5c1:: with SMTP id 59mr66314862otd.192.1577575261057; Sat, 28 Dec 2019 15:21:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575261; cv=none; d=google.com; s=arc-20160816; b=pCo8NTyUTcIHbS4lVxQAESIR1wZrDbITNenwPuuLJ6ngQ7eY1sglE3s14Z/Uh29atj 5oKcePf13rY7T8epbSJbCMkFp3+qYsKaBQV5R8TANkf5zUeu7XK81qSFL4z6re6F9M4R X4aE0hbsSE0x5O7qBmGX0Bn1F/ziGSSGJHmUOJrDCg5Cn7yw5bPg4Pfmwn7VAP/1UofK dpuvWIlbSUU8TQIdWK0ZYgiIe/l2EYMiCA/5/LCAp7gr6H/FSzODA+83V6YGZcQQXyEC nkKjGapHzea+xUKuyDwQ+RNsyiud0ZzY67hmjv0+seCG/r22xJXNWv0uh9oYJjiYgeul LZMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ECuZS7xLaZaQnVhvvqkXHoqw1lSzDUCLtHyHOIktlBg=; b=u8R/ZKgHcfOqVLCH+WxEnTcFORDPvMD97pmmPLJPRasvtlhp7PgVW3Llsd2PehNFLh KsW5T/5+RFQwd9JsKy57AeMEUVtaDNltWxYlZeY5NcHYg1xHm9zQRH383G4ADX4ePjPn WDQ9eYQ9sqOwtNN4eyVYMopMqAyabuhDknUeSfL1XQhCEOFJkI0ixVNRfzxNUugAn1MM l7suCQvWg2adTBU39n1ds9fJRrLUF4dcBxCXcJ1sOXG1soidyo/UXaRzTxWGRgEjAYwS SD6LVjEx45JBSDIRFLuFnfQbiBO/2enoBSqXpfT/c8eFNI7GcsLqiKp4zzekslONa64D VkEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UnWhZeIr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 15/29] cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c Date: Sun, 29 Dec 2019 10:11:10 +1100 Message-Id: <20191228231124.18307-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1042 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" With the tracing hooks, the inline functions are no longer so simple. Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 54 +++-- include/exec/cpu_ldst_useronly_template.h | 159 --------------- accel/tcg/user-exec.c | 236 ++++++++++++++++++++++ 3 files changed, 262 insertions(+), 187 deletions(-) delete mode 100644 include/exec/cpu_ldst_useronly_template.h -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 41b98ba801..0f3c49a005 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -120,35 +120,33 @@ static inline void clear_helper_retaddr(void) /* In user-only mode we provide only the _code and _data accessors. */ -#define MEMSUFFIX _data -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" +uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); +uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr); +uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr); +uint64_t cpu_ldq_data(CPUArchState *env, abi_ptr ptr); +int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); +int cpu_ldsw_data(CPUArchState *env, abi_ptr ptr); -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" +uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint32_t cpu_lduw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint32_t cpu_ldl_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +uint64_t cpu_ldq_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); +int cpu_ldsw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr); -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" +void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stw_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stl_data(CPUArchState *env, abi_ptr ptr, uint32_t val); +void cpu_stq_data(CPUArchState *env, abi_ptr ptr, uint64_t val); -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX - -#define MEMSUFFIX _code -#define CODE_ACCESS -#define DATA_SIZE 1 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_useronly_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_useronly_template.h" -#undef MEMSUFFIX -#undef CODE_ACCESS +void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stw_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr); +void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, + uint64_t val, uintptr_t retaddr); /* * Provide the same *_mmuidx_ra interface as for softmmu. @@ -520,6 +518,8 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, #undef CPU_MMU_INDEX #undef MEMSUFFIX +#endif /* defined(CONFIG_USER_ONLY) */ + uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr addr); uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr addr); @@ -535,8 +535,6 @@ static inline int cpu_ldsw_code(CPUArchState *env, abi_ptr addr) return (int16_t)cpu_lduw_code(env, addr); } -#endif /* defined(CONFIG_USER_ONLY) */ - /** * tlb_vaddr_to_host: * @env: CPUArchState diff --git a/include/exec/cpu_ldst_useronly_template.h b/include/exec/cpu_ldst_useronly_template.h deleted file mode 100644 index e5a3d1983a..0000000000 --- a/include/exec/cpu_ldst_useronly_template.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * User-only accessor function support - * - * Generate inline load/store functions for one data size. - * - * Generate a store function as well as signed and unsigned loads. - * - * Not used directly but included from cpu_ldst.h. - * - * Copyright (c) 2015 Linaro Limited - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#if !defined(CODE_ACCESS) -#include "trace-root.h" -#endif - -#include "trace/mem.h" - -#if DATA_SIZE == 8 -#define SUFFIX q -#define USUFFIX q -#define DATA_TYPE uint64_t -#define SHIFT 3 -#elif DATA_SIZE == 4 -#define SUFFIX l -#define USUFFIX l -#define DATA_TYPE uint32_t -#define SHIFT 2 -#elif DATA_SIZE == 2 -#define SUFFIX w -#define USUFFIX uw -#define DATA_TYPE uint16_t -#define DATA_STYPE int16_t -#define SHIFT 1 -#elif DATA_SIZE == 1 -#define SUFFIX b -#define USUFFIX ub -#define DATA_TYPE uint8_t -#define DATA_STYPE int8_t -#define SHIFT 0 -#else -#error unsupported data size -#endif - -#if DATA_SIZE == 8 -#define RES_TYPE uint64_t -#else -#define RES_TYPE uint32_t -#endif - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) -{ - RES_TYPE ret; -#ifdef CODE_ACCESS - set_helper_retaddr(1); - ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); - clear_helper_retaddr(); -#else - MemOp op = MO_TE | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - ret = glue(glue(ld, USUFFIX), _p)(g2h(ptr)); -#endif - return ret; -} - -#ifndef CODE_ACCESS -static inline RES_TYPE -glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - uintptr_t retaddr) -{ - RES_TYPE ret; - set_helper_retaddr(retaddr); - ret = glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(env, ptr); - clear_helper_retaddr(); - return ret; -} -#endif - -#if DATA_SIZE <= 2 -static inline int -glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr) -{ - int ret; -#ifdef CODE_ACCESS - set_helper_retaddr(1); - ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); - clear_helper_retaddr(); -#else - MemOp op = MO_TE | MO_SIGN | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, false); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - ret = glue(glue(lds, SUFFIX), _p)(g2h(ptr)); - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -#endif - return ret; -} - -#ifndef CODE_ACCESS -static inline int -glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - uintptr_t retaddr) -{ - int ret; - set_helper_retaddr(retaddr); - ret = glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(env, ptr); - clear_helper_retaddr(); - return ret; -} -#endif /* CODE_ACCESS */ -#endif /* DATA_SIZE <= 2 */ - -#ifndef CODE_ACCESS -static inline void -glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, abi_ptr ptr, - RES_TYPE v) -{ - MemOp op = MO_TE | SHIFT; - uint16_t meminfo = trace_mem_get_info(op, MMU_USER_IDX, true); - trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); - glue(glue(st, SUFFIX), _p)(g2h(ptr), v); - qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); -} - -static inline void -glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - abi_ptr ptr, - RES_TYPE v, - uintptr_t retaddr) -{ - set_helper_retaddr(retaddr); - glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(env, ptr, v); - clear_helper_retaddr(); -} -#endif - -#undef RES_TYPE -#undef DATA_TYPE -#undef DATA_STYPE -#undef SUFFIX -#undef USUFFIX -#undef DATA_SIZE -#undef SHIFT diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index b09f7a1577..79da4219bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -26,6 +26,8 @@ #include "translate-all.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" +#include "trace-root.h" +#include "trace/mem.h" #undef EAX #undef ECX @@ -734,6 +736,240 @@ int cpu_signal_handler(int host_signum, void *pinfo, /* The softmmu versions of these helpers are in cputlb.c. */ +uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldub_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr) +{ + int ret; + uint16_t meminfo = trace_mem_get_info(MO_SB, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldsb_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEUW, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = lduw_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +int cpu_ldsw_data(CPUArchState *env, abi_ptr ptr) +{ + int ret; + uint16_t meminfo = trace_mem_get_info(MO_TESW, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldsw_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEUL, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldl_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint64_t cpu_ldq_data(CPUArchState *env, abi_ptr ptr) +{ + uint64_t ret; + uint16_t meminfo = trace_mem_get_info(MO_TEQ, MMU_USER_IDX, false); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + ret = ldq_p(g2h(ptr)); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); + return ret; +} + +uint32_t cpu_ldub_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldub_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +int cpu_ldsb_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + int ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldsb_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_lduw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_lduw_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +int cpu_ldsw_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + int ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldsw_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_ldl_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint32_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldl_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +uint64_t cpu_ldq_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr) +{ + uint64_t ret; + + set_helper_retaddr(retaddr); + ret = cpu_ldq_data(env, ptr); + clear_helper_retaddr(); + return ret; +} + +void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stb_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stw_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEUW, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stw_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stl_data(CPUArchState *env, abi_ptr ptr, uint32_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEUL, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stl_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stq_data(CPUArchState *env, abi_ptr ptr, uint64_t val) +{ + uint16_t meminfo = trace_mem_get_info(MO_TEQ, MMU_USER_IDX, true); + + trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo); + stq_p(g2h(ptr), val); + qemu_plugin_vcpu_mem_cb(env_cpu(env), ptr, meminfo); +} + +void cpu_stb_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stb_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stw_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stw_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, + uint32_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stl_data(env, ptr, val); + clear_helper_retaddr(); +} + +void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, + uint64_t val, uintptr_t retaddr) +{ + set_helper_retaddr(retaddr); + cpu_stq_data(env, ptr, val); + clear_helper_retaddr(); +} + +uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = ldub_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_lduw_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = lduw_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint32_t cpu_ldl_code(CPUArchState *env, abi_ptr ptr) +{ + uint32_t ret; + + set_helper_retaddr(1); + ret = ldl_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + +uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) +{ + uint64_t ret; + + set_helper_retaddr(1); + ret = ldq_p(g2h(ptr)); + clear_helper_retaddr(); + return ret; +} + /* Do not allow unaligned operations to proceed. Return the host address. */ static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr, int size, uintptr_t retaddr) From patchwork Sat Dec 28 23:11:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182508 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4643766ild; Sat, 28 Dec 2019 15:17:49 -0800 (PST) X-Google-Smtp-Source: APXvYqxJVfz2xEMQ5pRdt+xcX1itBw2kpteF6fNA7t2nN7I+H9y7PL1NAvRQ/uNoP/jbjB94UGYe X-Received: by 2002:ac8:3490:: with SMTP id w16mr42445355qtb.56.1577575069578; Sat, 28 Dec 2019 15:17:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575069; cv=none; d=google.com; s=arc-20160816; b=zNErKDKB2V94M9913xj61Q6hR+gB6mOWcNSbUclXaVNfWIizUpJWM9K3s5g+Uzi/E0 rCPH37bMxYZmbJCXEy8Le2p7i6c9BRYwoDQGNDOpAQfqFJ7HTCivuj2lnD/dr7JF832G EkJ1Bxwqglv7vyutkSyGxqvVJHPI6NTi5T8RpsNxuvS+Um3+0h2CJVjBcLQegS1D+sb1 gtU2Ke56E4j1bF8Zane/69BLyW3VBNjBkyGKGtfhttDZAStl4kSej8w44yRtWg9qaeqW NGn0JF/7a84QNmOBv5PAVzN0ffL2wmqJvhDGFcsFAfRiC/weA5NaLHMW9/sc9YlfWbF7 ZNUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=JNBmm1sV0HQlIuj50EfP42qQQdAOa/hMzuJfrSMg+C0=; b=ymG5a+rAmLDJ+IAB0RVsBywXc8V4i/VsQKT7d8W7o59H+PjJkjiZk4FQUB42jkAHBD 7XzJpv8RVBZ9FpgmxWgMz91yZrBnWMH7sOvgwY7BgqyEQT1CVSheKP/3vBDKgkHzJybE unvv3Ryru/j2BTUAoEnFKoeHYnUp14SBsOVQ4RLPBVAn6uUWPFS1CfClZvyd7KKYU+lE o0hoJXmDlmoEr5El0X9EVdbNQTgcOIO2G4ThmvG0Yuv50REwkxzGazbOsevIkKzCN7Iw tTvlb5CZokVAhfY+4k/gQmRuektYDvbu4D1SWiArkafkYptsADi24dnu9ZcTf6/dSt9v JrTA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Q0KV8V8G; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:18 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 16/29] target/nios2: Remove MMU_MODE{0,1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:11 +1100 Message-Id: <20191228231124.18307-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Chris Wulff , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Chris Wulff Cc: Marek Vasut Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/nios2/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 361b06ffeb..78f633f970 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -217,8 +217,6 @@ void do_nios2_semihosting(CPUNios2State *env); #define CPU_SAVE_VERSION 1 /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_SUPERVISOR_IDX 0 #define MMU_USER_IDX 1 From patchwork Sat Dec 28 23:11:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182522 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4651216ild; Sat, 28 Dec 2019 15:28:08 -0800 (PST) X-Google-Smtp-Source: APXvYqwh/ATrQsidozVjjlAltYojcutHGRYl1RBEBUIQZ8snmugv2e+fBvY5PLwAfDwpYPLfM7WB X-Received: by 2002:a05:6830:1116:: with SMTP id w22mr66533892otq.216.1577575688529; Sat, 28 Dec 2019 15:28:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575688; cv=none; d=google.com; s=arc-20160816; b=dU1CCu+I8iDDH14oCI7FsyCgttnmpm+jG4qMKqoP0r8tPQhsHmqoPAH377RLLJOIk1 BkWbmBh9F1QsUh+QFIihCrX/i03voIfh5JoNtTdwDb+08DZZPrDhDenOUGb/v+X5uf+P Ng7YIo21TiaQihME1NISkXSLLhFOU5B8SUpc7+VxNWhWTxbP+bmRmFJ6AkXC8GsCK4lu 0Y7DBzkOyR7SsVeT7LMVekd0Vtwg4Y5O+sGUf3DpQouOLj03637mp6/fObtWpgj0k/dF lpom4NmhpbAKAAS5zBh186MLhe2miRSkl08WQp9wnvMdXJBsrvu0eiaKVVoHrt1rep2k Crow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=AQUbSMGriz8m3G7gAjD+hihq1leqiu0aK6HEuqeV1mk=; b=dyfqLL+Rb3WoUyoSr4bPyvNScV/Kkf2RxXyTK9TJsSsepda3X/HH8tKZPQ246kbFkS A6B6Z7aNxruL/L/BQf83kXtQvekX2ReTf8v9b7YTeJuwNbaIx5ftaEvcQuv6UqOlg8xt OE+DKtWS96yFJ6A/a0cLm1QQkLlOBg+rWwB0JhAVITp6FCrj+yE8JdyyZCo6d53CXkP4 fBuxrPAn6NkaCbGKROJ+AaRksZUGufBFHwYslTs5QCWXkgpgLm/IVXuJvv/3govzjc81 noFFeVCT7NSjauKDQWSB2O9C0qkT3ZvVLRN1t0A3x7IT7MtD/DBsCIq2Yx5D8ERtdYBP M8tg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=tZ3JmEQr; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:21 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 17/29] target/alpha: Remove MMU_MODE{0,1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:12 +1100 Message-Id: <20191228231124.18307-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/alpha/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index a530249a5b..3f782c0efe 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -193,8 +193,6 @@ enum { PALcode cheats and usees the KSEG mapping for its code+data rather than physical addresses. */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_KERNEL_IDX 0 #define MMU_USER_IDX 1 #define MMU_PHYS_IDX 2 From patchwork Sat Dec 28 23:11:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182510 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4644256ild; Sat, 28 Dec 2019 15:18:32 -0800 (PST) X-Google-Smtp-Source: APXvYqzUeCq9+1tU6IisDljzU7aOdvJzZmuDIPMOp9Sh4U8kj8FdvjCPAgjimHrfjxnaN+yjNQog X-Received: by 2002:ac8:41c1:: with SMTP id o1mr28975937qtm.229.1577575112677; Sat, 28 Dec 2019 15:18:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575112; cv=none; d=google.com; s=arc-20160816; b=0zv4aSkhLpcFN9xxKClCSH1E74FrkhRiJEjSfR3tVobLCW9XT93tFdSl1p2g+bO+kj MmBS+M7bnXlDK4VQkDdh0/eKx8SPjqwfhMT7CVeF08gRtXNcfr9HxNsbL/wawqAfnaPM +6C6yCHH5PIzMA3lK5B/+MNb4Cqd0NCEUTHKIynkcCf9Nermq/cSLywAYdQuYchee5pg x/5Tkhm/l720DuxlU3mOwGYnBsnjh+tZLvf7sXHB/+clIXLieauKvLy2cOIrYY/115jI NWXQnoRjXc73Maif0dtkpCABMdv5yUYBzPGtAypgx0EWgaoPkUg2eqj5DbzIjCaOXysz dA+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=RE7ec3tQf69S6u/1sbXcwZ3prYFhHBLumgiHfSGx76I=; b=onqLMSC8NQ4U6eAT3H6my3W0nHB3fIthIuWa7WPQ8IiVWPl7/d/ist7gHgWnTcKrIH THU+GaRYop9oEenGU0m0sCUq8NK6x0bplp5IC+jI6/iNXy7C1syloBBcvNL+NOft4lRz p+eaXZYsLfWSxTDIxNKrAIlVmhMzlUnmxe8gr8RXpVAr9cktDLi9sW9Lt+sXnykrO6GX zYFalUHoowx4SoS8gAl9Cx5ipF0dvm9ykovvryfIGI90aJYs1Jwc0cUCptwHaq9QTAWD cZZQxRfgs+6fNOuQSfzgCUwVjZYX6MwR7zwP0M1HxNaVnsJf3E5SzvWxbTzrTm+ypxWA xmzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j2nNpB8P; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:23 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 18/29] target/cris: Remove MMU_MODE{0,1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:13 +1100 Message-Id: <20191228231124.18307-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Edgar E. Iglesias Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/cris/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/cris/cpu.h b/target/cris/cpu.h index aba0a66474..bc43bc23a1 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -252,8 +252,6 @@ enum { #define cpu_signal_handler cpu_cris_signal_handler /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch) { From patchwork Sat Dec 28 23:11:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182525 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4652720ild; Sat, 28 Dec 2019 15:30:05 -0800 (PST) X-Google-Smtp-Source: APXvYqznR9Q1Z4WRhnNHlRSfon7S1R9/PBSj4iQI3xSi6SlKEFy3G55nL5salQNLLq1r1JiJidb0 X-Received: by 2002:a05:6214:3e7:: with SMTP id cf7mr45252795qvb.129.1577575805761; Sat, 28 Dec 2019 15:30:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575805; cv=none; d=google.com; s=arc-20160816; b=LEtmc1APnqnepFubBMINjrIMIiympiEvqqDt+GokzLAaEAUmZMPFR7VYCXSroUVCHC OFkBy07Zooc1FiXsnY2qfu0yae7TCu5NGB/Wct8qbxrP99LjCPJLlzz+LBc4Pxl4jrBf AX5zQZ+syvwekSlwxleT/hUBLkMgGqKweNqBbhLxvWXEbllrArDsfMOpi4nIygfIdkRa BlIt06L57u3Ud7zoAeweIGbuieq2i/QI5+FCDyMf6MniKeDMsjMo/2HbAUAzhcA2mcqJ XQ+u73fHR/IoY/fN9fndKs2zoDQ6WpURjv9mUqSnx+9zo/BqhWqkl8FDnVKFKX7ezsdG sFQQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=s2sFyKQc0KML7nsHeLOyCy6ccvVe4EAb+zDftLMFs6Y=; b=WOUEIk6WOV9j22Azuj+gCMF6HShRYJxaF2PJ+VGU/Q/U63trLicJWM6w/lGXQaB6/x IAlUTZNe4Y9k1umu5Et6H3HGNJp5Z39pvalo0sGhKsS4szITFgtiBieEDrUJGaqY9k3p V6qa6ayjDHgP6jzl6LYVpfFDmQ6leMJQCPws52Q6Ppy2swMv8DOH/NhjSnvkIDcrO1ns jRzechYTkmjKkBVQG84ToxqeOruFLPbemeB6Ijbj5IzK+e7J4/lheH4cN49O8MJ6C4BO vdZghXAq7BP2SctllxvNV1CzomjtOrgWKq/1tWR2XEwA6LnL7HakYdz3QbIpFUici/il hO0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="qj/EJkKi"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 19/29] target/i386: Remove MMU_MODE{0,1,2}_SUFFIX Date: Sun, 29 Dec 2019 10:11:14 +1100 Message-Id: <20191228231124.18307-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::642 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , Eduardo Habkost Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Eduardo Habkost Acked-by: Paolo Bonzini Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/i386/cpu.h | 3 --- 1 file changed, 3 deletions(-) -- 2.20.1 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index af282936a7..1b4b90556c 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1952,9 +1952,6 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define cpu_list x86_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _ksmap -#define MMU_MODE1_SUFFIX _user -#define MMU_MODE2_SUFFIX _knosmap /* SMAP disabled or CPL<3 && AC=1 */ #define MMU_KSMAP_IDX 0 #define MMU_USER_IDX 1 #define MMU_KNOSMAP_IDX 2 From patchwork Sat Dec 28 23:11:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182526 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4654439ild; Sat, 28 Dec 2019 15:32:00 -0800 (PST) X-Google-Smtp-Source: APXvYqyDcskw4ufR/0cd8oQMcHOkSN2VZBSQDkWrlxdGSQECh0oSPmC+XtLDjxQ6aY1iDCYSSsd3 X-Received: by 2002:a05:6830:13d9:: with SMTP id e25mr63241543otq.134.1577575920537; Sat, 28 Dec 2019 15:32:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575920; cv=none; d=google.com; s=arc-20160816; b=AeVg1dJ4lQEAKGk1hFtWa39qIh0CIbnAwdNptlkks0hcvVtgQ3L6YOd1bgI8O4KURS e7A/3ZZZJyPH026akYwsJl3OVYz0Kp4aNbeAgIBSSxSdt5bDUszffB+m0k0IlLLWif+J /CPWnKalOVcZPoIoQ9UIcH4B2K6dWQGYHqcpNxnlwx0Mh2do/bLkhwfdBFZ0dZNpxj3H rY46OLyuQGr3v0zVAWOVLX8fPauoP1mVlyXXsWeEgG82c24eXNZq3TBY1i7OurazPp0a fC1XIntkhtqNCyFQLZ81WZ+jFYO1hETood1jnn4/kjNLloumpXlRK+4EEx5OFbkxLu8N SvJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=nAc6bZFMh5Y6eraePuEkGsT4LHqoTY3CFOaKZXGiiQo=; b=u3+rPZMU8yGxWchiC5fN8YQvi3DVoNqO9j2jScQRcPPF+mFBrdXSzUZKKn0gAZP1rp IjevCRK6aExJEfQs4mBLLWaBA7vU2vnFIVA1XAKz7lDCemAvCfo6Wor1tZTPuFJdz4r3 NIPlCjWtYIod1t1MZwCoD9toFvk+uod3n3t+t0xinWegJ3VN/wP4JEiWmpHNPZlmqq5+ PuPl9K4EobicPH0Jq+2P9nj6RruSn3KJ7VZxjs20nFVoqqKn7Fmih1VZjDPK4QBrgJZf 2BxhE7Si9MB/p5euVE2P0mI9klZyLsGu5fNsBdMbJfd5x1N9m6NgStnBn3ypIuHKns/1 +KtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WQD077Tl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 20/29] target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX Date: Sun, 29 Dec 2019 10:11:15 +1100 Message-Id: <20191228231124.18307-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Edgar E. Iglesias Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/microblaze/cpu.h | 3 --- 1 file changed, 3 deletions(-) -- 2.20.1 diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 95773089aa..32522f606b 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -328,9 +328,6 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define cpu_signal_handler cpu_mb_signal_handler /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _nommu -#define MMU_MODE1_SUFFIX _kernel -#define MMU_MODE2_SUFFIX _user #define MMU_NOMMU_IDX 0 #define MMU_KERNEL_IDX 1 #define MMU_USER_IDX 2 From patchwork Sat Dec 28 23:11:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182521 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4650982ild; Sat, 28 Dec 2019 15:27:54 -0800 (PST) X-Google-Smtp-Source: APXvYqy7Wi6QjE+a1ODuWWDP7YGHbRZbQnuHYhbaXAEHVpt9rLI0rWxp7Sm03sUC/sv6L4XPmH2k X-Received: by 2002:a9d:7e8a:: with SMTP id m10mr62070492otp.27.1577575674801; Sat, 28 Dec 2019 15:27:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575674; cv=none; d=google.com; s=arc-20160816; b=r6FxBsNAmBwrENWj/y1z5/nGomgyZ58sXb+YMC0uCMJy768JbMtChMQmHmVUvYccER AKvK7J5r2lEj6w2hZvzhZCcUFtdSHhowcFE7YfGKsMJpPQpnRsfMr5wwWEPxzaikQvpx PdEQBev4b040DSMvKvyV/2F5mNrzNFT8IIqfkWF325OT1mueAvkOjJcxaadXDBoroJjK PFZ9zCbc6wRgLlldu6lG3BJD2LkyW8jKtXte3hulA7RPHVL1E075DI/GebHUV1kocIlf 5TKgmyQ5cnO9ZmjgqJRr4mnrI6WhoLA3MIZ59Uv49IoYL7N2cWaTmgwjGJqwjgUePfMX 92Hw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=YdXEJZRP1IFp2O0duDOqWUbcJqfKg7Q1OugwBf6nt/k=; b=nbUbyt0zlYhVZqL6jVk4V8lwjrUrvujNTxIuuh7u27RcluV54JpNJyKHcdh0CoqGM8 ESyMqsgJwmtr7zB51B6sbMwvaLbhrH+LvZr3WdjXWmmh3OxjtfKFzQB7iUIyxDGCRMIn edLau8sCR9jtJ2H7+1jkUa+7q1hWaCu3RxjHDqM/RAWuEuFpyBzKzjX0+ld9wh5nwTg0 nsbbPT6p3OnQOpBd2ZWAEzjx2XJeDX6CWUnj/ojoVl+07F3n0pl6M8LM0E0hFVyNt2/e XuRfwbG65LSFgXSG9nxW7smzA0fqnhkXYxZh2YXkJ4bXHS1rIuE1ricEKdy/Dfj1xPVs fsXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=t1ZCVm39; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:32 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 21/29] target/sh4: Remove MMU_MODE{0,1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:16 +1100 Message-Id: <20191228231124.18307-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Aurelien Jarno Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index ecaa7a18a9..452a596e67 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -254,8 +254,6 @@ void cpu_load_tlb(CPUSH4State * env); #define cpu_list sh4_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch) { From patchwork Sat Dec 28 23:11:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182514 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4646409ild; Sat, 28 Dec 2019 15:21:27 -0800 (PST) X-Google-Smtp-Source: APXvYqwUqNmPIn5E+izc1XJ25V9cFekiSADMy+d0oJ71mllNH49O7JKqkqAdSc7/lkT4e/TAk+xE X-Received: by 2002:a9d:7342:: with SMTP id l2mr65619159otk.98.1577575287622; Sat, 28 Dec 2019 15:21:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575287; cv=none; d=google.com; s=arc-20160816; b=SGm7/fDECmI6x8skjWyVC9mI4AN7osKgtBC36llnqBpCh28Zpu0kDOeNxr75jJVXWw srY9k2L+nghUAcOMOq7HFiKoTo4qWDFvivHcvgSKG8zaFU12fY8n8oaX8q78I2NZ80FH DUIrEf1XdH+2jxoGTAtnezg+z40cj7LfOAmKlf+QkiOHXSl3HL8imxsKj3rp8vSzuxNh 63zX21d811QlZZbx3DuAzAGmp+qTyQYXdOuRQkNrNh1STyRMi6aR6D+JsLOXi9QH766J m3K/vK/Wlf6tD7VoUmAq6AeUvUUAomZgKrtHgYr7m7PCle26/avhJWqN3a7uI55LSr0+ 5jMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=lItfuMC+44mOHKIMDg46S+jTWfWeuHiIELhnH02jZNM=; b=AHBLps76D+2ILNOsWjr6BIjIeUa05lqMf5Lpf/ssfrLIXFH3eEnH07SjjfoLhyMlks MgX4yICYzWdQ/jjdxItvvKnXEV5BmUV525mibQAxrHN+NqxQpt/cqWev7nASSKxO84hR zqt435ZOBkrTfIH1ye/806+37Rt4gjkv9V9JOZfoMOh8Nl4n+L3rm4BznZJg7/yrrMQk 7iacQ2p1zZBuSkjyGzpewg/nb3uWP/zNR7MZJthlfcFnsHQscOErDUDUXigonEtTClGK o2GLMl9MAOgV4A9oS3nTG0BWim71C6XZrxIzgSMc9m2/bvDpesX1PFmHwSeW2AwnT7UG PsLw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FfLv4Yto; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 22/29] target/unicore32: Remove MMU_MODE{0,1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:17 +1100 Message-Id: <20191228231124.18307-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::644 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Guan Xuetao , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Cc: Guan Xuetao Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/unicore32/cpu.h | 2 -- 1 file changed, 2 deletions(-) -- 2.20.1 diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 50ed9dd99c..7a32e086ed 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -133,8 +133,6 @@ void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask) int uc32_cpu_signal_handler(int host_signum, void *pinfo, void *puc); /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_USER_IDX 1 static inline int cpu_mmu_index(CPUUniCore32State *env, bool ifetch) { From patchwork Sat Dec 28 23:11:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182524 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4652542ild; Sat, 28 Dec 2019 15:29:47 -0800 (PST) X-Google-Smtp-Source: APXvYqwDkxT2u0kdI23BUyegJQgB4nWLrQ2G9ClfCDOYTRZpQClxCOgblEyrqsPWIo3JnGF3Fh+5 X-Received: by 2002:a05:6214:bc5:: with SMTP id ff5mr45243866qvb.31.1577575787873; Sat, 28 Dec 2019 15:29:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575787; cv=none; d=google.com; s=arc-20160816; b=O3pZZ/a4UrK20NLRXEcpAzrAT3knh42hXaD5tFl9fZpPR5MGdobhYuGf4cpnKfRbCb s8yOe8dYAHYoiyhJyQCBHTjiAas6DXSgP4yTFmxoGONbz7AJDa3sm/m4kzNYu5U9S47n eyeAXynTmKik9dzyKmUNoC4OyG+jjZolEKODk67HwYeEuzmxYO61O0h3wF5b1byPbVEQ u/ClYcn4kLCQzbKT8+qRq0/sbh72saNWqmlrLVnQWK1A97amQjpX2teA1ub8Dx/Q2q8M ibwTiGF5Qw2R4I+z3+jcJNURS4kjXrt3AxwgPXvh8+P5GVL/UsE1U1N4fNQMN3gWob68 hr0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=8KeHM8r9FEkQ6hmUzWzLeevN843jeEXpnBlHeCgI2Kw=; b=H1bq+EF/IR6TTFb2cqDRsaksRTUbihhorMkWOO4R8xfhCpFzrHvFzrVjdRaY2cQjb9 IR7zggyyzdXAykJ6ZwlVKPTAnTCrgAWW3XOaERcwl8t/DVW0QhOCWxK1eaeiiwAfx3ue wZhYc6d+2UQxYiQU+if2/SczS+p01OM2VA4oMcupH8eiMesN37NpXm6QvfmHvN4DB/3V ZPB1kkO/+F96IgdxuSKS0aFXcdGJ4/gcURxhFQUse9n0R7BBArybi9R6VIRyTnp+JCSK ldLHTmcemBuHUOzDhVYUuJNYwi9XcSGI1b4vaGJ4Uj3tvB0toGFvtAsNa9+VCoToLWFR wchQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=K18rOLca; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:38 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 23/29] target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX Date: Sun, 29 Dec 2019 10:11:18 +1100 Message-Id: <20191228231124.18307-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The functions generated by these macros are unused. Acked-by: Max Filippov Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/xtensa/cpu.h | 4 ---- 1 file changed, 4 deletions(-) -- 2.20.1 diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index b363ffcf10..f5a7ea48bb 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -685,10 +685,6 @@ static inline uint32_t xtensa_replicate_windowstart(CPUXtensaState *env) } /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _ring0 -#define MMU_MODE1_SUFFIX _ring1 -#define MMU_MODE2_SUFFIX _ring2 -#define MMU_MODE3_SUFFIX _ring3 #define MMU_USER_IDX 3 static inline int cpu_mmu_index(CPUXtensaState *env, bool ifetch) From patchwork Sat Dec 28 23:11:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182518 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4648477ild; Sat, 28 Dec 2019 15:24:21 -0800 (PST) X-Google-Smtp-Source: APXvYqwuXxvVPrrEt3ze/62bo6QHIbfK9RRCJu49LVL2qjweBL86W5HFl7mVznsIrdstRmC3cHpq X-Received: by 2002:a9d:24ea:: with SMTP id z97mr67018456ota.345.1577575460959; Sat, 28 Dec 2019 15:24:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575460; cv=none; d=google.com; s=arc-20160816; b=o3XMHDjRdyPipT44dkX217S4qin/VtrA0Pdp3GZ2v9sr03WyJKO9Mh1S9PHtqiFQxU r0q0N15mq02qS1T6Q+GaRIU0/KoR2CqKEaCYiQ5HlwQHh46eHoj0qza2ZxmlO3HnNb8r curQQ7D6Tsda2NTMqNeQD6ElxXktYl5unAYFBylENnkC0DnymMM8gmK7sENfTvHalrUu /VT+GSRn3ZcqB4vV1c1Qc5Pj1JjLOEbvq//ToQdsvFO1a6WoEK3dtO2N8xhtZwq7KGtU attgdWwAfyO8Ae13So/0t6Dmea2AJoCEvQVAARxtWwqm6Jdnpy3+7mUBXTTQ8nCk4gkL 6Q2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=/DxurHGwuZH6JqrEQEweegleQBhLbLAfneqpCa2kWQI=; b=FFq0NRE6932wfmyZ4+w3/vF3JM4D+FmET781wDfN9Q0LuuZmmPfmu9haiw4qGlZxSB veXmluMF7rnAt2jIW/dMYM+BLLxXL5Rn1vIwHsKy0ByxtCznPSQ4Z/RVlO2iTruvXiNl e03OBVt2afVxE6t4bYPs3EzjsTmCN4xRZJXc8kMFyA2GI10EKiQfuKDxANraM3tYM/PO bezQGKjKKUXG5HEWVUA1095mQU14YCC1xT2KJjroQR+TC9BZe5dgXlIJ+X6kTOxK4D8Z rNyjoYngOk+vI7Z2qfyavM8dLqD1NR3nt5yDh9zVo6DSYvpEu5rnX93g426WxO3/GTQ9 1VmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=D6Zs3wee; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:41 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 24/29] target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0, 1}_SUFFIX Date: Sun, 29 Dec 2019 10:11:19 +1100 Message-Id: <20191228231124.18307-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Laurent Vivier Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The generated *_user functions are unused. The *_kernel functions have a couple of users in op_helper.c; use *_mmuidx_ra instead, with MMU_KERNEL_IDX. Reviewed-by: Laurent Vivier Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- v2: Use *_mmuidx_ra directly, without intermediate macros. --- target/m68k/cpu.h | 2 -- target/m68k/op_helper.c | 77 +++++++++++++++++++++++++---------------- 2 files changed, 47 insertions(+), 32 deletions(-) -- 2.20.1 diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 20de3c379a..89af14e899 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -516,8 +516,6 @@ enum { #define cpu_list m68k_cpu_list /* MMU modes definitions */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _user #define MMU_KERNEL_IDX 0 #define MMU_USER_IDX 1 static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch) diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index bc4f845e3f..202498deb5 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -42,8 +42,8 @@ static void cf_rte(CPUM68KState *env) uint32_t fmt; sp = env->aregs[7]; - fmt = cpu_ldl_kernel(env, sp); - env->pc = cpu_ldl_kernel(env, sp + 4); + fmt = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); + env->pc = cpu_ldl_mmuidx_ra(env, sp + 4, MMU_KERNEL_IDX, 0); sp |= (fmt >> 28) & 3; env->aregs[7] = sp + 8; @@ -58,13 +58,13 @@ static void m68k_rte(CPUM68KState *env) sp = env->aregs[7]; throwaway: - sr = cpu_lduw_kernel(env, sp); + sr = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp += 2; - env->pc = cpu_ldl_kernel(env, sp); + env->pc = cpu_ldl_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp += 4; if (m68k_feature(env, M68K_FEATURE_QUAD_MULDIV)) { /* all except 68000 */ - fmt = cpu_lduw_kernel(env, sp); + fmt = cpu_lduw_mmuidx_ra(env, sp, MMU_KERNEL_IDX, 0); sp += 2; switch (fmt >> 12) { case 0: @@ -260,12 +260,12 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw) /* ??? This could cause MMU faults. */ sp &= ~3; sp -= 4; - cpu_stl_kernel(env, sp, retaddr); + cpu_stl_mmuidx_ra(env, sp, retaddr, MMU_KERNEL_IDX, 0); sp -= 4; - cpu_stl_kernel(env, sp, fmt); + cpu_stl_mmuidx_ra(env, sp, fmt, MMU_KERNEL_IDX, 0); env->aregs[7] = sp; /* Jump to vector. */ - env->pc = cpu_ldl_kernel(env, env->vbr + vector); + env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0); } static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp, @@ -278,23 +278,24 @@ static inline void do_stack_frame(CPUM68KState *env, uint32_t *sp, switch (format) { case 4: *sp -= 4; - cpu_stl_kernel(env, *sp, env->pc); + cpu_stl_mmuidx_ra(env, *sp, env->pc, MMU_KERNEL_IDX, 0); *sp -= 4; - cpu_stl_kernel(env, *sp, addr); + cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); break; case 3: case 2: *sp -= 4; - cpu_stl_kernel(env, *sp, addr); + cpu_stl_mmuidx_ra(env, *sp, addr, MMU_KERNEL_IDX, 0); break; } *sp -= 2; - cpu_stw_kernel(env, *sp, (format << 12) + (cs->exception_index << 2)); + cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index << 2), + MMU_KERNEL_IDX, 0); } *sp -= 4; - cpu_stl_kernel(env, *sp, retaddr); + cpu_stl_mmuidx_ra(env, *sp, retaddr, MMU_KERNEL_IDX, 0); *sp -= 2; - cpu_stw_kernel(env, *sp, sr); + cpu_stw_mmuidx_ra(env, *sp, sr, MMU_KERNEL_IDX, 0); } static void m68k_interrupt_all(CPUM68KState *env, int is_hw) @@ -353,36 +354,52 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) cpu_abort(cs, "DOUBLE MMU FAULT\n"); } env->mmu.fault = true; + /* push data 3 */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* push data 3 */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* push data 2 */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* push data 2 */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* push data 1 */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* push data 1 */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 1 / push data 0 */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* write back 1 / push data 0 */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 1 address */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* write back 1 address */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 2 data */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* write back 2 data */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 2 address */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* write back 2 address */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 3 data */ sp -= 4; - cpu_stl_kernel(env, sp, 0); /* write back 3 data */ + cpu_stl_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 3 address */ sp -= 4; - cpu_stl_kernel(env, sp, env->mmu.ar); /* write back 3 address */ + cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + /* fault address */ sp -= 4; - cpu_stl_kernel(env, sp, env->mmu.ar); /* fault address */ + cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + /* write back 1 status */ sp -= 2; - cpu_stw_kernel(env, sp, 0); /* write back 1 status */ + cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 2 status */ sp -= 2; - cpu_stw_kernel(env, sp, 0); /* write back 2 status */ + cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* write back 3 status */ sp -= 2; - cpu_stw_kernel(env, sp, 0); /* write back 3 status */ + cpu_stw_mmuidx_ra(env, sp, 0, MMU_KERNEL_IDX, 0); + /* special status word */ sp -= 2; - cpu_stw_kernel(env, sp, env->mmu.ssw); /* special status word */ + cpu_stw_mmuidx_ra(env, sp, env->mmu.ssw, MMU_KERNEL_IDX, 0); + /* effective address */ sp -= 4; - cpu_stl_kernel(env, sp, env->mmu.ar); /* effective address */ + cpu_stl_mmuidx_ra(env, sp, env->mmu.ar, MMU_KERNEL_IDX, 0); + do_stack_frame(env, &sp, 7, oldsr, 0, retaddr); env->mmu.fault = false; if (qemu_loglevel_mask(CPU_LOG_INT)) { @@ -414,7 +431,7 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) env->aregs[7] = sp; /* Jump to vector. */ - env->pc = cpu_ldl_kernel(env, env->vbr + vector); + env->pc = cpu_ldl_mmuidx_ra(env, env->vbr + vector, MMU_KERNEL_IDX, 0); } static void do_interrupt_all(CPUM68KState *env, int is_hw) From patchwork Sat Dec 28 23:11:20 2019 Content-Type: text/plain; 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:44 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 25/29] target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Sun, 29 Dec 2019 10:11:20 +1100 Message-Id: <20191228231124.18307-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::641 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= , Aleksandar Markovic , Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The separate suffixed functions were used to construct some do_##insn function switched on mmu_idx. The interface is exactly identical to the *_mmuidx_ra functions. Replace them directly and remove the constructions. Cc: Aurelien Jarno Cc: Aleksandar Rikalo Reviewed-by: Aleksandar Markovic Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/mips/cpu.h | 4 - target/mips/op_helper.c | 182 +++++++++++++--------------------------- 2 files changed, 60 insertions(+), 126 deletions(-) -- 2.20.1 diff --git a/target/mips/cpu.h b/target/mips/cpu.h index ca00f41daf..c218ccc4a8 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1147,10 +1147,6 @@ extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env); * MMU modes definitions. We carefully match the indices with our * hflags layout. */ -#define MMU_MODE0_SUFFIX _kernel -#define MMU_MODE1_SUFFIX _super -#define MMU_MODE2_SUFFIX _user -#define MMU_MODE3_SUFFIX _error #define MMU_USER_IDX 2 static inline int hflags_mmu_index(uint32_t hflags) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 18fcee4a78..79d44da6fa 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -52,69 +52,6 @@ static void raise_exception(CPUMIPSState *env, uint32_t exception) do_raise_exception(env, exception, 0); } -#if defined(CONFIG_USER_ONLY) -#define HELPER_LD(name, insn, type) \ -static inline type do_##name(CPUMIPSState *env, target_ulong addr, \ - int mem_idx, uintptr_t retaddr) \ -{ \ - return (type) cpu_##insn##_data_ra(env, addr, retaddr); \ -} -#else -#define HELPER_LD(name, insn, type) \ -static inline type do_##name(CPUMIPSState *env, target_ulong addr, \ - int mem_idx, uintptr_t retaddr) \ -{ \ - switch (mem_idx) { \ - case 0: return (type) cpu_##insn##_kernel_ra(env, addr, retaddr); \ - case 1: return (type) cpu_##insn##_super_ra(env, addr, retaddr); \ - default: \ - case 2: return (type) cpu_##insn##_user_ra(env, addr, retaddr); \ - case 3: return (type) cpu_##insn##_error_ra(env, addr, retaddr); \ - } \ -} -#endif -HELPER_LD(lw, ldl, int32_t) -#if defined(TARGET_MIPS64) -HELPER_LD(ld, ldq, int64_t) -#endif -#undef HELPER_LD - -#if defined(CONFIG_USER_ONLY) -#define HELPER_ST(name, insn, type) \ -static inline void do_##name(CPUMIPSState *env, target_ulong addr, \ - type val, int mem_idx, uintptr_t retaddr) \ -{ \ - cpu_##insn##_data_ra(env, addr, val, retaddr); \ -} -#else -#define HELPER_ST(name, insn, type) \ -static inline void do_##name(CPUMIPSState *env, target_ulong addr, \ - type val, int mem_idx, uintptr_t retaddr) \ -{ \ - switch (mem_idx) { \ - case 0: \ - cpu_##insn##_kernel_ra(env, addr, val, retaddr); \ - break; \ - case 1: \ - cpu_##insn##_super_ra(env, addr, val, retaddr); \ - break; \ - default: \ - case 2: \ - cpu_##insn##_user_ra(env, addr, val, retaddr); \ - break; \ - case 3: \ - cpu_##insn##_error_ra(env, addr, val, retaddr); \ - break; \ - } \ -} -#endif -HELPER_ST(sb, stb, uint8_t) -HELPER_ST(sw, stl, uint32_t) -#if defined(TARGET_MIPS64) -HELPER_ST(sd, stq, uint64_t) -#endif -#undef HELPER_ST - /* 64 bits arithmetic for 32 bits hosts */ static inline uint64_t get_HILO(CPUMIPSState *env) { @@ -379,12 +316,12 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong arg, int mem_idx) \ } \ env->CP0_LLAddr = do_translate_address(env, arg, 0, GETPC()); \ env->lladdr = arg; \ - env->llval = do_##insn(env, arg, mem_idx, GETPC()); \ + env->llval = cpu_##insn##_mmuidx_ra(env, arg, mem_idx, GETPC()); \ return env->llval; \ } -HELPER_LD_ATOMIC(ll, lw, 0x3) +HELPER_LD_ATOMIC(ll, ldl, 0x3) #ifdef TARGET_MIPS64 -HELPER_LD_ATOMIC(lld, ld, 0x7) +HELPER_LD_ATOMIC(lld, ldq, 0x7) #endif #undef HELPER_LD_ATOMIC #endif @@ -400,42 +337,42 @@ HELPER_LD_ATOMIC(lld, ld, 0x7) void helper_swl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 24), mem_idx, GETPC()); if (GET_LMASK(arg2) <= 2) { - do_sb(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK(arg2) <= 1) { - do_sb(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK(arg2) == 0) { - do_sb(env, GET_OFFSET(arg2, 3), (uint8_t)arg1, mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)arg1, + mem_idx, GETPC()); } } void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); if (GET_LMASK(arg2) >= 1) { - do_sb(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK(arg2) >= 2) { - do_sb(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK(arg2) == 3) { - do_sb(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } } @@ -453,82 +390,82 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC()); if (GET_LMASK64(arg2) <= 6) { - do_sb(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 1), (uint8_t)(arg1 >> 48), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 5) { - do_sb(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 2), (uint8_t)(arg1 >> 40), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 4) { - do_sb(env, GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 3), (uint8_t)(arg1 >> 32), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 3) { - do_sb(env, GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 4), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 2) { - do_sb(env, GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 5), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 1) { - do_sb(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 6), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) <= 0) { - do_sb(env, GET_OFFSET(arg2, 7), (uint8_t)arg1, mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, 7), (uint8_t)arg1, + mem_idx, GETPC()); } } void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2, int mem_idx) { - do_sb(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); + cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC()); if (GET_LMASK64(arg2) >= 1) { - do_sb(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -1), (uint8_t)(arg1 >> 8), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 2) { - do_sb(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -2), (uint8_t)(arg1 >> 16), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 3) { - do_sb(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -3), (uint8_t)(arg1 >> 24), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 4) { - do_sb(env, GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -4), (uint8_t)(arg1 >> 32), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 5) { - do_sb(env, GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -5), (uint8_t)(arg1 >> 40), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) >= 6) { - do_sb(env, GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -6), (uint8_t)(arg1 >> 48), + mem_idx, GETPC()); } if (GET_LMASK64(arg2) == 7) { - do_sb(env, GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56), mem_idx, - GETPC()); + cpu_stb_mmuidx_ra(env, GET_OFFSET(arg2, -7), (uint8_t)(arg1 >> 56), + mem_idx, GETPC()); } } #endif /* TARGET_MIPS64 */ @@ -546,14 +483,14 @@ void helper_lwm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, for (i = 0; i < base_reglist; i++) { env->active_tc.gpr[multiple_regs[i]] = - (target_long)do_lw(env, addr, mem_idx, GETPC()); + (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC()); addr += 4; } } if (do_r31) { - env->active_tc.gpr[31] = (target_long)do_lw(env, addr, mem_idx, - GETPC()); + env->active_tc.gpr[31] = + (target_long)cpu_ldl_mmuidx_ra(env, addr, mem_idx, GETPC()); } } @@ -567,14 +504,14 @@ void helper_swm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - do_sw(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx, - GETPC()); + cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], + mem_idx, GETPC()); addr += 4; } } if (do_r31) { - do_sw(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); + cpu_stw_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); } } @@ -589,14 +526,15 @@ void helper_ldm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - env->active_tc.gpr[multiple_regs[i]] = do_ld(env, addr, mem_idx, - GETPC()); + env->active_tc.gpr[multiple_regs[i]] = + cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC()); addr += 8; } } if (do_r31) { - env->active_tc.gpr[31] = do_ld(env, addr, mem_idx, GETPC()); + env->active_tc.gpr[31] = + cpu_ldq_mmuidx_ra(env, addr, mem_idx, GETPC()); } } @@ -610,14 +548,14 @@ void helper_sdm(CPUMIPSState *env, target_ulong addr, target_ulong reglist, target_ulong i; for (i = 0; i < base_reglist; i++) { - do_sd(env, addr, env->active_tc.gpr[multiple_regs[i]], mem_idx, - GETPC()); + cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[multiple_regs[i]], + mem_idx, GETPC()); addr += 8; } } if (do_r31) { - do_sd(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); + cpu_stq_mmuidx_ra(env, addr, env->active_tc.gpr[31], mem_idx, GETPC()); } } #endif From patchwork Sat Dec 28 23:11:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182517 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4648197ild; Sat, 28 Dec 2019 15:23:57 -0800 (PST) X-Google-Smtp-Source: APXvYqxdzc5XOV18xxEJtt3IZcOJD10zun4pdTKHA7PXHWyTRLkKN3n4CfVbJAi6MoTO4q2tSMXI X-Received: by 2002:a05:6830:194:: with SMTP id q20mr67666481ota.92.1577575437430; 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:47 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 26/29] target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Sun, 29 Dec 2019 10:11:21 +1100 Message-Id: <20191228231124.18307-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , David Hildenbrand Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The generated functions aside from *_real are unused. The *_real functions have a couple of users in mem_helper.c; use *_mmuidx_ra instead, with MMU_REAL_IDX. Reviewed-by: David Hildenbrand Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- v2: Use *_mmuidx_ra directly, without intermediate macros. --- target/s390x/cpu.h | 5 ----- target/s390x/mem_helper.c | 10 +++++----- 2 files changed, 5 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e195e5c7c8..8a557fd8d1 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -36,11 +36,6 @@ #define TARGET_INSN_START_EXTRA_WORDS 2 -#define MMU_MODE0_SUFFIX _primary -#define MMU_MODE1_SUFFIX _secondary -#define MMU_MODE2_SUFFIX _home -#define MMU_MODE3_SUFFIX _real - #define MMU_USER_IDX 0 #define S390_MAX_CPUS 248 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 20a84b3912..428bde4c54 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2026,7 +2026,7 @@ uint32_t HELPER(testblock)(CPUS390XState *env, uint64_t real_addr) real_addr = wrap_address(env, real_addr) & TARGET_PAGE_MASK; for (i = 0; i < TARGET_PAGE_SIZE; i += 8) { - cpu_stq_real_ra(env, real_addr + i, 0, ra); + cpu_stq_mmuidx_ra(env, real_addr + i, 0, MMU_REAL_IDX, ra); } return 0; @@ -2260,11 +2260,11 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) for (i = 0; i < entries; i++) { /* addresses are not wrapped in 24/31bit mode but table index is */ raddr = table + ((index + i) & 0x7ff) * sizeof(entry); - entry = cpu_ldq_real_ra(env, raddr, ra); + entry = cpu_ldq_mmuidx_ra(env, raddr, MMU_REAL_IDX, ra); if (!(entry & REGION_ENTRY_I)) { /* we are allowed to not store if already invalid */ entry |= REGION_ENTRY_I; - cpu_stq_real_ra(env, raddr, entry, ra); + cpu_stq_mmuidx_ra(env, raddr, entry, MMU_REAL_IDX, ra); } } } @@ -2291,9 +2291,9 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr, pte_addr += VADDR_PAGE_TX(vaddr) * 8; /* Mark the page table entry as invalid */ - pte = cpu_ldq_real_ra(env, pte_addr, ra); + pte = cpu_ldq_mmuidx_ra(env, pte_addr, MMU_REAL_IDX, ra); pte |= PAGE_ENTRY_I; - cpu_stq_real_ra(env, pte_addr, pte, ra); + cpu_stq_mmuidx_ra(env, pte_addr, pte, MMU_REAL_IDX, ra); /* XXX we exploit the fact that Linux passes the exact virtual address here - it's not obliged to! */ From patchwork Sat Dec 28 23:11:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182527 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4655693ild; Sat, 28 Dec 2019 15:33:41 -0800 (PST) X-Google-Smtp-Source: APXvYqxIrRlMvtFfpRBKAFfBXslq0zKuWmuzT24iFuazhOX5ZcIyNAHWs8vInD+wBzB+Ru6489nf X-Received: by 2002:a05:6214:1090:: with SMTP id o16mr46210741qvr.105.1577576021079; Sat, 28 Dec 2019 15:33:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577576021; cv=none; d=google.com; s=arc-20160816; b=VcHuVkI64c0qX43HSmmR15kQPY1DSt/QlaO6GbT6FWqhTLekiNRdFca0d26GYZqRJV cokmx4nGbA+qOljQ94alO9biiL84b9AMF93HrZmPNhOl3htvJrnnQT+oOhxTlwEyVzoT TzKCu3aHY4aY933hbJSuKw0VIT9tly3rqHtQ7xQWvpcSXfUsSOEJodV1CQF2UZAyk8SO oXM4BuA9ZKdiEkbJdalFGStfJQJvmrLtaCdLqVo/hX2ElLou6mGZVtOUUSx8foJy3wZa gwpH84dgVWd/MiCZQUM+iF9R/JQ8wwts0qn1pEqp8WRDSgNqCzSUMqFH32Wk62DA+taP O+iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=SEzpAukoAQn83lsfCzdS88MYe9lG7G86695cNY7gsMY=; b=UPiH0X7UTC3j316Gmcczx3W6W0azp26Mro3Zojfv0jLb5ByGDRflTOwsDelEc3Qtqc 2MyGpu0dg4YUfJAk0FyjUSyh5zSGoebtSRV/H62QqV7Jr9rZHW0PkxmEvZJKLLRsi7nB etlzA7i8FzVkIh1b76fnkgRaF9yyHD3Upy8DrxqXlZ3Auxw/Qccg35rzATpp94zzLsu9 oNSBbraNZFI8d027NrZhh3hi1cymHkVJ03hRKGk3ZPDjgzuxPFoSnrTwR6P47fKBe4od gInv3iVcQosCPHT9QRoG+qgwKlFzeH+NZBh/KNo2MIcmlFQL7UGfRk/1Nyqj3IOcaEIW VXaQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="s3dkP/VL"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:50 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 27/29] target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX Date: Sun, 29 Dec 2019 10:11:22 +1100 Message-Id: <20191228231124.18307-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::1043 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are only two uses. Within dcbz_common, the local variable mmu_idx already contains the epid computation, and we can avoid repeating it for the store. Within helper_icbiep, the usage is trivially expanded using PPC_TLB_EPID_LOAD. Acked-by: David Gibson Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/ppc/cpu.h | 2 -- target/ppc/mem_helper.c | 11 ++--------- 2 files changed, 2 insertions(+), 11 deletions(-) -- 2.20.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 103bfe9dc2..8ebeaba649 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -951,8 +951,6 @@ struct ppc_radix_page_info { * + real/paged mode combinations. The other two modes are for * external PID load/store. */ -#define MMU_MODE8_SUFFIX _epl -#define MMU_MODE9_SUFFIX _eps #define PPC_TLB_EPID_LOAD 8 #define PPC_TLB_EPID_STORE 9 diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 1351b53f28..56855f2381 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -177,14 +177,7 @@ static void dcbz_common(CPUPPCState *env, target_ulong addr, } else { /* Slow path */ for (i = 0; i < dcbz_size; i += 8) { - if (epid) { -#if !defined(CONFIG_USER_ONLY) - /* Does not make sense on USER_ONLY config */ - cpu_stq_eps_ra(env, addr + i, 0, retaddr); -#endif - } else { - cpu_stq_data_ra(env, addr + i, 0, retaddr); - } + cpu_stq_mmuidx_ra(env, addr + i, 0, mmu_idx, retaddr); } } } @@ -216,7 +209,7 @@ void helper_icbiep(CPUPPCState *env, target_ulong addr) #if !defined(CONFIG_USER_ONLY) /* See comments above */ addr &= ~(env->dcache_line_size - 1); - cpu_ldl_epl_ra(env, addr, GETPC()); + cpu_ldl_mmuidx_ra(env, addr, PPC_TLB_EPID_LOAD, GETPC()); #endif } From patchwork Sat Dec 28 23:11:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182528 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4656459ild; Sat, 28 Dec 2019 15:34:44 -0800 (PST) X-Google-Smtp-Source: APXvYqzh6TIyz3wuLS/6rQPhYPOUgEjLIzhjlOvOWmasrI56XwPivcVSA6PBZuZnKZjYxg0174c/ X-Received: by 2002:a0c:e610:: with SMTP id z16mr45502388qvm.215.1577576084069; Sat, 28 Dec 2019 15:34:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577576084; cv=none; d=google.com; s=arc-20160816; b=SKFnIUgj+OjK9+PoQMuUnNMvVZlq4kHnR95D9DHnfJt7eojbupYVm0Y9ZUupF9FiZY 5HFoWA9IjOQWNZIPAaUkJDLo1jRvnK/xYkxl7kcguQ5DR77cqqKNktPAnYlZC1IN6S6f dDr+7V7bfgTUkitBDYrNQvDMNMxAgwOJkGyH3Ri0qQxYy4Rika4fIMA+shyjj78XBrwP T7C3ypT2TWH4yIuUMP021v+raDb5L2VygeH2ixBs9/MwmiCpGbRKWpbTy0zNygDZXoHs G3rtLvMzJskZrNvPtzfXG0ePe4Bm36C8qm6wbVN6mZN6oCZ07vMyfQmD+GFNsuFu1j+E 6b/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gwNisjSCbkUpTKZI0ymm9h7t/G0Gf4eKOZKY9iP+SJQ=; b=F2pb5VmnVZ2PwAmmr1dOTCqc4IaIy7r7YYpIM5oihu+YlURtUThwQstH5Qc54MNkqf L6wnfOs2lVJgfyTH+A6zrhAJcddnSpLQeChrENTJcxnHxturqHLFYlHTrfIqlGAegoOE UuRZ1tZq6dqSDYQojq4YzmV1f5NvVh4LzfBMBvL4/dNjFTiTlsqXDZq979fciOzcXfnV Uu9bM338EDf0IW8fV91mkqtyThcD6FDVZGEYFHNNAWUvQIk0HrAHIGOyv1Na623wDSR8 Yf6bdEqgcz4w6Y1JvHz7QPKOGIBKfqR8IAcqKdFJftrzc7jV4uMe9Sr84ArtIZJABGRe T9xg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LST3JD1T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 28/29] cputlb: Remove support for MMU_MODE*_SUFFIX Date: Sun, 29 Dec 2019 10:11:23 +1100 Message-Id: <20191228231124.18307-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::529 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" All users have now been converted to cpu_*_mmuidx_ra. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 230 ---------------------------------------- 1 file changed, 230 deletions(-) -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 0f3c49a005..cf4652bf48 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -271,236 +271,6 @@ void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, int mmu_idx, uintptr_t retaddr); -#ifdef MMU_MODE0_SUFFIX -#define CPU_MMU_INDEX 0 -#define MEMSUFFIX MMU_MODE0_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif - -#if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX) -#define CPU_MMU_INDEX 1 -#define MEMSUFFIX MMU_MODE1_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif - -#if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX) - -#define CPU_MMU_INDEX 2 -#define MEMSUFFIX MMU_MODE2_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 3) */ - -#if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX) - -#define CPU_MMU_INDEX 3 -#define MEMSUFFIX MMU_MODE3_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 4) */ - -#if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX) - -#define CPU_MMU_INDEX 4 -#define MEMSUFFIX MMU_MODE4_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 5) */ - -#if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX) - -#define CPU_MMU_INDEX 5 -#define MEMSUFFIX MMU_MODE5_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 6) */ - -#if (NB_MMU_MODES >= 7) && defined(MMU_MODE6_SUFFIX) - -#define CPU_MMU_INDEX 6 -#define MEMSUFFIX MMU_MODE6_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 7) */ - -#if (NB_MMU_MODES >= 8) && defined(MMU_MODE7_SUFFIX) - -#define CPU_MMU_INDEX 7 -#define MEMSUFFIX MMU_MODE7_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 8) */ - -#if (NB_MMU_MODES >= 9) && defined(MMU_MODE8_SUFFIX) - -#define CPU_MMU_INDEX 8 -#define MEMSUFFIX MMU_MODE8_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 9) */ - -#if (NB_MMU_MODES >= 10) && defined(MMU_MODE9_SUFFIX) - -#define CPU_MMU_INDEX 9 -#define MEMSUFFIX MMU_MODE9_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 10) */ - -#if (NB_MMU_MODES >= 11) && defined(MMU_MODE10_SUFFIX) - -#define CPU_MMU_INDEX 10 -#define MEMSUFFIX MMU_MODE10_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 11) */ - -#if (NB_MMU_MODES >= 12) && defined(MMU_MODE11_SUFFIX) - -#define CPU_MMU_INDEX 11 -#define MEMSUFFIX MMU_MODE11_SUFFIX -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX -#endif /* (NB_MMU_MODES >= 12) */ - -#if (NB_MMU_MODES > 12) -#error "NB_MMU_MODES > 12 is not supported for now" -#endif /* (NB_MMU_MODES > 12) */ - /* these access are slower, they must be as rare as possible */ #define CPU_MMU_INDEX (cpu_mmu_index(env, false)) #define MEMSUFFIX _data From patchwork Sat Dec 28 23:11:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 182523 Delivered-To: patch@linaro.org Received: by 2002:a92:815a:0:0:0:0:0 with SMTP id e87csp4651768ild; Sat, 28 Dec 2019 15:28:48 -0800 (PST) X-Google-Smtp-Source: APXvYqxzxcuB1gcnx5ae2mrD3kY+mNsHgcE2uSI82g/k7goMScQgyAYXhVeKjllb0twCxAKY0oOe X-Received: by 2002:a05:6830:1d7a:: with SMTP id l26mr62260502oti.138.1577575728703; Sat, 28 Dec 2019 15:28:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1577575728; cv=none; d=google.com; s=arc-20160816; b=DQXLVNN748WRBG6diTQJRmKbl5KCFDVlTlq8+ETkeOrsgQqBujTt7gRKnW9Q/HmXo+ Xo2nkAdfqQ9DmHrtyf1YQ8u+cTWg8elXMf9RhrlAo3t9sNxdw/TpbzBlR0OQIhTw5sgQ s04D339PTAf6BtP+ETS/23TGTdacuKGErOuwQSqIR47L1Je0cpftRDIPPUcVPD22FR/u J8y17356HHChVAE9glwdt6sgHI82sMdGHON/AWAXcAK7DtHhNcpQog032SWjHNqSt8gm t8Sc/nlRVmmJ+zSyLCow8g5k3qlIwBmIGI9LXCB9fCzsBtZ57EsFH+pzK77ZhJgyb/EM T3WQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=KSxlVjMgrW5qwjCYnrj72dmboj0p6pyBucySQch5mhk=; b=EniPWhf3ioPmMJG+4ce8mSBVl0OF/zxiIfna3z/6tpqrbkS9gNDNhzYVHhg2cuTe1n M8HuvVBL/o55UmED2Mjy23ojWyE2O79rpO7S1QYl4A7sHmMuZi2s4AqXk5sRkXqkTTmB wFjIiv2xN9SHIc3zqXar4Uk8PX2IUSs2ljRzg2TOBsTnM7uc+ORnu9WCfqNCa6dXb544 GLmWPnVobLijYYQFhDncqFJp9gVi7GsC8Wy0t1896xy+sk1W7vhyfdAOFktxLR8MJ7g6 AEQJNQlyd6U7YrKYV7WWgK9kGjC9UvQMaFHASOiKsEfX+FRTeD+eU6aMV/CsfMP22PlP sTgw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lrIKnUfG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[194.223.58.9]) by smtp.gmail.com with ESMTPSA id c18sm21077186pfr.40.2019.12.28.15.12.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2019 15:12:56 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 29/29] cputlb: Expand cpu_ldst_template.h in cputlb.c Date: Sun, 29 Dec 2019 10:11:24 +1100 Message-Id: <20191228231124.18307-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191228231124.18307-1-richard.henderson@linaro.org> References: <20191228231124.18307-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Aleksandar Markovic Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. The result is only slightly smaller than the original. Reviewed-by: Alex Bennée Reviewed-by: Aleksandar Markovic Signed-off-by: Richard Henderson --- include/exec/cpu_ldst.h | 67 +++++++----------- include/exec/cpu_ldst_template.h | 117 ------------------------------- accel/tcg/cputlb.c | 107 +++++++++++++++++++++++++++- 3 files changed, 130 insertions(+), 161 deletions(-) delete mode 100644 include/exec/cpu_ldst_template.h -- 2.20.1 diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index cf4652bf48..62f38d5a22 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -94,32 +94,6 @@ typedef target_ulong abi_ptr; #define TARGET_ABI_FMT_ptr TARGET_ABI_FMT_lx #endif -#if defined(CONFIG_USER_ONLY) - -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} - -/* In user-only mode we provide only the _code and _data accessors. */ - uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); uint32_t cpu_lduw_data(CPUArchState *env, abi_ptr ptr); uint32_t cpu_ldl_data(CPUArchState *env, abi_ptr ptr); @@ -148,6 +122,30 @@ void cpu_stl_data_ra(CPUArchState *env, abi_ptr ptr, void cpu_stq_data_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, uintptr_t retaddr); +#if defined(CONFIG_USER_ONLY) + +extern __thread uintptr_t helper_retaddr; + +static inline void set_helper_retaddr(uintptr_t ra) +{ + helper_retaddr = ra; + /* + * Ensure that this write is visible to the SIGSEGV handler that + * may be invoked due to a subsequent invalid memory operation. + */ + signal_barrier(); +} + +static inline void clear_helper_retaddr(void) +{ + /* + * Ensure that previous memory operations have succeeded before + * removing the data visible to the signal handler. + */ + signal_barrier(); + helper_retaddr = 0; +} + /* * Provide the same *_mmuidx_ra interface as for softmmu. * The mmu_idx argument is ignored. @@ -271,23 +269,6 @@ void cpu_stl_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint32_t val, void cpu_stq_mmuidx_ra(CPUArchState *env, abi_ptr addr, uint64_t val, int mmu_idx, uintptr_t retaddr); -/* these access are slower, they must be as rare as possible */ -#define CPU_MMU_INDEX (cpu_mmu_index(env, false)) -#define MEMSUFFIX _data -#define DATA_SIZE 1 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 2 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 4 -#include "exec/cpu_ldst_template.h" - -#define DATA_SIZE 8 -#include "exec/cpu_ldst_template.h" -#undef CPU_MMU_INDEX -#undef MEMSUFFIX - #endif /* defined(CONFIG_USER_ONLY) */ uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); diff --git a/include/exec/cpu_ldst_template.h b/include/exec/cpu_ldst_template.h deleted file mode 100644 index e400979f23..0000000000 --- a/include/exec/cpu_ldst_template.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Software MMU support - * - * Generate inline load/store functions for one MMU mode and data - * size. - * - * Generate a store function as well as signed and unsigned loads. - * - * Not used directly but included from cpu_ldst.h. - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#if DATA_SIZE == 8 -#define SUFFIX q -#define USUFFIX q -#define DATA_TYPE uint64_t -#define SHIFT 3 -#elif DATA_SIZE == 4 -#define SUFFIX l -#define USUFFIX l -#define DATA_TYPE uint32_t -#define SHIFT 2 -#elif DATA_SIZE == 2 -#define SUFFIX w -#define USUFFIX uw -#define DATA_TYPE uint16_t -#define DATA_STYPE int16_t -#define SHIFT 1 -#elif DATA_SIZE == 1 -#define SUFFIX b -#define USUFFIX ub -#define DATA_TYPE uint8_t -#define DATA_STYPE int8_t -#define SHIFT 0 -#else -#error unsupported data size -#endif - -#if DATA_SIZE == 8 -#define RES_TYPE uint64_t -#else -#define RES_TYPE uint32_t -#endif - -/* generic load/store macros */ - -static inline RES_TYPE -glue(glue(glue(cpu_ld, USUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - uintptr_t retaddr) -{ - return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, - retaddr); -} - -static inline RES_TYPE -glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) -{ - return glue(glue(cpu_ld, USUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); -} - -#if DATA_SIZE <= 2 -static inline int -glue(glue(glue(cpu_lds, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - uintptr_t retaddr) -{ - return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, - retaddr); -} - -static inline int -glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) -{ - return glue(glue(cpu_lds, SUFFIX), _mmuidx_ra)(env, ptr, CPU_MMU_INDEX, 0); -} -#endif - -/* generic store macro */ - -static inline void -glue(glue(glue(cpu_st, SUFFIX), MEMSUFFIX), _ra)(CPUArchState *env, - target_ulong ptr, - RES_TYPE v, uintptr_t retaddr) -{ - glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, - retaddr); -} - -static inline void -glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, - RES_TYPE v) -{ - glue(glue(cpu_st, SUFFIX), _mmuidx_ra)(env, ptr, v, CPU_MMU_INDEX, 0); -} - -#undef RES_TYPE -#undef DATA_TYPE -#undef DATA_STYPE -#undef SUFFIX -#undef USUFFIX -#undef DATA_SIZE -#undef SHIFT diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index f0e4b0aee4..a991ea2964 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -35,7 +35,6 @@ #include "qemu/atomic128.h" #include "translate-all.h" #include "trace-root.h" -#include "qemu/plugin.h" #include "trace/mem.h" #ifdef CONFIG_PLUGIN #include "qemu/plugin-memory.h" @@ -1697,6 +1696,68 @@ uint64_t cpu_ldq_mmuidx_ra(CPUArchState *env, abi_ptr addr, ? helper_le_ldq_mmu : helper_be_ldq_mmu); } +uint32_t cpu_ldub_data_ra(CPUArchState *env, target_ulong ptr, + uintptr_t retaddr) +{ + return cpu_ldub_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +int cpu_ldsb_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldsb_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_lduw_data_ra(CPUArchState *env, target_ulong ptr, + uintptr_t retaddr) +{ + return cpu_lduw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +int cpu_ldsw_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldsw_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_ldl_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldl_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint64_t cpu_ldq_data_ra(CPUArchState *env, target_ulong ptr, uintptr_t retaddr) +{ + return cpu_ldq_mmuidx_ra(env, ptr, cpu_mmu_index(env, false), retaddr); +} + +uint32_t cpu_ldub_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldub_data_ra(env, ptr, 0); +} + +int cpu_ldsb_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldsb_data_ra(env, ptr, 0); +} + +uint32_t cpu_lduw_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_lduw_data_ra(env, ptr, 0); +} + +int cpu_ldsw_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldsw_data_ra(env, ptr, 0); +} + +uint32_t cpu_ldl_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldl_data_ra(env, ptr, 0); +} + +uint64_t cpu_ldq_data(CPUArchState *env, target_ulong ptr) +{ + return cpu_ldq_data_ra(env, ptr, 0); +} + /* * Store Helpers */ @@ -1970,6 +2031,50 @@ void cpu_stq_mmuidx_ra(CPUArchState *env, target_ulong addr, uint64_t val, cpu_store_helper(env, addr, val, mmu_idx, retaddr, MO_TEQ); } +void cpu_stb_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stb_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stw_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stw_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stl_data_ra(CPUArchState *env, target_ulong ptr, + uint32_t val, uintptr_t retaddr) +{ + cpu_stl_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stq_data_ra(CPUArchState *env, target_ulong ptr, + uint64_t val, uintptr_t retaddr) +{ + cpu_stq_mmuidx_ra(env, ptr, val, cpu_mmu_index(env, false), retaddr); +} + +void cpu_stb_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stb_data_ra(env, ptr, val, 0); +} + +void cpu_stw_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stw_data_ra(env, ptr, val, 0); +} + +void cpu_stl_data(CPUArchState *env, target_ulong ptr, uint32_t val) +{ + cpu_stl_data_ra(env, ptr, val, 0); +} + +void cpu_stq_data(CPUArchState *env, target_ulong ptr, uint64_t val) +{ + cpu_stq_data_ra(env, ptr, val, 0); +} + /* First set of helpers allows passing in of OI and RETADDR. This makes them callable from other helpers. */