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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a1bbd93sm10882117f8f.76.2025.01.27.03.54.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 01/10] target: Set disassemble_info::endian value for little-endian targets Date: Mon, 27 Jan 2025 12:54:17 +0100 Message-ID: <20250127115426.51355-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field for little-endian targets. Note, there was no disas_set_info() handler registered for the TriCore target, so we implement one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/alpha/cpu.c | 1 + target/avr/cpu.c | 1 + target/hexagon/cpu.c | 1 + target/i386/cpu.c | 1 + target/loongarch/cpu.c | 1 + target/rx/cpu.c | 1 + target/tricore/cpu.c | 6 ++++++ 7 files changed, 12 insertions(+) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index da21f99a6ac..acf81fda371 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -85,6 +85,7 @@ static int alpha_cpu_mmu_index(CPUState *cs, bool ifetch) static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_mach_alpha_ev6; info->print_insn = print_insn_alpha; } diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 5a0e21465e5..2871d30540a 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -102,6 +102,7 @@ static void avr_cpu_reset_hold(Object *obj, ResetType type) static void avr_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_arch_avr; info->print_insn = avr_print_insn; } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 238e63bcea4..a9beb9a1757 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -293,6 +293,7 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type) static void hexagon_cpu_disas_set_info(CPUState *s, disassemble_info *info) { info->print_insn = print_insn_hexagon; + info->endian = BFD_ENDIAN_LITTLE; } static void hexagon_cpu_realize(DeviceState *dev, Error **errp) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b9c11022c4..eecb6f54d9e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8343,6 +8343,7 @@ static void x86_disas_set_info(CPUState *cs, disassemble_info *info) X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; + info->endian = BFD_ENDIAN_LITTLE; info->mach = (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64 : env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386 : bfd_mach_i386_i8086); diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 227870e2856..cb9b9f909f3 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -617,6 +617,7 @@ static void loongarch_cpu_reset_hold(Object *obj, ResetType type) static void loongarch_cpu_disas_set_info(CPUState *s, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->print_insn = print_insn_loongarch; } diff --git a/target/rx/cpu.c b/target/rx/cpu.c index d237d007023..f283315474c 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -160,6 +160,7 @@ static void rx_cpu_set_irq(void *opaque, int no, int request) static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_LITTLE; info->mach = bfd_mach_rx; info->print_insn = print_insn_rx; } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index eb794674c8d..49c18a0cd92 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -35,6 +35,11 @@ static const gchar *tricore_gdb_arch_name(CPUState *cs) return "tricore"; } +static void tricore_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) +{ + info->endian = BFD_ENDIAN_LITTLE; +} + static void tricore_cpu_set_pc(CPUState *cs, vaddr value) { cpu_env(cs)->PC = value & ~(target_ulong)1; @@ -201,6 +206,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) cc->gdb_num_core_regs = 44; cc->gdb_arch_name = tricore_gdb_arch_name; + cc->disas_set_info = tricore_cpu_disas_set_info; cc->dump_state = tricore_cpu_dump_state; cc->set_pc = tricore_cpu_set_pc; cc->get_pc = tricore_cpu_get_pc; From patchwork Mon Jan 27 11:54:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860254 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976421wrq; Mon, 27 Jan 2025 03:56:40 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUJwHBbtB92tQL/crA1ymrwcSQF2OctralTJdANQ0msYx6zCQCI74e52Z9Wv51dO6o9AsNy9g==@linaro.org X-Google-Smtp-Source: AGHT+IE4Ztv8do0pobg/kKwKp9Z2R/BWFIbw7+6souJkpemIZth420wlx42HWJLB8eL222qZLgch X-Received: by 2002:a05:6214:c8b:b0:6d8:a8e1:b57b with SMTP id 6a1803df08f44-6e1b220c591mr622589286d6.36.1737979000424; Mon, 27 Jan 2025 03:56:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737979000; cv=none; d=google.com; s=arc-20240605; b=he8tEWg09/UJVjBpJRIuW5D/cLOGVSAnx97+kLKFjr9uYKrJYTeSox+xlr2xEwTprS WKUc1Y2ip2GqcymrzcJ9GvrxHGnuq9I24ajSbVB56nBO4Hav2e/6AWNUH9WpKMTU5V+V dR+4SAZm2kHOtgyjd4zGvvm+YDZ0G5KarFOaagBZUFMMk+9bw5BwqzSLqPtRe4dxYex+ RXL2gw0pVIJ7G54Dxk1r1yWQbSWHmt4llldcTGJciBYZ8z90zy/meia1/wYi5TeFyrlC DWYvTw7zeNn5jnFNl/sBXbjRO4X3Lt7S/6nNN4KlfcLEB9+W7gzr8yisXyz/gq1jNn7j RW0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=H4U+Bby0D2aGRLyzE2lLHHXc/1St8N4BxVIFjrIyGIc=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=GhCB9kqaEwuHrNnjFYEefcx1RFkm/uD7GQ2O/oLA3CO5e9AWPXMxOdEWoL5FokFIJ5 TqXMojzMVLoAHE54vrhneGWH1kEd7cC8x6lJdXZmxT1u4zEyy84SOcsaGSXPRpSRMT1C pFhuue9faGbcBBVWJ5IYL4+SfCvKqogYvPmOXMV2fPxl0xBLnouCq9V2g5lvrvcpp9EL +PP968gVrbqYZv5fW7KNAWL6rrMWGx7D5121QIyOLLtZ7oKDwNP4htu8oBJZw0JXNbxF P4WriH9B0t1Axac7VeY4+mPJhE4DCJbgcPexP0BWFk2PGkPG8x5XYU5YBbXgYl4RrqLC ASCQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rp0YXDrj; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd54c098sm131475935e9.31.2025.01.27.03.54.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:37 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 02/10] target: Set disassemble_info::endian value for big-endian targets Date: Mon, 27 Jan 2025 12:54:18 +0100 Message-ID: <20250127115426.51355-3-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field for big-endian targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/hppa/cpu.c | 1 + target/m68k/cpu.c | 1 + target/openrisc/cpu.c | 1 + target/s390x/cpu.c | 1 + target/sparc/cpu.c | 1 + 5 files changed, 5 insertions(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index f2441d4d7fb..1bc5cd746ec 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -144,6 +144,7 @@ static int hppa_cpu_mmu_index(CPUState *cs, bool ifetch) static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) { info->mach = bfd_mach_hppa20; + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_hppa; } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 5eac4a38c62..ff167aaea71 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -122,6 +122,7 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type) static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info) { info->print_insn = print_insn_m68k; + info->endian = BFD_ENDIAN_BIG; info->mach = 0; } diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 0669ba2fd10..b81179bbbaa 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -83,6 +83,7 @@ static int openrisc_cpu_mmu_index(CPUState *cs, bool ifetch) static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info) { + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_or1k; } diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 3bea014f9ee..972d265478d 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -243,6 +243,7 @@ static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { info->mach = bfd_mach_s390_64; info->cap_arch = CS_ARCH_SYSZ; + info->endian = BFD_ENDIAN_BIG; info->cap_insn_unit = 2; info->cap_insn_split = 6; } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index e3b46137178..9fd222e4c82 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -106,6 +106,7 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) { info->print_insn = print_insn_sparc; + info->endian = BFD_ENDIAN_BIG; #ifdef TARGET_SPARC64 info->mach = bfd_mach_sparc_v9b; #endif From patchwork Mon Jan 27 11:54:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860258 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976844wrq; Mon, 27 Jan 2025 03:58:00 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXvJpZED1Ll1uW3Jc0L4Ge4nplxfjlCyFHXP3LgauNXEkW6IRd0X/g7Nh1sspnnGNUGBpjYdw==@linaro.org X-Google-Smtp-Source: AGHT+IGkPPcQCwtAlTI8wzVRcfVyQxeqvBN6MtIC0waPCrtJTZH9qHnhVYjd5DbU/qfWig6e/w8g X-Received: by 2002:a05:6214:1bc5:b0:6d4:21f6:a0d4 with SMTP id 6a1803df08f44-6e1b2234a5dmr629307666d6.37.1737979079937; Mon, 27 Jan 2025 03:57:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737979079; cv=none; d=google.com; s=arc-20240605; b=AKrY656hpfSPsloCtEMelZRsWljgU0sLMp+Qj4CIYCXRNH+0BQF63258spHnUmFVCE oll/iD3eI/8FMMz6IdzYNXELkrprjdOC1F4q6WnaCuXTx0VjVVl9QiwuP8Quz9GvaPkw 7Hpb+iBNMtjgWRAuQ4gdlGJEfpCaroAWTEj5C5nn5Ha6ZZ4Rh5pnNSnbE2OpA6RYdZMs vqOUQJ7+9lCOK7ps+zhHTC+hXbxBfUOPrAxV/wX0rj5waBTvTgxdHMJGNWkLwd4OB0Yf FCA1pG7aKMkYNjexCGpsA5jdbl7zzXyWXrLl0SwbxZZkWNBUCiEmhj9tge0S8KOmUr7C Ftzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TmODB2YqiSgFfw6mNPswT7QwXij2cXKU42PdskrrlVY=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=lt0DyDvIxPJPBVg7yqjM/BAwy1WVLTXCuFeHJlZqB8cIgLHMm9ACJyPbW8d4qBdIZr UTc3dsDRj+GY8I0f7qysbqdYDfOECQW+GRLeGyjev+zcyadlQTFHdarnUq1wJ9IWq0nu wUr396FTQA7+ARWHe96rfKjsRQKyGu3uep01tw0jNaEnLr3frqkQAgLg+QKIof7XObnh sXzwXy80UGNdUnUQTsKk4nyuQbjlWXyyNLok8XuPlwmssoerFg2F8SrOCcFirOoQLXfq zbA14UMzpktaRhTcE16GQjmHrdFrM8FIS/iwSC0cBAF4zdUsXIil1rrcaXB39xyk735F a9Hw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=nJopVp7G; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a17d6f8sm10684291f8f.28.2025.01.27.03.54.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 03/10] target/arm: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:19 +0100 Message-ID: <20250127115426.51355-4-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f9fdf708653..9de8c799c77 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1220,6 +1220,8 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) #else info->endian = BFD_ENDIAN_BIG; #endif + } else { + info->endian = BFD_ENDIAN_LITTLE; } info->flags &= ~INSN_ARM_BE32; #ifndef CONFIG_USER_ONLY From patchwork Mon Jan 27 11:54:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860257 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976751wrq; Mon, 27 Jan 2025 03:57:42 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUZIOTE5X1t4DaGgP2c64YWRLqRVMWO/sWw2ayp8n2l05At7T7lSK5Zt6zMTo3ShWMlhyqiBg==@linaro.org X-Google-Smtp-Source: AGHT+IHCOQrbtAJ8h3lq+MiG1o1PhpGiczsAb5nLHyjlMOysSDlS/ZgENPjbcK1gCQSpRuvTa7KO X-Received: by 2002:a05:620a:2721:b0:7b6:77f3:b1b0 with SMTP id af79cd13be357-7be631f4b61mr5447429585a.24.1737979061981; Mon, 27 Jan 2025 03:57:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737979061; cv=none; d=google.com; s=arc-20240605; b=ZEe2tsvL3yLU/IfEqCDtyHFHS6svmZ2FEU/T+x/QyHkNIPnovlM+669Njf9P5CgI52 aav6y4Ic6OE5liq3T+UARwlt7LfWt2+9wcnzUH8nvpNrKa58zJAn6bD82vEjUD1i5hxM +NM0XCdavY6VEIMrJ8J0drmwqYVMJ/Al1JR/uEE29GXMoCn1v2SPU/8B9T9/sN5egl9a WY/5Og5mvMk2dn3N9x3ABCFfZgBKeBxL7vfmrCuBr1oFDjrcRuI2LE4aXAWqe6l97PdC QckGqWwaPXI5mGW03d/qc1lBYmInI7XQExmPNZTIjUNxAdHB+ex+7rphNfW0BqWwxkMs 0Scg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0D0mBXBaLsDF4AjforVcC1QF9ut0pEK5UwN8hfEmGYc=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=cyuiPeVQK8iBRBb3Fg4sxEK1vnph/UPpB6O4asFfhp2v9Be6CSM8+nFdal7vd+XNCP +ni+WimeLenpgkLb/a/11OkYL32CVsKFRiAxssjmTwQlTsZ4gsNBmd7Y5IiPbxWL7jvi ki2VNMYhIRkuvwOmqEC8txYT5S/plWwwS2uq3K3uvbcdhoVC9J+ZL7rIkYv8H4LoieRX uG1dI6O5y7Kt/jeidQMr81nn+wbnQSMVb8wIKCDIp0aDc2PV8JxMTutfWlfeAD8rzrtZ 2pgzRGMzST9bHezazf7FQjUPBHu3aBUidXYh0mQtsKQyYLKaCaxAkXrJTgMpYgceb//N 2Kfw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QlM9Fqn3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a188928sm10794589f8f.45.2025.01.27.03.54.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 04/10] target/microblaze: Set disassemble_info::endian value in disas_set_info Date: Mon, 27 Jan 2025 12:54:20 +0100 Message-ID: <20250127115426.51355-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/microblaze/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 13d194cef88..7603d2e8f73 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -224,6 +224,11 @@ static void mb_disas_set_info(CPUState *cpu, disassemble_info *info) { info->mach = bfd_arch_microblaze; info->print_insn = print_insn_microblaze; +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif } static void mb_cpu_realizefn(DeviceState *dev, Error **errp) From patchwork Mon Jan 27 11:54:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860250 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976290wrq; Mon, 27 Jan 2025 03:56:14 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUxfTblLUQA+B10Jab0Ojh6ZLt/Kh3X4arj1y5BaLhLxJD+crnGqgixwEEzOn4lMn66Jtc4Cw==@linaro.org X-Google-Smtp-Source: AGHT+IGXwaIF6017/psTrgofEVNSlL2GHoK2lS+gRQeV0uIG1xMbsfOPew7nbXxy9sflwMs+uUjn X-Received: by 2002:a05:620a:258e:b0:7b6:66d0:5ac2 with SMTP id af79cd13be357-7be63276aacmr7370362785a.54.1737978973693; Mon, 27 Jan 2025 03:56:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737978973; cv=none; d=google.com; s=arc-20240605; b=A9mGgS/mCc1yw06Hdu6aoajbPDaDnOepMQG1nvAsL85KPuQ+XMj6Na+tO04cLeVbrB 035M2hsfqYrOOQy1cudxO22M78ePqEyD7Xx5ssoLkcO6tqNv6JJ/ORjTv51IWQJADOQT GNAkY1aheaeRzW+dwrhZcLtKiXCkQC0gro6wto/GgLkYb6fdHnlEfjtma0KPDe35Mssj RqPAjQ2p4KIY9or/ZMSxYNLPNYsDelNrcj5/rajeu8kNPSFSKbgHeTvNu9bOxVE2Q9I1 2jfYYDSJN7Ds0qNDtRoE0Vr1zNNOrNT6HuwK6YeLdH/XxVlfjUEo1w3Hto7B9lwXxXhn tBsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=HOKaO4+JhkS19YUfs3qPtnMOdIHyEK0YrYWedLcqil4=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=D7eZxf9rGo1UnKk7+Vmpdhkt1XPy/CAjoWLehjAw96Ez37nXe8tJgI19sfQndnmol4 cZmq1kVAxLkt2KDuKUELCoR+yHZnsu7Ib6NZG7rhotavqY6F+39JrRP7j9H9zFBZ8rC/ cAKlvRR8tve/E1Sy5ROiGYoFiHezkERoHBqLWPLIDQe9tnucbcdBLnOqtXKVaiFgVyuV Vja/LpntL7npKggw7RCRT8Mk0nyXed2dDJBqn+l2T/3n912hILv06IidtYFARv18n9ku F8tFj5sy5WXvfzIt6qCPPACXg8r6AU8PGTrdUU8BzDklBEaB8tPi/X5DKaXfYfZPcDWC 1MtQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MwuihrdV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a17d865sm11029825f8f.38.2025.01.27.03.54.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:51 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 05/10] target/mips: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:21 +0100 Message-ID: <20250127115426.51355-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/mips/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 0b267d2e507..f6d247b530f 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -429,12 +429,15 @@ static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { if (!(cpu_env(s)->insn_flags & ISA_NANOMIPS32)) { #if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; info->print_insn = print_insn_big_mips; #else + info->endian = BFD_ENDIAN_LITTLE; info->print_insn = print_insn_little_mips; #endif } else { info->print_insn = print_insn_nanomips; + info->endian = BFD_ENDIAN_LITTLE; } } From patchwork Mon Jan 27 11:54:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860252 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976376wrq; Mon, 27 Jan 2025 03:56:29 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCWseJf7UJCbWViL7QKGzFWZK5el9ugHz2kc5IP8k1zWZYwXsTq/46U9m8SAGmNTiBL1L24WVw==@linaro.org X-Google-Smtp-Source: AGHT+IH/r350yKRIWzPr734zr2eqpUn/xInPSSpnG5ugY7pkegIIsioQ8L/4sInHCP1LcL+izJbl X-Received: by 2002:a05:620a:258a:b0:7b6:d5a6:18ec with SMTP id af79cd13be357-7be63287aa4mr6814402485a.48.1737978989261; Mon, 27 Jan 2025 03:56:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737978989; cv=none; d=google.com; s=arc-20240605; b=ZGri/PF6B/QylxrN0T+WI1nThvgBFTuVifDxoy4tfq+PGhv7QUjJXQYwwMjmynUDPi bhnazvOKHZ0e9JmROhTV3rQZQBWjKgVHRVzJ0obeejk9XXMwvzMbA/AtVUH79Zvgl4KD +42umgI2mH1MLI5MZy/TMjXm8JtGOJ6lhIWzk9gnEgnNL96fz2v6oTxDDrfOc52zunGj w8VO2oOVlXaivOBgCaJe2vSYI7m3upJpMNeew3J77Nxbp5HGCW3f9h0jxVWZ/mD5RThs cMf/7qpdzXEv3mz/BPAV2NGrRE2aj+jhT2CibOQlkevUqBk+aRjasdCMLh377dzF/+DM iW3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=XtP8AqLeYQZjrWpkd4lk6XaR5TxrmGrkOXytBFmi5uw=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=So2p5srqUvH/XqDZDioG5RPRvsGFV3WYqR1u6XIgPvPe7UzMgpAmVHCwWqJ929WL+d hzUl9k21IqjNZ3SLwb6zLVmO0Bq5/OYQNZ/vLzn6ansFyYcsUIAi8xlve7BTEG2ilvX3 fsj7/xxjqSWsacu3plnUZV+NIwS5Vk854HEm+ApKz3qyFsSfzRCaaqy1r9evm0GfvkP6 ychLgxkmPHYbP651OuO1pMLQ5+HzQWqWTgNJkcf8ha7elb1KO2RkXO43EbkbdBV17bA+ fqrpkfsCrsAsSUhzKk93womoO+cBI+sS2yHMc/ptuu59mg5iRXTNSCfYlmcPAtIl/hYb G8Dw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QREw+1H0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a1baf3esm11045471f8f.75.2025.01.27.03.54.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:54:56 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 06/10] target/ppc: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:22 +0100 Message-ID: <20250127115426.51355-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/ppc/cpu_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index ed85448bc7d..c3263f26219 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7398,6 +7398,8 @@ static void ppc_disas_set_info(CPUState *cs, disassemble_info *info) if ((env->hflags >> MSR_LE) & 1) { info->endian = BFD_ENDIAN_LITTLE; + } else { + info->endian = BFD_ENDIAN_BIG; } info->mach = env->bfd_mach; if (!env->bfd_mach) { From patchwork Mon Jan 27 11:54:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860251 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976337wrq; Mon, 27 Jan 2025 03:56:22 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCU2RVvHMJ5aRxIpbmxLxmyTC7L+hasM1pmb9DWvHuQjZg6ogoDuijdgaDrTCMfxqtBepx2MRg==@linaro.org X-Google-Smtp-Source: AGHT+IHIg5eG7JiIs6VqSNzWqregq1ge0tawuiCcB19ARCRMu+84GVapU827l4Yl0lpuhg6i46vJ X-Received: by 2002:a05:620a:17a3:b0:7b1:19f4:c6e0 with SMTP id af79cd13be357-7be63253f1amr6300062985a.51.1737978982653; Mon, 27 Jan 2025 03:56:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737978982; cv=none; d=google.com; s=arc-20240605; b=IQLAHdYZsfOs4VF9u1Fpbyqxjs7ey+QH6dNIiLZD+FvTuNTR6+xM4Bn+HdQ1EK1irt ASAdodIFhCH8EGrxDpwLQ90zK/Dets3cVYIvNBS+5vED3ldphTvadzF13B3DI/lfCnfn LNu1vFp6gkCVoIM9DhBmIBCNeScXN6D2wYIVRk7eJT2SmVtxB5jpeiIYObvDcY0iBZ+X mIcOmb8ELB7shTn40dXKT4t0SeKTtEv2gUk1obYO8zHz3elduP618jMlbyJn9jFIcUkk 3JgpxuQElUQV+X7OlkiwMrcH6S0bQKdNx60Xr3Dqjz3A9sU4Q3bdo3lOVVsHtueGdBtj acdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=B4IS3z5t6aeYLZ7NAuHNel+nPJsLHRUkUZSl5ZYMkwc=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=TsXp+2QEI/sXcgmuwPof3U1itOZVjCgkz5asiqtNbSU93ifML05DVTROlRI3hEVmRR l10OYYv2JIoxmN97V9Sn9efB1jZIglLor6pqNv2lPdWuWpwCaouuXcU8Zjnue5Cp0D9U QH/SUj4Ui4BCWr4TtIrLJ3TRaaWquM5UgTATluRNSvh4jlZWWAxL+MJc5tNRdkW3HFYo xqqBLWeTyWwd1As/v7ohd/74Up+MXk4PamJQSyPiwpjHy7ItX4NMoylrjyokUIFPTpUY Cc8O+jqTfU1Kk3CuZNdVNfO1UICsrxxTS5mMvyyMxwtrPQpWjvN/qt14g92KE1ig7njB 4mUA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=knJHu9Sy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd48574csm130454235e9.9.2025.01.27.03.55.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:55:01 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 07/10] target/riscv: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:23 +0100 Message-ID: <20250127115426.51355-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/riscv/cpu.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 3d4bd157d2c..b39a701d751 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1156,6 +1156,15 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info) CPURISCVState *env = &cpu->env; info->target_info = &cpu->cfg; + /* + * A couple of bits in MSTATUS set the endianness: + * - MSTATUS_UBE (User-mode), + * - MSTATUS_SBE (Supervisor-mode), + * - MSTATUS_MBE (Machine-mode) + * but we don't implement that yet. + */ + info->endian = BFD_ENDIAN_LITTLE; + switch (env->xl) { case MXL_RV32: info->print_insn = print_insn_riscv32; From patchwork Mon Jan 27 11:54:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860253 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976409wrq; Mon, 27 Jan 2025 03:56:37 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXYd/VWjOZX04/xeMM3sCWDNXdSbJJjDGp4lbLevBAP3Y/5wUnC+wgtAYCyNS+wA5/eN6WFAQ==@linaro.org X-Google-Smtp-Source: AGHT+IE42pKlxF0z5kfsyJhTV1CXI02G1cYazqiPmJ6SlRDtlFiCVe9Mm+ntqpa5FWjctEk3yTzW X-Received: by 2002:a05:620a:410e:b0:7b1:880c:5805 with SMTP id af79cd13be357-7be6327c367mr6731836985a.45.1737978997090; Mon, 27 Jan 2025 03:56:37 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737978997; cv=none; d=google.com; s=arc-20240605; b=UHAfZ5ZbOfPsmzwhBSbfxz9sqNEJwUxyWiGHsvVPBDfELieTX/1q18i1+yhj5IQNDt SkZOJcBv1ufNh69dJPsYrIkk5NyymuFk1rNCaGdGksFSpuVLMmEwaIJiVjz1VigTW3in xJyrX0rvENwKCZYqpJ4rH+jV5L54IvDxtOH8OU0n5epuiXhrj35b8tLnzbQXYnQ2tnKO qRvYVeSW8DUNG+vD7s9YGmOnPeV2dUSNFghqK4Hitdz4qU1OJ0l4Dwr6KX4miP4GBeIL ZcFS1Irkb9D1bjmijOa4Yct1A6QlNIt0JBa3tV9lsj1jA5dMpQkIHQ7BD0NrwU4Mlzuv UPLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=JX3MnHembh04tcm3f0aOQ5qd9/M1w32l0pc1xIgIK0Y=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=kCdLBEkG4LWCOcfXG1LjVt3ebLpY6iNiM2OCQUDEbst4JtcjIKdzukqC0IQZ9JPHgx kTursjg3TW8rq/4Dor3Q+Kbm174d7syxCjfnMW5bXRmHUf3LzVzJHc0yPf8hMjiApJxP v8OsDHn6Sez6JJS7TmwUpSBE8QWAs1SJcXWSYGuCDrCA8ZkEg9dyTHljDKfYOW5v5WnG xp/jUhnma3f86v8B6p4nco2i8aKJQfsuM1L117ZksQWHIbw2xuFaX+8KVlT4EX4vwtSh z5jxr8+nOWdH4GrtJDouAu1d/+f+VO0bb/pJB8/CHlrSX8AH448IGuYUndx1K9NFkwo/ rNRA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CRRuP110; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd54bfa5sm128347995e9.25.2025.01.27.03.55.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:55:06 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 08/10] target/sh4: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:24 +0100 Message-ID: <20250127115426.51355-9-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/sh4/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index e3c2aea1a64..9d3e6cb2fd7 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -134,6 +134,11 @@ static void superh_cpu_reset_hold(Object *obj, ResetType type) static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) { +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif info->mach = bfd_mach_sh4; info->print_insn = print_insn_sh; } From patchwork Mon Jan 27 11:54:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860255 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976444wrq; Mon, 27 Jan 2025 03:56:46 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCUOpB302y4DwXLvRObHWiOWRQs83JkEq5duq9QkTWYwddS0u/jwPeTj7Tuf7YgHgn3OAI0EpA==@linaro.org X-Google-Smtp-Source: AGHT+IGipdTo6px25rJLHkK+UEp1WlDj93IT7bharAijq7W4bAkVN11ZMme5tFKkoGIn9G6bb1R5 X-Received: by 2002:a05:6214:3197:b0:6d8:8a01:64e2 with SMTP id 6a1803df08f44-6e1b21e2e0emr538108326d6.43.1737979005863; Mon, 27 Jan 2025 03:56:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737979005; cv=none; d=google.com; s=arc-20240605; b=NjYVebyMZZzFjIdFQJPqSuJhdpPU8e22EzPaB4Hi3kezJ6KHuF6m1YS1J2Qjy29W+X sIPbcQir41f2dlExQCteJe1ZzsvFE4zLiH7uknyIMnq958rNlGDOmxmGiKk5yaHdG4Ys +AXLBvgx3Oa3lPm2ZjFwDXQu6M+1PHwlc5ZmAv4zef+ZCrKpn+fwjUD5N2/Fsa7VmKa+ cIuAnmsNfrb5erPWR2CudN8QU1SKaRHWyGQdGL7ovqB9JRCLNWhaoNlOecd6Y7eW4X9T 22Y0gVL4ay/dTZ7fvV/EzRFprOVA95AJpnLs7+0pPjXi7wY4A5CQkN6fjECjAwKp8O0z k0QA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=rn2ReynSBdby37Nlff7xj1Nb5zVdrIwNIQImRA5QCJw=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=YAAwPefF0gOtLXNQt4keW/JtBGb/6UCA5Zrk+Kzoh+3fvW4oeTDCVN82LaSEoAY5YS 35gFultP5v4/Kr2fnXuIjplGzYXGJSo3OGso/Ur5oKmLFmVC0w9puasd95fLu0og1peK eBJqbZZSU5nuHnr3pXrIK+toNagF9v000TWUGbTkA03+6etmAFXNJteNGdktlU9S4+NB 5FSg7PHzTaiAa7ONVzOkMc3+AW0h4eqyzLSd57dPvVZzOl0IKoCpYu/pO/PFdwWYtgxM Hsi99aChsDHk0M7Ru9H5OWngUTgfXcw9kdb3B5dAoUVML8STuKdy2OoYcVGF0+LoJx4e uD0A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ehKvFwhH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a188689sm10807831f8f.48.2025.01.27.03.55.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:55:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 09/10] target/xtensa: Set disassemble_info::endian value in disas_set_info() Date: Mon, 27 Jan 2025 12:54:25 +0100 Message-ID: <20250127115426.51355-10-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Have the CPUClass::disas_set_info() callback set the disassemble_info::endian field. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- target/xtensa/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index efbfe73fcfb..bc170dbb5cc 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -159,6 +159,11 @@ static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) info->private_data = cpu->env.config->isa; info->print_insn = print_insn_xtensa; +#if TARGET_BIG_ENDIAN + info->endian = BFD_ENDIAN_BIG; +#else + info->endian = BFD_ENDIAN_LITTLE; +#endif } static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) From patchwork Mon Jan 27 11:54:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 860256 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:18c8:b0:385:e875:8a9e with SMTP id w8csp1976748wrq; Mon, 27 Jan 2025 03:57:42 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXoHorxZ//f8mApIpaQViVELuLWPldjs9N/2KkMnWQHxL+8WdFS4WawkWMR3eltfSNBePg78Q==@linaro.org X-Google-Smtp-Source: AGHT+IEFe63GReyGS82uqDwCxUUBdvf6I20zFTvn4dIhAF3cgJTAc+W2qZsWVJQN4funt7U5oJi5 X-Received: by 2002:a05:622a:58c:b0:466:96ef:90c with SMTP id d75a77b69052e-46e12b56a66mr611051301cf.41.1737979061854; Mon, 27 Jan 2025 03:57:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1737979061; cv=none; d=google.com; s=arc-20240605; b=cZ32bGOn7SS92hEOqUplLw9/xEPkhMZYwfGEy/neBEmDx4z6gZsM+1q9sZDIdg89RL 0J4wJPVQNdrKDRKA4cAJ1hwvHzXr7++Uvkm53sQhWU+3DL9MH/bvrZ6xXnckcXQjYdVk 6uzWmVrM6cyxR2JYIkA1g7HMOrIgAU6WQQDAId/tI9ZtTplXxOoQKCE48chPoWsSAgfZ 8X/0AkQQL4yVCuSQ3pjNssyj8xDwTibQfxGwk23rg1nlc9djlFfTv908LiWsg3YioLeS YlpN1uVXGW93F70KEC5HGLmqhKS76lQNiqWOknnWQI6F18I6uEtnoodY6PPh9H7kQ5AA MkIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=477b2+132Twzc6vm7x293Qvrvp4aEfDDM84pZnLDz7E=; fh=UT36gCECAOtEsgOrSReymFda56t2Gj969DHeMwsi3As=; b=NVAqz0pFm6r0aTQz0LMrArkNP/vgyrbFwOh+jUNnO88ovK56bpK8++GNBsX9UfA0z3 Ag6BQTAr4i7hGIo5bbNurY/Bb6UvVSf2x2gdRg2jQslFAoa132Ne6i39iT/Zandtuonu ahfnIZRzNInX/r/I0ZN4EFUFfwDBqQIUAQtljECS78rXSgvJlT2nnxZgYZrlEl5wz566 /daYgYHzYsGc3ox0g+ce3d6eSNWKwFb38V5HM+c6zDwAYzNG6TcQ9yVEvYN5DGImet6g HOwZk1KT+rFC8dWYWe71IrA+XkTHawUU9PbD12VZEXI5/+sBWpJQh0DUCpXimhDRpVTI bJdg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=A30Hdz7D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a1bbd93sm10884096f8f.76.2025.01.27.03.55.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 27 Jan 2025 03:55:15 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org, Paolo Bonzini , qemu-riscv@nongnu.org, Peter Maydell , Richard Henderson , Thomas Huth , qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 10/10] disas: Remove target_words_bigendian() call in initialize_debug_target() Date: Mon, 27 Jan 2025 12:54:26 +0100 Message-ID: <20250127115426.51355-11-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250127115426.51355-1-philmd@linaro.org> References: <20250127115426.51355-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All CPUClass implementations must implement disas_set_info() which sets the disassemble_info::endian value. Ensure that by: 1/ assert disas_set_info() handler is not NULL 2/ set %endian to BFD_ENDIAN_UNKNOWN before calling the CPUClass::disas_set_info() handler, then assert %endian is not BFD_ENDIAN_UNKNOWN after the call. This allows removing the target_words_bigendian() call in disas/. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- disas/disas-common.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/disas/disas-common.c b/disas/disas-common.c index 57505823cb7..42e911e36be 100644 --- a/disas/disas-common.c +++ b/disas/disas-common.c @@ -7,7 +7,6 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" -#include "exec/tswap.h" #include "disas-internal.h" @@ -61,15 +60,11 @@ void disas_initialize_debug_target(CPUDebug *s, CPUState *cpu) s->cpu = cpu; s->info.print_address_func = print_address; - if (target_words_bigendian()) { - s->info.endian = BFD_ENDIAN_BIG; - } else { - s->info.endian = BFD_ENDIAN_LITTLE; - } + s->info.endian = BFD_ENDIAN_UNKNOWN; - if (cpu->cc->disas_set_info) { - cpu->cc->disas_set_info(cpu, &s->info); - } + g_assert(cpu->cc->disas_set_info); + cpu->cc->disas_set_info(cpu, &s->info); + g_assert(s->info.endian != BFD_ENDIAN_UNKNOWN); } int disas_gstring_printf(FILE *stream, const char *fmt, ...)