From patchwork Tue Jan 21 03:00:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 859077 Received: from mail-m155115.qiye.163.com (mail-m155115.qiye.163.com [101.71.155.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C614D4689; Tue, 21 Jan 2025 03:06:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=101.71.155.115 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428774; cv=none; b=Qw/SGvQhU6WGQyt9SWTrf+RYFZbAsw7AC4nSoyXl/F+tHTD12dZF3P7BBQzdZl6Y/lwbxqQy5kTtvqfAeja2wrcy8UN8PU0UixOt7mJ68ULZEAxXQM7HrSwIr/yxPEcytigFfVGRqdrcLKr++CH5Shqxh/eIxZyPX4YhcmyHNZU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428774; c=relaxed/simple; bh=CHEeTpZYwW64ulxAW0WgNbi9SH+w95hTACuteXUXEOc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=Q1C7aC0CqH/OTylc30fju9bVVJGi8LBmXy/Bkmsci6OUisvif9/NxwWYY/SVQmbJOglGqEB78t7WGFHiGbZou/xGQ6KAHB3kOP9dTpEgp7j/pCverE/d6nRN9VXQ0y0cn5jF6GnYK/0Y1MmQU0JomZGmP5JLF/cRV51oFzqLZZY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=VMGNy3oK; arc=none smtp.client-ip=101.71.155.115 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="VMGNy3oK" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 93fdce84; Tue, 21 Jan 2025 11:00:59 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v6 1/7] dt-bindings: ufs: Document Rockchip UFS host controller Date: Tue, 21 Jan 2025 11:00:21 +0800 Message-Id: <1737428427-32393-2-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> References: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQh0ZQlYaSx1DT00fShlNTkNWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a9486ce609e09cckunm93fdce84 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PBQ6DSo*STIJAjU2QxUPOD4s OAMwFEtVSlVKTEhMT0lDT01KSUpDVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUhCSkI3Bg++ DKIM-Signature: a=rsa-sha256; b=VMGNy3oKG900p/jcKjlmeCw1XK87mlif//6bcvSpjXpJrcDr9FtdvCpjuFjEWeqEZlxFvsKIUibi68DYyG4fNX0oZk9vvMi3rRznjoZNrybfwKru6u8GVrV0Upp+VHeiLStoZ+DRqgfEMHWvKDmu10zbPxkyiECk6HcGp0mjT1I=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=HC1ZnuWJ7xKLbVwFlpGf1csbsE5H+grZCknYutl9UPc=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Document Rockchip UFS host controller for RK3576 SoC. Signed-off-by: Shawn Lin Reviewed-by: Krzysztof Kozlowski --- Changes in v6: None Changes in v5: - fix indentation to 4 spaces suggested by Krzysztof - use ufshc for devicetree example suggested by Mani Changes in v4: - properly describe reset-gpios Changes in v3: - rename the file to rockchip,rk3576-ufshc.yaml - add description for reset-gpios - use rockchip,rk3576-ufshc as compatible Changes in v2: - rename the file - add reset-gpios .../bindings/ufs/rockchip,rk3576-ufshc.yaml | 105 +++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml diff --git a/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml b/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml new file mode 100644 index 0000000..2ddc073 --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/rockchip,rk3576-ufshc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip UFS Host Controller + +maintainers: + - Shawn Lin + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + const: rockchip,rk3576-ufshc + + reg: + maxItems: 5 + + reg-names: + items: + - const: hci + - const: mphy + - const: hci_grf + - const: mphy_grf + - const: hci_apb + + clocks: + maxItems: 4 + + clock-names: + items: + - const: core + - const: pclk + - const: pclk_mphy + - const: ref_out + + power-domains: + maxItems: 1 + + resets: + maxItems: 4 + + reset-names: + items: + - const: biu + - const: sys + - const: ufs + - const: grf + + reset-gpios: + maxItems: 1 + description: | + GPIO specifiers for host to reset the whole UFS device including PHY and + memory. This gpio is active low and should choose the one whose high output + voltage is lower than 1.5V based on the UFS spec. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - power-domains + - resets + - reset-names + - reset-gpios + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ufshc: ufshc@2a2d0000 { + compatible = "rockchip,rk3576-ufshc"; + reg = <0x0 0x2a2d0000 0x0 0x10000>, + <0x0 0x2b040000 0x0 0x10000>, + <0x0 0x2601f000 0x0 0x1000>, + <0x0 0x2603c000 0x0 0x1000>, + <0x0 0x2a2e0000 0x0 0x10000>; + reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb"; + clocks = <&cru ACLK_UFS_SYS>, <&cru PCLK_USB_ROOT>, <&cru PCLK_MPHY>, + <&cru CLK_REF_UFS_CLKOUT>; + clock-names = "core", "pclk", "pclk_mphy", "ref_out"; + interrupts = ; + power-domains = <&power RK3576_PD_USB>; + resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>, <&cru SRST_A_UFS>, + <&cru SRST_P_UFS_GRF>; + reset-names = "biu", "sys", "ufs", "grf"; + reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; + }; + }; From patchwork Tue Jan 21 03:00:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 859078 Received: from mail-m49234.qiye.163.com (mail-m49234.qiye.163.com [45.254.49.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E5838831; Tue, 21 Jan 2025 03:01:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428494; cv=none; b=SO8f4gWi5+Yj4ylNqJEyYugSM5332MOVFKzPzEY0tlxd49fDtEwhh1VxcPoNUZQ6vLkbNLSngsiV8SwFvT8dr/Ma//IpSE598XS7yj3EPg1hZlbvwm68MLHyqd08wR0nPCK94zwZsAMZOcwxNUhWS+uRIVijJx7rO3xe+bhcc00= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428494; c=relaxed/simple; bh=g/nwDZP9SLEI2Vjd99fwinnM0/MNyabMv89OXaCJVow=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=uawpQ6sphzpxvUcUSLH9PGZsO3fGyU6NV8WLcHxeXAQRaAaoFq4n8AVdikUjlsWZGqepqXuGS9o+sNFisG3A3nR+4WI3Xyd/0F+9hPuZBRP+jgbo+rkP/O/MmTqbwreJcRgXx1lQMN/ZR2yW3ytXIk9ikJMu5tfM/vo8WqpIGKY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=C+T0xur9; arc=none smtp.client-ip=45.254.49.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="C+T0xur9" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 93fdcf00; Tue, 21 Jan 2025 11:01:26 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v6 3/7] pmdomain: core: Introduce dev_pm_genpd_rpm_always_on() Date: Tue, 21 Jan 2025 11:00:23 +0800 Message-Id: <1737428427-32393-4-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> References: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQkMZGVZIQk9CGUoeQ0NKGBpWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a9486cec7e909cckunm93fdcf00 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NSo6STo*OTIRNDVNHgstEjEZ KQswFExVSlVKTEhMT0lDT0NMTE9LVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUhDQk83Bg++ DKIM-Signature: a=rsa-sha256; b=C+T0xur92zfdXVdz9scdLgm4Aypk0CBcgFBWQD1SVlAhuFBgchP6VY9J7XQ8zkuGc3bCJEZhwevLSNuGWNm+Yzw+Ah0QPbCEN/cMuunFcWpnSMDJ9FCGI/wLyu+dA0+jOmerKBUQOUXyCs/uhDPe5qVYnWywuzE0ipqN3sVh9PQ=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=S8k3+QF/U7BZrl92gLsmr2O43MinCweidYG2hgjh7D0=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: From: Ulf Hansson For some usecases a consumer driver requires its device to remain power-on from the PM domain perspective during runtime. Using dev PM qos along with the genpd governors, doesn't work for this case as would potentially prevent the device from being runtime suspended too. To support these usecases, let's introduce dev_pm_genpd_rpm_always_on() to allow consumers drivers to dynamically control the behaviour in genpd for a device that is attached to it. Signed-off-by: Ulf Hansson Signed-off-by: Shawn Lin --- Changes in v6: - export dev_pm_genpd_rpm_always_on() Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/pmdomain/core.c | 35 +++++++++++++++++++++++++++++++++++ include/linux/pm_domain.h | 7 +++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c index a6c8b85..b44c300 100644 --- a/drivers/pmdomain/core.c +++ b/drivers/pmdomain/core.c @@ -697,6 +697,37 @@ bool dev_pm_genpd_get_hwmode(struct device *dev) } EXPORT_SYMBOL_GPL(dev_pm_genpd_get_hwmode); +/** + * dev_pm_genpd_rpm_always_on() - Control if the PM domain can be powered off. + * + * @dev: Device for which the PM domain may need to stay on for. + * @on: Value to set or unset for the condition. + * + * For some usecases a consumer driver requires its device to remain power-on + * from the PM domain perspective during runtime. This function allows the + * behaviour to be dynamically controlled for a device attached to a genpd. + * + * It is assumed that the users guarantee that the genpd wouldn't be detached + * while this routine is getting called. + * + * Return: Returns 0 on success and negative error values on failures. + */ +int dev_pm_genpd_rpm_always_on(struct device *dev, bool on) +{ + struct generic_pm_domain *genpd; + + genpd = dev_to_genpd_safe(dev); + if (!genpd) + return -ENODEV; + + genpd_lock(genpd); + dev_gpd_data(dev)->rpm_always_on = on; + genpd_unlock(genpd); + + return 0; +} +EXPORT_SYMBOL_GPL(dev_pm_genpd_rpm_always_on); + static int _genpd_power_on(struct generic_pm_domain *genpd, bool timed) { unsigned int state_idx = genpd->state_idx; @@ -868,6 +899,10 @@ static int genpd_power_off(struct generic_pm_domain *genpd, bool one_dev_on, if (!pm_runtime_suspended(pdd->dev) || irq_safe_dev_in_sleep_domain(pdd->dev, genpd)) not_suspended++; + + /* The device may need its PM domain to stay powered on. */ + if (to_gpd_data(pdd)->rpm_always_on) + return -EBUSY; } if (not_suspended > 1 || (not_suspended == 1 && !one_dev_on)) diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 45646bf..d4c4a7c 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -260,6 +260,7 @@ struct generic_pm_domain_data { unsigned int rpm_pstate; unsigned int opp_token; bool hw_mode; + bool rpm_always_on; void *data; }; @@ -292,6 +293,7 @@ ktime_t dev_pm_genpd_get_next_hrtimer(struct device *dev); void dev_pm_genpd_synced_poweroff(struct device *dev); int dev_pm_genpd_set_hwmode(struct device *dev, bool enable); bool dev_pm_genpd_get_hwmode(struct device *dev); +int dev_pm_genpd_rpm_always_on(struct device *dev, bool on); extern struct dev_power_governor simple_qos_governor; extern struct dev_power_governor pm_domain_always_on_gov; @@ -375,6 +377,11 @@ static inline bool dev_pm_genpd_get_hwmode(struct device *dev) return false; } +static inline int dev_pm_genpd_rpm_always_on(struct device *dev, bool on) +{ + return -EOPNOTSUPP; +} + #define simple_qos_governor (*(struct dev_power_governor *)(NULL)) #define pm_domain_always_on_gov (*(struct dev_power_governor *)(NULL)) #endif From patchwork Tue Jan 21 03:00:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 859076 Received: from mail-m19731117.qiye.163.com (mail-m19731117.qiye.163.com [220.197.31.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B55B4689; Tue, 21 Jan 2025 03:07:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.117 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428831; cv=none; b=GEVCP23zl5V75mDLisHd5GMHQz9/6Z6rtDR8roSb0lvT2b1zsh4aETKrwpE7qPhWJapfX9HB9YA2Vg51PsaSkhF3FrH0WCT7ALSf2KEFmQDWSSK0nBb+ANsSo6nRjvUTFk0YM8TpLkdqNF9NE/cUa6WxfMxmWVoOniXmbbQY1r0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428831; c=relaxed/simple; bh=f+IDDWbG1glBaknBQy6VGbP5zPws55M0TW6SPyPyZzA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=KPPXJLLGo8y8qDJs0uUmfXC7SZe1amROs1Y6mWfvYPrUhIOJ5ae3R47lEynfcSz9qXctSOGM9lMy5JeSzDoRWERu0bE7qh0uN/G/+5Ye/cc1sibq9iAMXvIOGGIN3Sfrbq/iCxQhBprb5o543SxS7vKZMaPcPQ6cCluK6xAYo9I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=TqI8ohmn; arc=none smtp.client-ip=220.197.31.117 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="TqI8ohmn" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 93fdcfc9; Tue, 21 Jan 2025 11:01:56 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v6 5/7] scsi: ufs: core: Export ufshcd_dme_reset() and ufshcd_dme_enable() Date: Tue, 21 Jan 2025 11:00:25 +0800 Message-Id: <1737428427-32393-6-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> References: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGRoYQlYaT0tNGU5PQxlOThhWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSUhCSE NVSktLVUpCS0tZBg++ X-HM-Tid: 0a9486cf3f3a09cckunm93fdcfc9 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NBw6Gio5IjIKHjUwDgoMEhYN FSIwC1ZVSlVKTEhMT0lDTkpDSkxCVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUlJTEk3Bg++ DKIM-Signature: a=rsa-sha256; b=TqI8ohmnyxhWLqD1UqvMHUDQC50neVHUoo/yIyD3lyqatb7ECjsy4gVzcatUt8pCx0CUABidLzivZnU133pKUOKpXRqy0hVa/AJmXIYKwlkoaj3nI1PTC5Sno+YQOXE8vzNGTKwembWHuK9cKKG6kHwGKc/kyWqNdF2cM22P3eI=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=62/IbHd0Qh119ueWxg+T4V12ACYtk6xM2YlX/+9xZY0=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: These two APIs will be used by glue driver if they need a different HCE process. Signed-off-by: Shawn Lin Reviewed-by: Manivannan Sadhasivam --- Changes in v6: - replace host drivers with glue drivers suggested by Mani - add Main's review tag Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None drivers/ufs/core/ufshcd.c | 6 ++++-- include/ufs/ufshcd.h | 2 ++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 6a26853..723080b 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -4014,7 +4014,7 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba) * * Return: 0 on success, non-zero value on failure. */ -static int ufshcd_dme_reset(struct ufs_hba *hba) +int ufshcd_dme_reset(struct ufs_hba *hba) { struct uic_command uic_cmd = { .command = UIC_CMD_DME_RESET, @@ -4028,6 +4028,7 @@ static int ufshcd_dme_reset(struct ufs_hba *hba) return ret; } +EXPORT_SYMBOL_GPL(ufshcd_dme_reset); int ufshcd_dme_configure_adapt(struct ufs_hba *hba, int agreed_gear, @@ -4053,7 +4054,7 @@ EXPORT_SYMBOL_GPL(ufshcd_dme_configure_adapt); * * Return: 0 on success, non-zero value on failure. */ -static int ufshcd_dme_enable(struct ufs_hba *hba) +int ufshcd_dme_enable(struct ufs_hba *hba) { struct uic_command uic_cmd = { .command = UIC_CMD_DME_ENABLE, @@ -4067,6 +4068,7 @@ static int ufshcd_dme_enable(struct ufs_hba *hba) return ret; } +EXPORT_SYMBOL_GPL(ufshcd_dme_enable); static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba) { diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index d7aca9e..e3fd40e 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -1357,6 +1357,8 @@ extern int ufshcd_system_thaw(struct device *dev); extern int ufshcd_system_restore(struct device *dev); #endif +extern int ufshcd_dme_reset(struct ufs_hba *hba); +extern int ufshcd_dme_enable(struct ufs_hba *hba); extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba, int agreed_gear, int adapt_val); From patchwork Tue Jan 21 03:00:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Lin X-Patchwork-Id: 859075 Received: from mail-m3272.qiye.163.com (mail-m3272.qiye.163.com [220.197.32.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 235D14689; Tue, 21 Jan 2025 03:07:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428859; cv=none; b=UV+yVBqPQ3fK44NBDEBil7LQyiP92En7HflahBZsTVQLMd3yydwUTFZeCf6GQItFkumtFm9mCzaMcPYhEf5UcVoU3xWDqGQiNJhUB6742BOJTltM7b7BkA5CGv1aPDQyWaFRNKJekrjnSvNbLIxchZ7wwLzV6uv//fjxoA+nK5U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737428859; c=relaxed/simple; bh=MVWks29q3iLdqkMqs0cxr90u1msFzWP6jyL7BW1PrIE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=k/NQrI8em+P6u1y6zorTpL8YReWmXRdTYdaIKojQJAGTil9tQMkigV9+onRM1a2xCCOiofMZAe9n3kaErjU2cg6j8xdEHcSR7fwVAigu0Jph2bPl/qJDsjBYlSzDOZlx0zENpHwY+itpNFOrv314EqesLT5ME1o1hgmUQ781GxU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=eVfzFqV9; arc=none smtp.client-ip=220.197.32.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="eVfzFqV9" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 93fdd038; Tue, 21 Jan 2025 11:02:17 +0800 (GMT+08:00) From: Shawn Lin To: Rob Herring , "James E . J . Bottomley" , "Martin K . Petersen" , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Heiko Stuebner , "Rafael J . Wysocki" Cc: Manivannan Sadhasivam , Alim Akhtar , Avri Altman , Bart Van Assche , YiFeng Zhao , Liang Chen , linux-scsi@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Shawn Lin Subject: [PATCH v6 7/7] arm64: dts: rockchip: Add UFS support for RK3576 SoC Date: Tue, 21 Jan 2025 11:00:27 +0800 Message-Id: <1737428427-32393-8-git-send-email-shawn.lin@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> References: <1737428427-32393-1-git-send-email-shawn.lin@rock-chips.com> X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGUJDH1ZJSklMH0lLSkJLQkNWFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ X-HM-Tid: 0a9486cf8f9f09cckunm93fdd038 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PhQ6DCo6EzINFjUvDgIOMhQ1 ITYaFE1VSlVKTEhMT0lDTkhDTEpKVTMWGhIXVQgTGgwVVRcSFTsJFBgQVhgTEgsIVRgUFkVZV1kS C1lBWU5DVUlJVUxVSkpPWVdZCAFZQUpMQ0w3Bg++ DKIM-Signature: a=rsa-sha256; b=eVfzFqV9E89gb6hbrFGveVsdmK07EuQBxTSELGs4HI1ORIzRfw0rY7To1KMDye63FXWw7lh0Qb1Zz0PXKXaHhK8nVcYS9rNwR5ltyDvOVi/rvcstR9pAH0MUVcNmEvEsQcdn2cG3SnzAiofEgMIVKetA0UXWobahU3aVI2iQqJw=; s=default; c=relaxed/relaxed; d=rock-chips.com; v=1; bh=wYMBbIgjK+XD69o+ifjptcWHfJAy3+cY5gYZs7J+pSU=; h=date:mime-version:subject:message-id:from; Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add ufshc node to rk3576.dtsi, so the board using UFS could enable it. Signed-off-by: Shawn Lin --- Changes in v6: - remove comments suggested by Mani Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/rockchip/rk3576.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 4dde954..bb786bd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1221,6 +1221,30 @@ }; }; + ufshc: ufshc@2a2d0000 { + compatible = "rockchip,rk3576-ufshc"; + reg = <0x0 0x2a2d0000 0 0x10000>, + <0x0 0x2b040000 0 0x10000>, + <0x0 0x2601f000 0 0x1000>, + <0x0 0x2603c000 0 0x1000>, + <0x0 0x2a2e0000 0 0x10000>; + reg-names = "hci", "mphy", "hci_grf", "mphy_grf", "hci_apb"; + clocks = <&cru ACLK_UFS_SYS>, <&cru PCLK_USB_ROOT>, <&cru PCLK_MPHY>, + <&cru CLK_REF_UFS_CLKOUT>; + clock-names = "core", "pclk", "pclk_mphy", "ref_out"; + assigned-clocks = <&cru CLK_REF_OSC_MPHY>; + assigned-clock-parents = <&cru CLK_REF_MPHY_26M>; + interrupts = ; + power-domains = <&power RK3576_PD_USB>; + pinctrl-0 = <&ufs_refclk>; + pinctrl-names = "default"; + resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>, + <&cru SRST_A_UFS>, <&cru SRST_P_UFS_GRF>; + reset-names = "biu", "sys", "ufs", "grf"; + reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + sdmmc: mmc@2a310000 { compatible = "rockchip,rk3576-dw-mshc"; reg = <0x0 0x2a310000 0x0 0x4000>;